Patents by Inventor Yutaka Harada

Yutaka Harada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5442196
    Abstract: A pair of superconducting electrodes are so formed as to interpose a semiconductor therebetween, and a control electrode is formed on the semiconductor through an insulator film so as to control the superconductive weak coupling state in the semiconductor between the superconducting electrodes. The distance between the superconducting electrodes is determined by the thickness of the superconductor interposed between the two electrodes, whereby the interelectrode distance is settled with a high precision to improve the uniformity of the device characteristic.And in an arrangement where two superconducting electrodes are formed on a semiconductor layer and the superconductive weak coupling state between such two electrodes is controlled by a third electrode, the gain is increadable by furnishing a varied impurity distribution in the semiconductor layer.
    Type: Grant
    Filed: February 24, 1994
    Date of Patent: August 15, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Toshikazu Nishino, Mutsuko Miyake, Ushio Kawabe, Yutaka Harada, Masaaki Aoki, Mikio Hirano
  • Patent number: 5418109
    Abstract: Disclosed is a preparation method of a toner comprising steps of:(a) preparing a dispersion mixture containing colored polymer particles, a charge controlling agent and organic resin fine particles, in an aqueous medium;(b) allowing said charge controlling agent and organic resin fine particles to be adhered on the surface of said colored polymer particles by salting-out;(c) drying said colored polymer particles having thereon said charge controlling agent and organic resin fine particles; and(d) applying mechanical impact to said colored polymer particles to effect a conversion of said organic resin fine particles into a film on the surfaces of said colored polymer particles.
    Type: Grant
    Filed: April 26, 1994
    Date of Patent: May 23, 1995
    Assignee: Nippon Paint Company
    Inventors: Akihiro Kanakura, Yutaka Harada, Takehiro Ojima, Shinji Seo, Haruhiko Sato
  • Patent number: 5311037
    Abstract: Superconducting electrodes are formed on a semiconductor which serves as a channel. A control electrode is disposed through an insulator film or a p-n junction on the side of the semiconductor which is opposite to the semiconductor side on which the superconducting electrode is formed. A superconducting current flows between the superconducting electrode across the semiconductor is controlled by an electric signal which is applied to the control electrode, thereby enhancing the current gain.
    Type: Grant
    Filed: August 6, 1992
    Date of Patent: May 10, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Harada, Shinichiro Yano, Mutsuko Miyake, Ushio Kawabe, Toshikazu Nishino
  • Patent number: 5311036
    Abstract: A pair of superconducting electrodes are so formed as to interpose a semiconductor therebetween, and a control electrode is formed on the semiconductor through an insulator film so as to control the superconductive weak coupling state in the semiconductor between the superconducting electrodes. The distance between the superconducting electrodes is determined by the thickness of the superconductor interposed between the two electrodes, whereby the interelectrode distance is settled with a high precision to improve the uniformity of the device characteristic.And in an arrangement where two superconducting electrodes are formed on a semiconductor layer and the superconductive weak coupling state between such two electrodes is controlled by a third electrode, the gain is increadable by furnishing a varied impurity distribution in the semiconductor layer.
    Type: Grant
    Filed: April 29, 1992
    Date of Patent: May 10, 1994
    Assignee: Hitachi, Ltd
    Inventors: Toshikazu Nishino, Mutsuko Miyake, Ushio Kawabe, Yutaka Harada, Masaaki Aoki, Mikio Hirano
  • Patent number: 5309038
    Abstract: A high-speed counter capable of counting the number of randomly incoming pulses is constructed by serially connecting a plurality of toggle flip-flop circuits, each of which is activated by input pulses and constructed from an rf-SQUID and the quantum flux parametron, whereby a high-speed computer or a high-speed measurement apparatus can be realised by the use of the high-speed counter.
    Type: Grant
    Filed: March 11, 1992
    Date of Patent: May 3, 1994
    Assignees: Research Development Corporation of Japan, Yutaka Harada
    Inventors: Yutaka Harada, Hioe Willy
  • Patent number: 5294884
    Abstract: A magnetometer comprising a superconducting loop including a magnetic flux detecting coil and a SQUID (Superconducting QUantum Interference Device) connected to the superconducting loop via magnetic flux. A negative inductance generating device is provided having two terminals for generating a negative inductance defined by the value of the derivative of generalized magnetic flux between the two terminals with current flowing between the terminals (d.PHI./dI) being negative. The inductance of the superconducting loop is decreased by the negative inductance generating device and input signals intensified by the negative inductance generating device are detected by the SQUID. A plurality of the superconducting loops may be provided to construct a gradiometer and a variable negative inductance generating device is provided to the respective superconducting loop to equalize and intensify the sensitivities of the detection coils.
    Type: Grant
    Filed: July 23, 1993
    Date of Patent: March 15, 1994
    Assignee: Research Development Corporation of Japan
    Inventors: Eiichi Goto, Yutaka Harada
  • Patent number: 5160983
    Abstract: Superconducting electrodes are formed on a semiconductor which serves as a channel. A control electrode is disposed through an insulator film or a p-n junction on the side of the semiconductor which is opposite to the semiconductor side on which the superconducting electrode is formed. A superconducting current which flows between the superconducting electrodes across the semiconductor is controlled by an electric signal which is applied to the control electrode, thereby enhancing the current gain.
    Type: Grant
    Filed: November 21, 1989
    Date of Patent: November 3, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Harada, Shinichiro Yano, Mutsuko Miyake, Ushio Kawabe, Toshikazu Nishino
  • Patent number: 5128675
    Abstract: In a superconducting digital to analog converter, shunt branches of a ladder resistor network are connected to corresponding Josephson devices, the states of which are switched by a digital signal. Currents following through the Josephson devices or load resistors of the Josephson devices are collected to obtain an analog signal corresponding to the digital signal.
    Type: Grant
    Filed: September 19, 1991
    Date of Patent: July 7, 1992
    Assignee: Research Development Corporation of Japan
    Inventor: Yutaka Harada
  • Patent number: 5126801
    Abstract: A pair of superconducting electrodes are so formed as to interpose a semiconductor therebetween, and a control electrode is formed on the semiconductor through an insulator film so as to control the superconductive weak coupling state in the semiconductor between the superconducting electrodes. The distance between the superconducting electrodes is determined by the thickness of the superconductor interposed between the two electrodes, whereby the interelectrode distance is settled with a high precision to improve the uniformity of the device characteristic. In an arrangement where two superconducting electrodes are formed on a semiconductor layer and the superconductive weak coupling state between such two electrodes is controlled by a third electrode, the gain is incredible by furnishing a varied impurity distribution in the semiconductor layer.
    Type: Grant
    Filed: September 25, 1989
    Date of Patent: June 30, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Toshikazu Nishino, Mutsuko Miyake, Ushio Kawabe, Yutaka Harada, Masaaki Aoki, Mikio Hirano
  • Patent number: 5111082
    Abstract: A superconducting threshold logic circuit comprises current switching circuits each having a Josephson device. Bias currents of the switching circuits are varied independently to change weights for input signals. A sum of the weighted input signals are inputted to another current switching circuit having a Josephson device in order to compare the sum with a threshold.
    Type: Grant
    Filed: July 12, 1990
    Date of Patent: May 5, 1992
    Assignee: Research Development Corporation of Japan
    Inventor: Yutaka Harada
  • Patent number: 5053645
    Abstract: In a threshold logic circuit, digital input signals are weighted and summed up and then the sum of weighted digital signals is compared with a threshold value. The threshold logic circuit comprises a plurality of current switching circuits and means for summing up the output currents from the current switching circuit. The weights for the input signals are changed by controlling supply currents to the current switching circuits.
    Type: Grant
    Filed: April 17, 1990
    Date of Patent: October 1, 1991
    Assignee: Research Development Corporation
    Inventor: Yutaka Harada
  • Patent number: 4956642
    Abstract: A superconducting analog to digital converter comprises a plurality of comparators, each of which includes a quantum flux parametron having a superconducting loop with two Josephson devices and exciting inductors, a first load inductor connected to the superconducting loop, and means for supplying exciting current to inductors inductively coupled with said exciting inductors and an rf-SQUID comprising a superconducting loop with a second load inductor and a Josephson device, whereby an input signal is converted to a positive or negative signal by the rf-SQUID for each unit change of the input signal by the amount of the magnetic flux quantum and then the converted signal is sampled and amplified by the quantum flux parametron.
    Type: Grant
    Filed: November 22, 1988
    Date of Patent: September 11, 1990
    Assignee: Research Development Corporation of Japan
    Inventor: Yutaka Harada
  • Patent number: 4916335
    Abstract: There is provided a quantum flux parametron-type superconducting circuit in which a path with a Josephson device is connected in parallel with exciting inductors of the quantum flux parametron or inductors of exciting line magnetically coupled with the exciting inductors, thereby constructing a phase regulator.
    Type: Grant
    Filed: September 9, 1988
    Date of Patent: April 10, 1990
    Assignees: L. Research Development Corporation of Japan, Yutaka Harada
    Inventors: Eiichi Goto, Yutaka Harada
  • Patent number: 4902908
    Abstract: A superconducting circuit comprises a quantum flux parametron. In the superconducting circuit, at least one of two Josephson devices is a voltage controlled superconducting device, the critical current of which can be controlled by applying a voltage. By adjusting the applied voltage, the critical currents of the two Josephson devices can be equalized. If an input signal is used as the applied voltage, the input signal can be isolated from an output signal. And further, if both critical currents of the two Josephson devices are increased after an input signal is supplied, the input signal can be stably amplified.
    Type: Grant
    Filed: January 20, 1988
    Date of Patent: February 20, 1990
    Assignee: Research Development Corporation of Japan
    Inventor: Yutaka Harada
  • Patent number: 4893174
    Abstract: An integrated circuit is disclosed in which a plurality of semiconductor substrates are stacked in such a manner that an insulating board, provided with (1) structure, such as grooves, for transmitting a coolant so as to dissipate heat, and (2) an electrical interconnection member for electrically connecting adjacent semiconductor substrates, is sandwiched between semiconductor substrates. In order to attain the high-speed signal transmission between a semiconductor substrate and an insulating board, a signal current flows not only in a main surface of the semiconductor substrate but also in directions perpendicular to the main surface. The insulating board may be formed of an insulating silicon carbide plate which has a plurality of grooves filled with a metal.
    Type: Grant
    Filed: September 2, 1988
    Date of Patent: January 9, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Minoru Yamada, Akira Masaki, Kazuo Sato, Yutaka Harada
  • Patent number: 4888629
    Abstract: Superconducting electrodes are formed on a semiconductor which serves as a channel. A control electrode is disposed through an insulator film or a p-n junction on the side of the semiconductor which is opposite to the semiconductor side on which the superconducting electrode is formed. A superconducting current which flows between the superconducting electrodes across the semiconductor is controlled by an electric signal which is applied to the control electrode, thereby enhancing the current gain.
    Type: Grant
    Filed: May 31, 1988
    Date of Patent: December 19, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Harada, Shinichiro Yano, Mutsuko Miyake, Ushio Kawabe, Toshikazu Nishino
  • Patent number: 4884111
    Abstract: A pair of superconducting electrodes are so formed as to interpose a smeiconductor therebetween, and a control electrode is formed on the seimiconductor through an insulator film so as to control the superconductive weak coupling state in the semiconductor between the superconducting electrodes. The distance between the superconducting electrodes is determined by the thickness of the superconductor interposed between the two electrodes, whereby the interelectrode distance is settled with a high precision to improve the uniformity of the device characteristic.And in an arrangement where two superconducting electrodes are formed on a semiconductor layer and the superconductive weak coupling state between such two electrodes is controlled by a third electrode, the gain is increadable by furnishing a varied impurity distribution in the semiconductor layer.
    Type: Grant
    Filed: July 13, 1987
    Date of Patent: November 28, 1989
    Inventors: Toshikazu Nishino, Mutsuko Miyake, Ushio Kawabe, Yutaka Harada, Masaaki Aoki, Mikio Hirano
  • Patent number: 4866373
    Abstract: A superconducting current detecting circuit which comprises a reference current generation circuit for generating a reference current and a DC flux parametron circuit for comparing an input current to be detected with the reference current to thereby produce pulses in synchronism with an input excitation signal, the number of the pulses being varied in accordance with a difference between the input current and the reference current, the pulses having positive or negative values depending on the polarity of the difference, the reference current generation circuit having means for increasing or decreasing the reference current by a quantity corresponding to the number of the pulses in response to the polarity of the pulses so that reference current generation circuit produces the reference current which agrees with the input current.
    Type: Grant
    Filed: December 28, 1988
    Date of Patent: September 12, 1989
    Assignees: Hitachi, Ltd., Rikagaku Kenkyusko
    Inventors: Yutaka Harada, Eiichi Goto, Ushio Kawabe, Nobuo Miyamoto, Hideaki Nakane, Mutsuko Hatano
  • Patent number: 4851776
    Abstract: A sensitive magnetometer for determining the strength of a very weak magnetic field having at least one Josephson junction through which current induced by the magnetic field and modulated in accordance with a modulation magnetic flux which varies periodically, is conducted. Harmonic separating means separately detects a selected even harmonic component from the current flowing in the Josephson junction to obviate the need for null flux calibration.
    Type: Grant
    Filed: December 16, 1987
    Date of Patent: July 25, 1989
    Assignee: Research Development Corporation
    Inventors: Eiichi Goto, Yutaka Harada
  • Patent number: 4785426
    Abstract: A superconducting switching circuit comprises a DCFP circuit composed of two Josephson junction elements constituting two current paths, respectively. Each of the current paths includes a resistor for suppressing resonance. A memory cell constituted by the DCFP circuit includes three Josephson junction elements constituting three current paths, respectively. Each of the current paths includes a resistor for suppressing resonance. A memory circuit comprises a number of memory cells of such a structure.
    Type: Grant
    Filed: September 19, 1985
    Date of Patent: November 15, 1988
    Assignees: Hitachi, Ltd., Rikagaku Kenkyusho
    Inventors: Yutaka Harada, Ushio Kawabe, Eiichi Goto, Nobuo Miyamoto