Patents by Inventor Yutaka Kishimoto

Yutaka Kishimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11539344
    Abstract: An elastic wave device includes a supporting substrate including an upper surface including a recessed portion, a piezoelectric thin film on the supporting substrate to cover the recessed portion of the supporting substrate, an IDT electrode on a main surface of the piezoelectric thin film, the main surface being adjacent to the supporting substrate, and an intermediate layer on a main surface of the piezoelectric thin film, the main surface being remote from the supporting substrate. A space is defined by the supporting substrate and the piezoelectric thin film. The IDT electrode faces the space. Through holes are provided in the piezoelectric thin film and the intermediate layer to extend from a main surface of the intermediate layer to the space, the main surface being remote from the piezoelectric thin film. The elastic wave device further includes a cover member on the intermediate layer and covering opening ends of the through holes.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: December 27, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Tetsuya Kimura, Yutaka Kishimoto, Masashi Omura
  • Publication number: 20220384708
    Abstract: In a piezoelectric device, a layered portion includes, at a position at least above a recess, a single crystal piezoelectric layer and a pair of electrode layers to apply voltage to the single crystal piezoelectric layer. At least a portion of the pair of electrode layers includes a lower electrode layer extending along a surface of the single crystal piezoelectric layer, the surface being closer to a base. The lower electrode layer is present only inside the recess.
    Type: Application
    Filed: August 9, 2022
    Publication date: December 1, 2022
    Inventors: Yutaka KISHIMOTO, Shinsuke IKEUCHI
  • Publication number: 20220384707
    Abstract: In a piezoelectric device, when viewed in a direction perpendicular to one main surface, an outer shape of a recess is a polygonal shape or a circular shape. When n represents a number of sides of the polygonal shape, r represents a radius of a circumscribed circle of an imaginary regular polygon including n sides with a length identical to a length of a shortest of the sides, and d represents a maximum thickness of a membrane portion, which is located above the recess, of a multilayer portion, r?197.7dn?0.6698 when 3?n?7, and r?52.69d when 8?n or when the outer shape of the recess is a circular shape.
    Type: Application
    Filed: August 9, 2022
    Publication date: December 1, 2022
    Inventors: Yutaka KISHIMOTO, Shinsuke IKEUCHI, Masashi OMURA
  • Patent number: 11495728
    Abstract: A piezoelectric device includes a piezoelectric body at least a portion of which can bend and vibrate, an upper electrode on an upper surface of the piezoelectric body and in which distortion of a crystal lattice is reduced as a distance from the upper surface of the piezoelectric body increases, a lower electrode on a lower surface of the piezoelectric body and in which distortion of a crystal lattice is reduced as a distance from the upper surface of the piezoelectric body increases, and a support substrate below the piezoelectric body, in which a recess extending from a lower surface of the support substrate toward the lower surface of the piezoelectric device is provided.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: November 8, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shinsuke Ikeuchi, Tetsuya Kimura, Katsumi Fujimoto, Yutaka Kishimoto, Fumiya Kurokawa, Yuzo Kishi
  • Publication number: 20220271728
    Abstract: A piezoelectric element includes a second electrode layer on a second surface of a single-crystal piezoelectric layer. A hole continuous with a through-hole is provided in the second electrode layer. The second electrode layer is made of Pt, Ti, Al, Cu, Au, Ag, Mg, or an alloy including at least one of the metals as a main ingredient. A third electrode layer is on one side of the second electrode layer opposite to the single-crystal piezoelectric layer. The third electrode layer includes at least a portion outside of an edge of the hole with a distance maintained relative to the edge of the hole when viewed in a direction perpendicular or substantially perpendicular to the second surface. The third electrode layer is made of Ni or an alloy including Ni as a main ingredient.
    Type: Application
    Filed: March 3, 2022
    Publication date: August 25, 2022
    Inventors: Yutaka KISHIMOTO, Shinsuke IKEUCHI, Masayuki SUZUKI, Fumiya KUROKAWA
  • Publication number: 20220209095
    Abstract: A piezoelectric element includes a piezoelectric layer, a first electrode layer, and a second electrode layer. The piezoelectric layer includes first and second surfaces opposed to each other. The first electrode layer is located on the first surface. The second electrode layer is located on the second surface. At least a portion of the second electrode layer faces the first electrode layer with the piezoelectric layer interposed therebetween. The second electrode layer mainly includes silicon. The piezoelectric layer is monocrystalline.
    Type: Application
    Filed: March 15, 2022
    Publication date: June 30, 2022
    Inventors: Shinsuke IKEUCHI, Masato KOBAYASHI, Masayuki SUZUKI, Fumiya KUROKAWA, Yutaka KISHIMOTO, Hajime YAMADA
  • Publication number: 20220209098
    Abstract: A piezoelectric element includes a piezoelectric layer, a first electrode layer, a second electrode layer, and a connecting electrode. The piezoelectric layer includes first and second surfaces, and a through-hole. The second electrode layer is adjacent to the second surface of the piezoelectric layer. The second electrode layer faces the through-hole. The second electrode layer includes silicon as a major component. The connecting electrode is on a connecting surface of the second electrode layer, and the connecting surface faces the through-hole. The connecting electrode is made of a metal. A surface roughness of the connecting surface is greater than a surface roughness of a major surface. The major surface is a portion, other than the connecting surface, of a surface of the second electrode layer, and the surface is adjacent to the piezoelectric layer.
    Type: Application
    Filed: March 15, 2022
    Publication date: June 30, 2022
    Inventors: Yutaka KISHIMOTO, Shinsuke IKEUCHI, Masayuki SUZUKI, Fumiya KUROKAWA
  • Publication number: 20220199891
    Abstract: A piezoelectric element includes a piezoelectric layer, a first electrode layer, a second electrode layer, and a coupling electrode. At least a portion of the second electrode layer faces the first electrode layer with the piezoelectric layer interposed therebetween. The second electrode layer includes a coupling area. The coupling area meets a through hole in a region of the second electrode layer not facing the first electrode layer. The coupling electrode is on the coupling area. Between the coupling area and the surface of the second electrode layer on the piezoelectric layer side excluding the coupling area, the difference in position is about 5 nm or less.
    Type: Application
    Filed: March 10, 2022
    Publication date: June 23, 2022
    Inventors: Masayuki SUZUKI, Shinsuke IKEUCHI, Fumiya KUROKAWA, Yutaka KISHIMOTO, Hajime YAMADA, Masato KOBAYASHI
  • Patent number: 11309862
    Abstract: An acoustic wave device includes in order a substrate, an acoustic reflection layer, a piezoelectric layer, an IDT electrode including a pair of comb electrodes, and wiring electrodes. The acoustic reflection layer includes a low Z dielectric layer, a high Z dielectric layer below the low Z dielectric layer and having an acoustic impedance higher than that of the low Z dielectric layer, and a metal layer above the low Z dielectric layer and having an acoustic impedance higher than that of the low Z dielectric layer. When the acoustic reflection layer is viewed in plan, in a region encompassing the IDT electrode and the wiring electrodes but no IDT electrodes other than the IDT electrode, an area including the metal layer is smaller than an area including the high Z dielectric layer.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: April 19, 2022
    Assignee: MURATA MANUFACTURING CO., LTD
    Inventor: Yutaka Kishimoto
  • Publication number: 20220045262
    Abstract: A piezoelectric device includes a base portion and an upper layer on an upper side of and supported by the base portion. The upper layer includes a membrane portion that does not overlap with the base portion in plan view. The membrane portion includes at least one piezoelectric layer sandwiched by electrode layers from a top and a bottom thereof. An intermediate layer is between a lower electrode and the base portion. The intermediate layer includes one or more individual layers, and an individual layer exposed as a lower surface of the membrane portion among the one or more individual layers includes a bent portion, which extends from the lower surface of the membrane portion to a lateral wall, on a boundary between a portion defining and functioning as the lower surface of the membrane portion and a portion overlapping with the base portion.
    Type: Application
    Filed: October 22, 2021
    Publication date: February 10, 2022
    Inventors: Yutaka KISHIMOTO, Shinsuke IKEUCHI, Masayuki SUZUKI, Fumiya KUROKAWA
  • Publication number: 20220045261
    Abstract: A piezoelectric device includes a membrane portion including a single-crystal piezoelectric layer, an upper electrode layer, and a lower electrode layer. The upper electrode layer is on a first surface. The lower electrode layer is on a second surface facing at least a portion of the upper electrode layer sandwiching the single-crystal piezoelectric layer. The single-crystal piezoelectric layer includes piezoelectric body cleavage directions extending along a boundary line between a cleavage plane occurring when the single-crystal piezoelectric layer is cleaved and the first surface. When viewed in a vertical direction, at least a portion of an upper electrode outer edge and at least a portion of a lower electrode outer edge are non-parallel to at least one of the piezoelectric body cleavage directions.
    Type: Application
    Filed: October 21, 2021
    Publication date: February 10, 2022
    Inventors: Masayuki SUZUKI, Shinsuke IKEUCHI, Fumiya KUROKAWA, Yutaka KISHIMOTO
  • Patent number: 11245380
    Abstract: In an acoustic wave device, a piezoelectric body is directly or indirectly laminated on a silicon support substrate, and a functional electrode is provided on the piezoelectric body. A support layer is directly or indirectly laminated on the silicon support substrate, and the support layer is located outside the functional electrode when viewed in plan view. A silicon cover layer is provided on the support layer that includes an insulating material, and a space A is defined by the silicon support substrate, the support layer, and the silicon cover layer. The electric resistance of the silicon support substrate is higher than the electric resistance of the silicon cover layer.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: February 8, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Makoto Sawamura, Seiji Kai, Yutaka Kishimoto, Yuzo Kishi
  • Publication number: 20220038073
    Abstract: An elastic wave device includes a piezoelectric layer including a first main surface and a second main surface facing the first main surface, an acoustically reflective layer stacked on the first main surface of the piezoelectric layer, an excitation electrode disposed on the piezoelectric layer, and a support layer. The acoustically reflective layer overlaps at least the excitation electrode in a plan view of the piezoelectric layer from the side of the second main surface. The support layer surrounds the acoustically reflective layer in a plan view of the piezoelectric layer from the side of the second main surface.
    Type: Application
    Filed: October 18, 2021
    Publication date: February 3, 2022
    Inventor: Yutaka KISHIMOTO
  • Patent number: 11239819
    Abstract: An elastic wave device includes a supporting substrate, an acoustic multilayer film on the supporting substrate, a piezoelectric substrate on the acoustic multilayer film, and an IDT electrode on the piezoelectric substrate. The acoustic multilayer film includes at least four acoustic impedance layers. The at least four acoustic impedance layers include at least one low acoustic impedance layer and at least one high acoustic impedance layer having an acoustic impedance higher than the low acoustic impedance layer. The elastic wave device further includes a bonding layer provided at any position in a range of from inside the acoustic impedance layer, which is the fourth acoustic impedance layer from the piezoelectric substrate side towards the supporting substrate side, to an interface between the acoustic multilayer film and the supporting substrate.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: February 1, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yutaka Kishimoto, Masashi Omura, Tetsuya Kimura
  • Publication number: 20220002142
    Abstract: A cavity SOI substrate that includes a first silicon substrate having a cavity; a second silicon substrate bonded to the first silicon substrate, wherein the second silicon substrate includes a first portion oppositely aligned with the cavity of the first silicon substrate and that is thicker than a second portion of the second silicon substrate that is bonded to the first silicon substrate; and a silicon oxide film interposed between the first silicon substrate and the second silicon substrate.
    Type: Application
    Filed: September 22, 2021
    Publication date: January 6, 2022
    Inventors: Makoto Sawamura, Ryunosuke Hino, Yutaka Kishimoto
  • Publication number: 20210375628
    Abstract: A manufacturing method for a bonded substrate that includes preparing a first substrate having a surface with a projected portion in a central region of the surface, preparing a second substrate, and bonding the first substrate and the second substrate using the projected portion as a bonding surface to be bonded to the second substrate.
    Type: Application
    Filed: August 11, 2021
    Publication date: December 2, 2021
    Inventors: Ryunosuke Hino, Yuzu Kishi, Yutaka Kishimoto
  • Publication number: 20210343929
    Abstract: In a piezoelectric device, a piezoelectric driving portion includes layers and is directly or indirectly supported by a base portion. The piezoelectric driving portion includes a piezoelectric layer, an upper electrode layer, and a lower electrode layer. The upper electrode layer is disposed on the upper side of the piezoelectric layer. The lower electrode layer faces at least a portion of the upper electrode layer with the piezoelectric layer interposed therebetween. The piezoelectric driving portion includes a through groove extending through the piezoelectric driving portion in the vertical direction, so that a pair of inner side surfaces are provided. The pair of inner side surfaces each include a first small-width portion in which the width of the through groove decreases in a downward direction from an upper end surface of the piezoelectric layer.
    Type: Application
    Filed: July 7, 2021
    Publication date: November 4, 2021
    Inventors: Yutaka KISHIMOTO, Shinsuke IKEUCHI
  • Patent number: 11152914
    Abstract: An elastic wave device includes a piezoelectric layer including a first main surface and a second main surface facing the first main surface, an acoustically reflective layer stacked on the first main surface of the piezoelectric layer, an excitation electrode disposed on the piezoelectric layer, and a support layer. The acoustically reflective layer overlaps at least the excitation electrode in a plan view of the piezoelectric layer from the side of the second main surface. The support layer surrounds the acoustically reflective layer in a plan view of the piezoelectric layer from the side of the second main surface.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: October 19, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yutaka Kishimoto
  • Patent number: 11146233
    Abstract: An elastic wave device in which an IDT electrode defines an excitation electrode on a piezoelectric layer, an acoustic reflection layer is laminated on a first main surface of the piezoelectric layer, the acoustic reflection layer includes high acoustic impedance layers with a relatively high acoustic impedance and low acoustic impedance layers with a relatively low acoustic impedance, and the acoustic reflection layer has an unwanted wave reflection suppression structure in which reflection of unwanted waves toward the piezoelectric layer side is significantly reduced or prevented.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: October 12, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yutaka Kishimoto, Masashi Omura
  • Publication number: 20210284524
    Abstract: A silicon substrate having a first silicon substrate having a first surface with a cavity and a second surface opposite the first surface; a first silicon oxide film having a thickness dl on the first surface; a second silicon oxide film having a thickness d2 on a bottom of the cavity; and a third silicon oxide film having a thickness d3 on the second surface, where d1?d3 and d1<d2, or d3<d1 and d2<d1.
    Type: Application
    Filed: May 27, 2021
    Publication date: September 16, 2021
    Inventor: Yutaka Kishimoto