Patents by Inventor Yutaka Koshino

Yutaka Koshino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4502207
    Abstract: A wiring material of a semiconductor device, which comprises aluminum as a major component and at least a surface layer of the wiring layer is alloyed with boron and silicon. A method for forming a wiring material of a semiconductor device, which comprises the steps of: forming a wiring pattern comprising aluminum as a major component on a semiconductor element; and ion-implanting one of boron and a mixture of boron and silicon in the wiring pattern and alloying at least a surface layer of the wiring pattern to form an alloy layer containing aluminum, boron and silicon.
    Type: Grant
    Filed: December 16, 1983
    Date of Patent: March 5, 1985
    Assignee: Toshiba Shibaura Denki Kabushiki Kaisha
    Inventors: Jiro Ohshima, Masahiro Abe, Yutaka Koshino
  • Patent number: 4479830
    Abstract: A method for manufacturing a semiconductor device is shown which includes a step of ion implanting an impurity into an impurity-region formation region of a semiconductor substrate. Before or after the ion implantation step, silicon ions are implanted in a dose of 1.times.10.sup.13 to 1.times.10.sup.15 /cm.sup.2 into the impurity-region formation region and then the silicon ions so implanted are subjected to an activation treatment to form an epitaxial grown protrusion on the surface of the substrate. The protrusion is used as an alignment mark in the subsequent mask alignment step for photolithography.
    Type: Grant
    Filed: January 31, 1983
    Date of Patent: October 30, 1984
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Yutaka Koshino, Jiro Ohshima, Takashi Ajima, Toshio Yonezawa
  • Patent number: 4426234
    Abstract: The invention discloses a method for fabricating a semiconductor device comprising the steps of: forming, on an entire surface of a semiconductor substrate of one conductivity type, a first thin film of a diffusion coefficient greater than a diffusion coefficient of the substrate; forming, on an entire surface of the first thin film, a second thin film having a diffusion coefficient smaller than the diffusion coefficient of the first thin film; ion-implanting an impurity through the second thin film into the first thin film to form an impurity region, said impurity having a conductivity type opposite to the conductivity type of the substrate; and effecting annealing to set a junction depth of the impurity region to a predetermined value. According to the method of the invention, an impurity region having a desired sheet resistivity and a desired diffusion depth can be formed in the semiconductor substrate with excellent reproducibility and control.
    Type: Grant
    Filed: December 3, 1981
    Date of Patent: January 17, 1984
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Jiro Ohshima, Yutaka Koshino, Takashi Ajima, Toshio Yonezawa
  • Patent number: 4415372
    Abstract: The invention provides a method for fabricating a semiconductor device which comprises the steps of ion-implanting an impurity into a monocrystalline semiconductor substrate; irradiating the region into which the impurity ions have been implanted with an accelerated electron beam under the conditions that the acceleration voltage is 20 to 200 KeV, and the current is 0.01 to 1 mA and the exposure dose is 10.sup.20 to 10.sup.15 /cm.sup.2 ; and carrying out annealing to form a semiconductor region of one conductivity type. According to the present invention, a semiconductor device can be fabricated which has fewer lattice defects and in which the lifetime of the carriers is long.
    Type: Grant
    Filed: October 20, 1981
    Date of Patent: November 15, 1983
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Yutaka Koshino, Toshio Yonezawa, Takashi Ajima, Jiro Ohshima
  • Patent number: 4404736
    Abstract: A method for manufacturing a semiconductor device of mesa type comprises forming mesa recesses of predetermined depth around an element in the surface of a semiconductor body, forming on the back of semiconductor body a film for lessening the concentration of stress, filling glass powder into mesa recesses, and sintering glass powder to form glass insulators. According to the method of the present invention, cracks can be prevented from being caused in the semiconductor body and glass insulators formed in mesa recesses.
    Type: Grant
    Filed: November 9, 1981
    Date of Patent: September 20, 1983
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Yutaka Koshino, Takashi Ajima, Jiro Ohshima, Masahiro Abe
  • Patent number: 4351894
    Abstract: A method of manufacturing a semiconductor device which comprises the step of applying a silicon carbide film having a prescribed perforated pattern as a masking film selectively to etch a silicon dioxide film or diffuse an impurity into a substrate.
    Type: Grant
    Filed: May 12, 1981
    Date of Patent: September 28, 1982
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Toshio Yonezawa, Takashi Ajima, Shunichi Hiraki, Yutaka Koshino, Yoshitami Oka