Abstract: A switching power supply is mounted on a printed circuit board. A first wiring layer of the printed circuit board includes a DC line through which a DC voltage is supplied, and a first ground region and a second ground region formed at a distance from the DC line and with the DC line interposed between them. A lower-layer ground region is formed in a second wiring layer. An insulating layer includes multiple first through holes provided along one side of the first ground region so as to electrically connect the first ground region and the lower-layer ground region, and multiple second through holes provided along one side of the second ground region so as to electrically connect the second ground region and the lower-layer ground region.

Abstract: A wireless communication apparatus which comprises: a shared antenna shared for communication and power reception; an impedance matching circuit connected to the shared antenna and having a first switch element; a communication circuit connected to the impedance matching circuit; a second switch element connected to the first switch element; and an impedance matching adjustment circuit configured to switch an on/off state of each of the first switch element and the second switch element at the time of communication and at the time of power reception.

Abstract: A wireless communication apparatus which comprises: a shared antenna shared for communication and power reception; an impedance matching circuit connected to the shared antenna and having a first switch element; a communication circuit connected to the impedance matching circuit; a second switch element connected to the first switch element; and an impedance matching adjustment circuit configured to switch an on/off state of each of the first switch element and the second switch element at the time of communication and at the time of power reception.

Abstract: A gain control circuit, having an attenuator including first to n-th (n>2) attenuator parts that attenuate an input signal respectively in accordance with first to n-th attenuation control signals to thereby generate an attenuated input signal, a signal amplifier configured to amplify the attenuated input signal, a detector circuit configured to conduct an envelope detection on the amplified attenuated input signal to thereby obtain an amplitude value, a comparator circuit configured to compare the amplitude value with a reference threshold value to thereby generate a comparison result signal, and an attenuator control circuit configured to generate the first to n-th attenuation control signals using the comparison result signal. The attenuation control signals indicate first to n-th attenuation amounts by which the first to n-th attenuator parts respectively attenuate the input signal, and first to n-th time periods during which the first to n-th attenuator parts respectively operate.

Abstract: A gain control circuit, having an attenuator including first to n-th (n>2) attenuator parts that attenuate an input signal respectively in accordance with first to n-th attenuation control signals to thereby generate an attenuated input signal, a signal amplifier configured to amplify the attenuated input signal, a detector circuit configured to conduct an envelope detection on the amplified attenuated input signal to thereby obtain an amplitude value, a comparator circuit configured to compare the amplitude value with a reference threshold value to thereby generate a comparison result signal, and an attenuator control circuit configured to generate the first to n-th attenuation control signals using the comparison result signal. The attenuation control signals indicate first to n-th attenuation amounts by which the first to n-th attenuator parts respectively attenuate the input signal, and first to n-th time periods during which the first to n-th attenuator parts respectively operate.

Abstract: A power detection device includes first and second power detection circuits configured to output a first and second detection signals, respectively, each including a half-wave rectifier circuit having a transistor, and connected to an RF input terminal, a ripple filter having a transistor and a capacitor, and configured to filter ripples of a rectified signal from the half-wave rectifier circuit, a transmission circuit having a pair of transistors, and connected to the half-wave rectifier circuit and the ripple filter to transfer the rectified signal to the ripple filter, and a constant current source having a transistor to supply a current to the half-wave rectifier circuit, the ripple filter, and the transmission circuit, and a subtraction circuit configured to receive the first and second detection signals and to calculate a difference between the two signals.

Abstract: A power detection device includes first and second power detection circuits configured to output a first and second detection signals, respectively, each including a half-wave rectifier circuit having a transistor, and connected to an RF input terminal, a ripple filter having a transistor and a capacitor, and configured to filter ripples of a rectified signal from the half-wave rectifier circuit, a transmission circuit having a pair of transistors, and connected to the half-wave rectifier circuit and the ripple filter to transfer the rectified signal to the ripple filter, and a constant current source having a transistor to supply a current to the half-wave rectifier circuit, the ripple filter, and the transmission circuit, and a subtraction circuit configured to receive the first and second detection signals and to calculate a difference between the two signals.

Abstract: In a semiconductor integrated circuit, a second wiring layer includes a ground conductor having at least one opening formed therein. At least one opening is overlapped by at least one patch conductor included in a third wiring layer. At least one patch conductor and the ground conductor are electrically connected to each other by at least one via hole included in a second dielectric layer. A first wiring layer includes a signal line above the ground conductor.

Abstract: In a semiconductor integrated circuit, a second wiring layer includes a ground conductor having at least one opening formed therein. At least one opening is overlapped by at least one patch conductor included in a third wiring layer. At least one patch conductor and the ground conductor are electrically connected to each other by at least one via hole included in a second dielectric layer. A first wiring layer includes a signal line above the ground conductor.

Abstract: A high-frequency semiconductor device for power amplification has a comb-teeth electrode on each of active regions formed on the front surface of the semiconductor substrate. One aspect of the present invention, there is provided a monolithic microwave integrated circuit (MMIC) having a plurality of rectangular-shaped active regions arranged side by side on the front surface of the semiconductor substrate, each of the active regions having interdigited gate, drain and source electrodes thereon which are connected to the respective pads by multilayer interconnection technique. Additionally, the source potential is fed from the back surface of the substrate through a metal plugged via-hole.

Abstract: A high frequency semiconductor device including wiring layers which are formed above a semiconductor substrate and in which transmission lines are formed by combining with a ground plate having a potential fixed at the ground potential, at least one crossing portion in which the wiring layers mutually cross, with insulating interlayers provided therebetween, and at least one separation electrode being selectively provided on one of the insulating interlayers, the at least one separation electrode having a potential fixed at the ground potential. Accordingly, in the high frequency semiconductor device, electrical interference between two crossing wiring layer is prevented and transmission loss is suppressed.

Abstract: A structure for eliminating the influence of an antenna line connected to the patch electrode on the antenna characteristics of a patch antenna built in an MMIC is disclosed. A through-hole is formed in the antenna ground plane which is provided under the patch electrode with an interlayer insulation film therebetween, the antena line is provided in the side opposite to the patch electrode with respect to the antena ground plane, and the patch electrode and antenna line are connected to each other with a conductor passing through the trough-hole.

Abstract: A structure for preventing MMICs (Monolithic Microwave Integrated Circuits) from deterioration in the high-frequency transmission characteristics thereof, which results from mechanical pressure applied to the pads during the wire-bonding thereto for external connection. The structure includes a groove provided in the surface of the interlayer insulation film around each of the pads. The line conductor for transmitting high-frequency signals is free from the peeling off or bending thereof, which is caused by the deformation in the interlayer insulation films during when the mechanical pressure applied to the pads, and thus, the change in the transmission characteristics of the line conductor can be minimized, and the reliability of MMICs can be improved.

Abstract: A multilayer wiring structure for MMICs includes a power-supply wiring formed of a multilayer wiring (a plurality of power-supply lines). The wires are interconnected by throughholes. A power-supply current is divided and supplied to the lines. A large current can be supplied to the entirety of the multilayer wiring, even when the width of each of the lines is reduced. The multilayer wiring structure has an improved degree of freedom in the layout of wiring.

Abstract: A high frequency semiconductor device includes a ground plate, an insulating layer, a power-supply conductor, an insulating interlayer, and a strip line as a line conductor. The power-supply conductor is disposed above the ground plate, with the insulating layer provided therebetween. The ground plate and the power-supply conductor have a capacitance formed therebetween. Thus, the line conductor regards the power-supply conductor as having a potential identical to that of the ground plate. This makes it possible to lay out the line conductor without considering the arrangement of the power-supply conductor. In other words, by two-dimensionally overlapping a microstrip line and a power-supply conductor in an MMIC, the degree of freedom in the device layout can be increased.

Abstract: In a high frequency semiconductor device, a shield plate which is connected to the ground potential is provided above an MMIC structure including line conductors, with an insulating interlayer provided therebetween. By using the shield plate to shield the MMIC, interference caused by external electromagnetic waves or leakage of electromagnetic waves to the exterior can be reduced in a chip alone.

Abstract: A high frequency semiconductor device includes semiconductor elements provided on a semiconductor substrate, a surface insulating layer for covering the semiconductor elements, at least one wiring layer which is provided above the surface insulating layer, with at least one insulating interlayer provided therebetween, and which combines with the ground potential to form transmission line, and at least one heat-radiating stud which is provided in at least one throughhole so as to penetrate said insulating interlayers and so as not to penetrate said surface insulating layer.

Abstract: A semiconductor integrated circuit has a 3-dimmensional interconnection line structure for high-speed operation. One aspect of the present invention, there is provided a monolithic microwave integrated circuit (MMIC) having a 3-dimmensional tournament tree shaped multilayer interconnection lines, wherein a single electric feeding point on a top surface of the MMIC is divided, layer by layer, into plural electrodes on the semiconductor substrate of the MMIC via a plurality of laminated interconnection layers and vertical interconnection layers therebetween shaped like a tournament tree.

Abstract: A semiconductor integrated circuit has a 3-dimmensional interconnection line structure for high-speed operation. One aspect of the present invention, there is provided a monolithic microwave integrated circuit (MMIC) having a 3-dimmensional tournament tree shaped multilayer interconnection lines, wherein a single electric feeding point on a top surface of the MMIC is divided, layer by layer, into plural electrodes on the semiconductor substrate of the MMIC via a plurality of laminated interconnection layers and vertical interconnection layers therebetween shaped like a tournament tree.

Abstract: A high frequency semiconductor device includes a ground plate, an insulating layer, a power-supply conductor, an insulating interlayer, and a strip line as a line conductor. The power-supply conductor is disposed above the ground plate, with the insulating layer provided therebetween. The ground plate and the power-supply conductor have a capacitance formed therebetween. Thus, the line conductor regards the power-supply conductor as having a potential identical to that of the ground plate. This makes it possible to lay out the line conductor without considering the arrangement of the power-supply conductor. In other words, by two-dimensionally overlapping a microstrip line and a power-supply conductor in an MMIC, the degree of freedom in the device layout can be increased.