Patents by Inventor Yutaka Mimino

Yutaka Mimino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020139993
    Abstract: In a high frequency semiconductor device, a shield plate which is connected to the ground potential is provided above an MMIC structure including line conductors, with an insulating interlayer provided therebetween. By using the shield plate to shield the MMIC, interference caused by external electromagnetic waves or leakage of electromagnetic waves to the exterior can be reduced in a chip alone.
    Type: Application
    Filed: March 6, 2002
    Publication date: October 3, 2002
    Applicant: Fujitsu Quantum Devices Limited
    Inventors: Yoshio Aoki, Yutaka Mimino, Osamu Baba, Muneharu Gotoh
  • Publication number: 20020140089
    Abstract: A multilayer wiring structure for MMICs includes a power-supply wiring formed of a multilayer wiring (a plurality of power-supply lines). The wires are interconnected by throughholes. A power-supply current is divided and supplied to the lines. A large current can be supplied to the entirety of the multilayer wiring, even when the width of each of the lines is reduced. The multilayer wiring structure has an improved degree of freedom in the layout of wiring.
    Type: Application
    Filed: March 6, 2002
    Publication date: October 3, 2002
    Applicant: Fujitsu Quantum Devices Limited
    Inventors: Yutaka Mimino, Osamu Baba, Yoshio Aoki, Muneharu Gotoh
  • Publication number: 20020140052
    Abstract: A high frequency semiconductor device has at least one gap which is formed by removing part of a ground plate under an inductor. By forming the gap, a parasitic capacitance which is caused by a dielectric layer between the ground plate and the ground potential can be deleted.
    Type: Application
    Filed: March 1, 2002
    Publication date: October 3, 2002
    Applicant: Fujitsu Quantum Devices Limited
    Inventors: Yutaka Mimino, Osamu Baba, Yoshio Aoki, Muneharu Gotoh
  • Publication number: 20020140087
    Abstract: A high frequency semiconductor device includes semiconductor elements provided on a semiconductor substrate, a surface insulating layer for covering the semiconductor elements, at least one wiring layer which is provided above the surface insulating layer, with at least one insulating interlayer provided therebetween, and which combines with the ground potential to form transmission line, and at least one heat-radiating stud which is provided in at least one throughhole so as to penetrate said insulating interlayers and so as not to penetrate said surface insulating layer.
    Type: Application
    Filed: February 21, 2002
    Publication date: October 3, 2002
    Applicant: Fujitsu Quantum Devices Limited
    Inventors: Osamu Baba, Yutaka Mimino, Yoshio Aoki, Muneharu Gotoh
  • Publication number: 20020139969
    Abstract: A structure for preveting MMICs (Monolithic Microwave Integrated Circuits) from the deterioration in the high-frequency transmission characteristics thereof, which is resulted from mechanical pressure applied to the pads during the wire-bonding thereto for external connection. The structure includes a groove provided in the surface of the interlayer insulation film around each of the pads. The line conductor for transmitting high-frequency signals is free from the peeling off or bending thereof, which is caused by the deformation in the interlayer insulation films during when the mechanical pressure applied to the pads, and thus, the change in the transmission characteristics of the line conductor can be minimized, and the reliability of MMICs can be improved.
    Type: Application
    Filed: March 1, 2002
    Publication date: October 3, 2002
    Applicant: Fujitsu Quantum Devices Limited
    Inventors: Yutaka Mimino, Osamu Baba, Yoshio Aoki, Muneharu Gotoh
  • Publication number: 20020140609
    Abstract: A structure for eliminating the influence of an antenna line connected to the patch electrode on the antenna characteristics of a patch antenna built in an MMIC is disclosed. A through-hole is formed in the antenna ground plane which is provided under the patch electrode with an interlayer insulation film therebetween, the antena line is provided in the side opposite to the patch electrode with respect to the antena ground plane, and the patch electrode and antenna line are connected to each other with a conductor passing through the trough-hole.
    Type: Application
    Filed: March 6, 2002
    Publication date: October 3, 2002
    Applicant: Fujitsu Quantum Devices Limited
    Inventors: Yoshio Aoki, Yutaka Mimino, Osamu Baba, Muneharu Gotoh
  • Publication number: 20020140057
    Abstract: A high frequency semiconductor device includes wiring layers which are formed above a semiconductor substrate and in which transmission lines are formed by combining with a ground plate having a potential fixed at the ground potential, at least one crossing portion in which the wiring layers mutually cross, with insulating interlayers provided therebetween, and at least one separation electrode being selectively provided on one of the insulating interlayers, the at least one separation electrode having a potential fixed at the ground potential. Accordingly, in the high frequency semiconductor device, the electrical interference between two crossing wiring layers is prevented and transmission loss is suppressed.
    Type: Application
    Filed: February 21, 2002
    Publication date: October 3, 2002
    Applicant: Fujitsu Quantum Devices Limited
    Inventors: Osamu Baba, Yutaka Mimino
  • Publication number: 20020140024
    Abstract: A high-frequency semiconductor device for power amplification has a comb-teeth electrode on each of active regions formed on the front surface of the semiconductor substrate. One aspect of the present invention, there is provided a monolithic microwave integrated circuit (MMIC) having a plurality of rectangular-shaped active regions arranged side by side on the front surface of the semiconductor substrate, each of the active regions having interdigited gate, drain and source electrodes thereon which are connected to the respective pads by multilayer interconnection technique. Additionally, the source potential is fed from the back surface of the substrate through a metal plugged via-hole.
    Type: Application
    Filed: March 14, 2002
    Publication date: October 3, 2002
    Applicant: FUJITSU QUANTUM DEVICES LIMITED
    Inventors: Yoshio Aoki, Yutaka Mimino, Osamu Baba, Muneharu Gotoh