Patents by Inventor Yutaka Ohmoto
Yutaka Ohmoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7122479Abstract: An etching processing method capable of etching a low dielectric constant layer at a reduced cost by using an etching processing apparatus comprising a vacuum vessel, a sample loading electrode disposed in the vacuum vessel, a gas introduction device for introducing a reaction gas into the vacuum vessel, an antenna for forming plasmas in the vacuum vessel, and a high frequency power supply for supplying a bias power to a sample loaded on the sample loading electrode, wherein the bias power to be supplied to the sample is 3 W/cm2 or less, and the gas introduction device introduces a gas containing chlorine atoms or bromine atoms to apply etching processing to an inorganic insulation material of low dielectric constant loaded on the loading electrode.Type: GrantFiled: August 28, 2002Date of Patent: October 17, 2006Assignee: Hitachi High-Technologies CorporationInventors: Yutaka Ohmoto, Ryouji Fukuyama, Mamoru Yakushiji, Michinobu Mizumura
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Patent number: 7026252Abstract: After etching a Si-containing low permittivity insulating film with chlorine based gas, the etched wafer is subjected to an etching aftertreatment process comprising introducing oxygen gas to a vacuum processing chamber with a pressure as low as 0.2 Pa to 1 Pa and a flow rate as low as 5 cc to 20 cc/min, generating plasma within the chamber, heating the wafer 2 being subjected to aftertreatment between 50° C. and 200° C., applying a wafer bias power within the range of 50 W to 200 W, and exposing the wafer to the generated plasma, thereby simultaneously removing the photoresist components, the antireflection film components and the halogen components.Type: GrantFiled: February 25, 2003Date of Patent: April 11, 2006Assignee: Hitachi High-Technologies CorporationInventors: Michinobu Mizumura, Ryouji Fukuyama, Mamoru Yakushiji, Yutaka Ohmoto, Katsuya Watanabe
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Publication number: 20060065624Abstract: This invention relates to a method for etching an organic insulating film used in the production of semiconductor devices. A sample to be etched on which a low dielectric constant organic insulating film is formed is etched by generating a plasma from hydrogen gas and nitrogen gas or ammonia gas, and controlling the gas flow rate and pressure so that the light emission spectral intensity ratio of hydrogen atom and cyan molecule in the plasma comes to a prescribed value. By this method, a low dielectric constant organic insulating film as an insulating film between layers can be etched without using any etch stop layer so that bottom surfaces of trenches and holes for electrical wiring become flat.Type: ApplicationFiled: August 23, 2005Publication date: March 30, 2006Inventors: Michinobu Mizumura, Ryooji Fukuyama, Yutaka Ohmoto, Katsuya Watanabe
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Patent number: 7014787Abstract: This invention relates to a method for etching an organic insulating film used in the production of semiconductor devices. A sample to be etched on which a low dielectric constant organic insulating film is formed is etched by generating a plasma from hydrogen gas and nitrogen gas or ammonia gas, and controlling the gas flow rate and pressure so that the light emission spectral intensity ratio of hydrogen atom and cyan molecule in the plasma comes to a prescribed value. By this method, a low dielectric constant organic insulating film as an insulating film between layers can be etched without using any etch stop layer so that bottom surfaces of trenches and holes for electrical wiring become flat.Type: GrantFiled: April 1, 2004Date of Patent: March 21, 2006Assignee: Hitachi, Ltd.Inventors: Michinobu Mizumura, Ryooji Fukuyama, Yutaka Ohmoto, Katsuya Watanabe
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Patent number: 7009714Abstract: A process recipe is controlled by processing reflection interference light on the surface of a wafer with a signal and etching is carried out by suppressing an increase in the surface roughness of the wafer during etching. That is, a dry etching method for use in a dry etching system comprising means of treating a sample by generating plasma in a vacuum process chamber and monitor means of monitoring the reflection interference light of the sample to be treated, the method comprising the step of detecting the spectrum of reflection interference light on the surface of the sample to be treated, the step of obtaining a residual from curve fit between a theoretical value estimated from the film reflection model of the surface of the wafer and the spectrum of reflection interference light, and the step of judging whether the residual from the curve fit falls within a predetermined value.Type: GrantFiled: February 26, 2003Date of Patent: March 7, 2006Assignee: Hitachi High-Technologies CorporationInventors: Yutaka Ohmoto, Ryouji Fukuyama, Mamoru Yakushiji
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Patent number: 6867144Abstract: A plasma etching method of a wafer includes the steps of electrostatically attracting the wafer which has a gate oxide film onto a wafer mounting electrode in a vacuum processing chamber, introducing a mixed gas into the vacuum processing chamber on the basis of an etching recipe, generating a magnetic field inside the vacuum processing chamber, generating a plasma in the vacuum processing chamber, applying a bias power to the wafer to accelerate ions in the plasma toward the wafer, and setting an impedance of a portion of the wafer mounting electrode which corresponds to an outer periphery of the wafer as viewed from a bias power supply to a value which is greater than that of a center portion of the wafer mounting electrode using an electrode arranged within the wafer mounting electrode at a position corresponding to the outer periphery of the wafer and formed under an insulating film for electrostatically attracting the wafer.Type: GrantFiled: May 6, 2002Date of Patent: March 15, 2005Assignee: Hitachi, Ltd.Inventors: Yutaka Ohmoto, Hironobu Kawahara, Ken Yoshioka, Kazue Takahashi, Saburou Kanai
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Publication number: 20050011612Abstract: An apparatus for etching an organic film that is capable of suppressing the amount of contaminants adhered to the etched substrate without deteriorating the etching properties or processing profile of the film, comprising disposing a ring formed of a semiconductor material on the outer circumference of a substrate to be processed, and applying a bias voltage to the ring.Type: ApplicationFiled: February 27, 2004Publication date: January 20, 2005Inventors: Mamoru Yakushiji, Yutaka Ohmoto, Ryooji Fukuyama, Katsuya Watanabe
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Publication number: 20040182514Abstract: This invention relates to a method for etching an organic insulating film used in the production of semiconductor devices. A sample to be etched on which a low dielectric constant organic insulating film is formed is etched by generating a plasma from hydrogen gas and nitrogen gas or ammonia gas, and controlling the gas flow rate and pressure so that the light emission spectral intensity ratio of hydrogen atom and cyan molecule in the plasma comes to a prescribed value. By this method, a low dielectric constant organic insulating film as an insulating film between layers can be etched without using any etch stop layer so that bottom surfaces of trenches and holes for electrical wiring become flat.Type: ApplicationFiled: April 1, 2004Publication date: September 23, 2004Inventors: Michinobu Mizumura, Ryooji Fukuyama, Yutaka Ohmoto, Katsuya Watanabe
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Patent number: 6793833Abstract: This invention relates to a method for etching an organic insulating film used in the production of semiconductor devices. A sample to be etched on which a low dielectric constant organic insulating film is formed and is etched by generating a plasma from hydrogen gas and nitrogen gas or ammonia gas, and controlling the gas flow rate and pressure so that the light emission spectral intensity ratio of hydrogen atom and cyan molecule in the plasma comes to a prescribed value. By this method, a low dielectric constant organic insulating film as an insulating film between layers can be etched without using any etch stop layer so that bottom surface of trenches and holes for electrical wiring become flat.Type: GrantFiled: February 25, 2002Date of Patent: September 21, 2004Assignee: Hitachi, Ltd.Inventors: Michinobu Mizumura, Ryooji Fukuyama, Yutaka Ohmoto, Katsuya Watanabe
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Publication number: 20040165193Abstract: A process recipe is controlled by processing reflection interference light on the surface of a wafer with a signal and etching is carried out by suppressing an increase in the surface roughness of the wafer during etching. That is, a dry etching method for use in a dry etching system comprising means of treating a sample by generating plasma in a vacuum process chamber and monitor means of monitoring the reflection interference light of the sample to be treated, the method comprising the step of detecting the spectrum of reflection interference light on the surface of the sample to be treated, the step of obtaining a residual from curve fit between a theoretical value estimated from the film reflection model of the surface of the wafer and the spectrum of reflection interference light, and the step of judging whether the residual from the curve fit falls within a predetermined value.Type: ApplicationFiled: February 26, 2003Publication date: August 26, 2004Inventors: Yutaka Ohmoto, Ryouji Fukuyama, Mamoru Yakushiji
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Publication number: 20040149385Abstract: A plasma processing apparatus for manufacturing a semiconductor device includes an apparatus for applying bias powers to a substrate to be processed and a material adjacent to the substrate, an apparatus for adjusting a feeding impedance for the bias power applied to the material, and an apparatus for adjusting feeding impedances for the bias powers to a plurality of positions on the substrate so as to make electrons projected to the substrate from the plasma uniform within a surface of the substrate.Type: ApplicationFiled: September 17, 2003Publication date: August 5, 2004Inventors: Yutaka Ohmoto, Hironobu Kawahara, Ken Yoshioka, Kazue Takahashi, Saburou Kanai
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Publication number: 20040147130Abstract: After etching a Si-containing low permittivity insulating film with chlorine based gas, the etched wafer is subjected to an etching aftertreatment process comprising introducing oxygen gas to a vacuum processing chamber with a pressure as low as 0.2 Pa to 1 Pa and a flow rate as low as 5 cc to 20 cc/min, generating plasma within the chamber, heating the wafer 2 being subjected to aftertreatment between 50° C. and 200° C., applying a wafer bias power within the range of 50 W to 200 W, and exposing the wafer to the generated plasma, thereby simultaneously removing the photoresist components, the antireflection film components and the halogen components.Type: ApplicationFiled: February 25, 2003Publication date: July 29, 2004Inventors: Michinobu Mizumura, Ryouji Fukuyama, Mamoru Yakushiji, Yutaka Ohmoto, Katsuya Watanabe
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Patent number: 6759338Abstract: A plasma processing apparatus and a plasma processing method for processing a wafer of a large diameter to produce a high speed semiconductor circuit at a high yield are provided. A thickness of an insulating film formed on a surface of an electrode opposing to a substrate to be processed is locally changed, an electrode is provided in the insulating film and a bypassed bias current is supplied to the electrode. An electrode is provided in an insulating film on a surface of the electrode opposing to a material adjacent to the substrate to be processed and a bypassed bias current is supplied to the electrode.Type: GrantFiled: March 1, 2001Date of Patent: July 6, 2004Assignee: Hitachi, Ltd.Inventors: Yutaka Ohmoto, Hironobu Kawahara, Ken Yoshioka, Kazue Takahashi, Saburou Kanai
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Publication number: 20030234238Abstract: An etching processing method capable of etching a low dielectric constant layer at a reduced cost by using an etching processing apparatus comprising a vacuum vessel, a sample loading electrode disposed in the vacuum vessel, a gas introduction device for introducing a reaction gas into the vacuum vessel, an antenna for forming plasmas in the vacuum vessel, and a high frequency power supply for supplying a bias power to a sample loaded on the sample loading electrode, wherein the bias power to be supplied to the sample is 3 W/cm2 or less, and the gas introduction device introduces a gas containing chlorine atoms or bromine atoms to apply etching processing to an inorganic insulation material of low dielectric constant loaded on the loading electrode.Type: ApplicationFiled: August 28, 2002Publication date: December 25, 2003Inventors: Yutaka Ohmoto, Ryouji Fukuyama, Mamoru Yakushiji, Michinobu Mizumura
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Patent number: 6649021Abstract: A plasma processing apparatus processes high-speed semiconductor circuits by using plasma with an increased yield. The plasma processing apparatus has a vacuum vessel including an exhaust device, a starting material gas supplying device, an electrode for installing a workpiece (wafer) and a device for applying radio frequency power to the wafer. This apparatus converts the starting material gas to plasma inside the vacuum vessel and plasma-processes a wafer surface, wherein an insulating film is interposed between the electrode for installing the wafer and the wafer and has a conductive material at a part thereof, and the conductive material is electrically grounded through an impedance regulating circuit.Type: GrantFiled: July 20, 2001Date of Patent: November 18, 2003Assignee: Hitachi, Ltd.Inventors: Yutaka Ohmoto, Hironobu Kawahara, Ken Yoshioka, Kazue Takahashi, Saburou Kanai
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Publication number: 20030052086Abstract: This invention relates to a method for etching an organic insulating film used in the production of semiconductor devices.Type: ApplicationFiled: February 25, 2002Publication date: March 20, 2003Inventors: Michinobu Mizumura, Ryooji Fukuyama, Yutaka Ohmoto, Katsuya Watanabe
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Publication number: 20020127858Abstract: A plasma etching method of a wafer includes the steps of electrostatically attracting the wafer which has a gate oxide film onto a wafer mounting electrode in a vacuum processing chamber, introducing a mixed gas into the vacuum processing chamber on the basis of an etching recipe, generating a magnetic field inside the vacuum processing chamber, generating a plasma in the vacuum processing chamber, applying a bias power to the wafer to accelerate ions in the plasma toward the wafer, and setting an impedance as viewed from a bias power supply relative to an outer periphery of the wafer to a value which is greater than that of a wafer center portion using the electrode which is formed under an insulating film for electrostatically attracting the wafer.Type: ApplicationFiled: May 6, 2002Publication date: September 12, 2002Inventors: Yutaka Ohmoto, Hironobu Kawahara, Ken Yoshioka, Kazue Takahashi, Saburou Kanai
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Patent number: 6413876Abstract: A plasma processing apparatus processes high-speed semiconductor circuits by using plasma with an increased yield. The plasma processing apparatus has a vacuum vessel including an exhaust device, a starting material gas supplying device, an electrode for installing a workpiece (wafer) and a device for applying radio frequency power to the wafer. This apparatus converts the starting material gas to plasma inside the vacuum vessel and plasma-processes a wafer surface, wherein an insulating film is interposed between the electrode for installing the wafer and the wafer and has a conductive material at a part thereof, and the conductive material is electrically grounded through an impedance regulating circuit.Type: GrantFiled: March 5, 2001Date of Patent: July 2, 2002Assignee: Hitachi, Ltd.Inventors: Yutaka Ohmoto, Hironobu Kawahara, Ken Yoshioka, Kazue Takahashi, Saburou Kanai
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Publication number: 20020025686Abstract: A plasma processing apparatus processes high-speed semiconductor circuits by using plasma with an increased yield. The plasma processing apparatus has a vacuum vessel including an exhaust device, a starting material gas supplying device, an electrode for installing a workpiece (wafer) and a device for applying radio frequency power to the wafer. This apparatus converts the starting material gas to plasma inside the vacuum vessel and plasma-processes a wafer surface, wherein an insulating film is interposed between the electrode for installing the wafer and the wafer and has a conductive material at a part thereof, and the conductive material is electrically grounded through an impedance regulating circuit.Type: ApplicationFiled: March 5, 2001Publication date: February 28, 2002Inventors: Yutaka Ohmoto, Hironobu Kawahara, Ken Yoshioka, Kazue Takahashi, Saburou Kanai
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Publication number: 20020023716Abstract: A plasma processing apparatus processes high-speed semiconductor circuits by using plasma with an increased yield. The plasma processing apparatus has a vacuum vessel including an exhaust device, a starting material gas supplying device, an electrode for installing a workpiece (wafer) and a device for applying radio frequency power to the wafer. This apparatus converts the starting material gas to plasma inside the vacuum vessel and plasma-processes a wafer surface, wherein an insulating film is interposed between the electrode for installing the wafer and the wafer and has a conductive material at a part thereof, and the conductive material is electrically grounded through an impedance regulating circuit.Type: ApplicationFiled: July 20, 2001Publication date: February 28, 2002Inventors: Yutaka Ohmoto, Hironobu Kawahara, Ken Yoshioka, Kazue Takahashi, Saburou Kanai