Patents by Inventor Yutaka Okamoto

Yutaka Okamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7357212
    Abstract: In a pedestrian protection airbag system, an airbag module extending in the lateral direction of a vehicle body is disposed between a rear edge of a hood and a front edge of a cowl top, thereby mounting the airbag module without affecting the intake of air into a vehicle compartment or the positioning of wipers; and the left and right ends of the airbag module are supported by upper parts of left and right front wheel damper housings, whereby the damper housings obtain a high rigidity to reliably bear a reaction force during deployment of an airbag without particularly enhancing the rigidity of the cowl top. Thus, it is possible to rigidly support the airbag module in the pedestrian protection airbag system while minimizing the influence on the shape or structure of the cowl top.
    Type: Grant
    Filed: August 18, 2005
    Date of Patent: April 15, 2008
    Assignee: Honda Motor Co., Ltd.
    Inventors: Sakae Sasaki, Ken Nakane, Yutaka Okamoto, Yuji Kikuchi
  • Patent number: 7342863
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 20, 2006
    Date of Patent: March 11, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7336582
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: February 26, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7336581
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: January 10, 2006
    Date of Patent: February 26, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7327657
    Abstract: A reproduction signal evaluation method of this invention includes the step of obtaining a reproduction signal from an information recording medium on which digital information is recorded with record marks having different sizes, the step of obtaining the amplitude of a first reproduction signal, of the signals contained in the reproduction signal, which reflects digital information recorded with a record mark having the maximum size, the step of obtaining the amplitude of a second reproduction signal, of the signals contained in the reproduction signal, which reflects digital information recorded with a record mark having the second smallest size, the step of obtaining an evaluation value from the ratio of the amplitudes of the first and second reproduction signals, and the step of evaluating a characteristic of the reproduction signal on the basis of the evaluation value.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: February 5, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Chosaku Noda, Yutaka Kashihara, Yutaka Okamoto, Hideo Ando, Koichi Hirayama
  • Patent number: 7324427
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 25, 2006
    Date of Patent: January 29, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7321546
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7321538
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 25, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7321537
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7321536
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7321547
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7321548
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 25, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7321545
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7321549
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7321535
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7319654
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: January 15, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7314239
    Abstract: A tube 4 includes a casing 1 made of a fluororesin. The casing 1 surrounds a fluid tube 3 and lid members 5 each made of a fluororesin and include a receiving portion 8 for receiving one end portion of the tube 4. At least one sealing face 10 is disposed in the receiving portion. Union nuts 6, made of a fluororesin, are fitted onto the end portion of the tube 4 and screwed to one end portion of one of the lid members 5. A sealing portion 19 is formed by fastening the union nuts 6 to the end portions of the lid members 5 to press the tube 4 from the outside of the tube 4. A device element such as a filter member 3 is placed in the casing 1.
    Type: Grant
    Filed: May 13, 2004
    Date of Patent: January 1, 2008
    Assignee: Nippon Pillar Packing Co., Ltd.
    Inventors: Yutaka Okamoto, Tatsuya Fujii
  • Patent number: 7313071
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: December 25, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Publication number: 20070262569
    Abstract: An air bag device includes a retainer having an opening, a lid for covering the opening of the retainer, an air bag accommodated in the retainer, at least one hinge member connecting the retainer and the lid, and at least one guide plate having a hook-shaped or J-shaped cross section to define a recess. The hinge member is bent at its mid portion along the recess of the guide plate, and one end portion of the hinge member is fixed to a reverse surface of the lid at one side thereof and the other end portion of the hinge member is fixed to the guide plate and sandwiched between the guide plate and the retainer.
    Type: Application
    Filed: April 25, 2007
    Publication date: November 15, 2007
    Applicant: Honda Motor Co., Ltd.
    Inventors: Yuji Kikuchi, Yutaka Okamoto, Kazutada Sasaki, Tadanori Masuda
  • Patent number: 7295507
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 20, 2006
    Date of Patent: November 13, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara