Patents by Inventor Yutaka Yamada

Yutaka Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11957300
    Abstract: An information processing apparatus (2000) detects an abnormal region (30) from a moving image frame (14). The abnormal region (30) is a region that is estimated to represent an abnormal part inside a body of a subject. The information processing apparatus (2000) generates and outputs output information based on the number of detected abnormal regions (30).
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: April 16, 2024
    Assignees: NEC CORPORATION, NATIONAL CANCER CENTER
    Inventors: Ikuma Takahashi, Maki Sano, Kimiyasu Takoh, Motoyasu Okutsu, Chiemi Tanaka, Masahiro Saikou, Hitoshi Imaoka, Kenichi Kamijo, Ryuji Hamamoto, Yutaka Saito, Masayoshi Yamada
  • Publication number: 20240115719
    Abstract: Compounds or salts thereof represented by formula (I): wherein X indicates a leaving group, Y indicates an affinity peptide having a binding region in a CH2 domain in an immunoglobulin unit comprising two heavy chains and two light chains, M indicates a trivalent group linking the carbon atom in C?O adjacent to M and the carbon atom in C?W via a main chain portion consisting of 3 to 5 carbon atoms, O indicates an oxygen atom, S indicates a sulfur atom, W indicates an oxygen atom or a sulfur atom, N3 indicates an azide group, La indicates a bond or a divalent group, and Lb indicates a bond or a divalent group; and antibodies or salts thereof which can be prepared using such a compound or salt thereof, are useful for controlling the bonding ratio of an antibody and a modifying group within a desired range.
    Type: Application
    Filed: September 8, 2023
    Publication date: April 11, 2024
    Applicant: Ajinomoto Co., Inc.
    Inventors: Tomohiro FUJII, Kei YAMADA, Yutaka MATSUDA, Ryusuke HIRAMA, Noriko HATADA, Naoko ARASHIDA
  • Publication number: 20240097590
    Abstract: A motor controller includes a first control circuit, a second control circuit, a determination circuit, and a command circuit. The first control circuit outputs a first control value based on a rule base from a command value of an angular velocity and a measured value of an angular velocity. The second control circuit outputs a second control value based on a learned model from the command value of the angular velocity and the measured value of the angular velocity. The determination circuit determines a state based on at least the second control value. The command circuit acquires and outputs a control command value from the first control value and the second control value based on a result determined by the determination circuit.
    Type: Application
    Filed: February 28, 2023
    Publication date: March 21, 2024
    Inventors: Yutaka YAMADA, Koji SUZUKI, Ken TANABE
  • Patent number: 11929294
    Abstract: A composite substrate includes a base layer formed of a composite material containing diamond and a metal, the base layer a first surface, and a second surface opposite to the first surface; a flat layer having a lower surface bonded to the first surface of the base layer, and an upper surface having a surface roughness Ra of 10 nm or less; and an insulating layer directly bonded to the upper surface of the flat layer.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: March 12, 2024
    Assignee: NICHIA CORPORATION
    Inventors: Masatsugu Ichikawa, Shoichi Yamada, Takeshi Kihara, Yutaka Matsusaka
  • Publication number: 20240069297
    Abstract: In an optical fiber cable in which an optical fiber ribbon formed by parallelly arranging a plurality of optical fibers is packaged in an internal space, a core portion of each optical fiber is made of pure quartz and an effective cross-sectional area of the core portion at a wavelength of 1,550 nm is 110 ?m2 or more and 150 ?m2 or less. The optical fiber ribbon is an optical fiber ribbon in which the optical fibers are connected by continuously applying an adhesive resin between adjacent optical fibers. An occupation ratio of the optical fiber ribbon to the internal space calculated from a ratio of a cross-sectional area of the internal space to a cross-sectional area of the packaged optical fiber ribbon is 25% or more and 55% or less.
    Type: Application
    Filed: November 10, 2021
    Publication date: February 29, 2024
    Inventors: Yutaka HASHIMOTO, Fumiaki SATO, Masashi KIKUCHI, Akira SAKURAI, Yusuke YAMADA
  • Patent number: 11890531
    Abstract: The purpose of the present invention is to provide a maintenance method for restoring the flexibility of a surface layer of a bowling ball in which the flexibility of the surface layer is lost by volatilization or elution of a plasticizer. In order to solve the above-mentioned problems, a maintenance method of bowling ball is provided, characterized in that a plasticizer is applied to a surface layer of the bowling ball.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: February 6, 2024
    Inventor: Yutaka Yamada
  • Patent number: 11574479
    Abstract: An image processing apparatus including a plurality of transfer units, a data storage, an image processing processor, and a test circuit. A plurality of captured image data are respectively assigned to the plurality of transfer units and the plurality of transfer units transfer the assigned image data. The data storage unit stores the plurality of image data which are transferred by the plurality of transfer units. The image processing processor performs image processing on the plurality of image data which are stored in the data storage unit. The test circuit tests the image processing processor in a period during which the image data are not input from the data storage unit to the image processing processor.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: February 7, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Yutaka Yamada
  • Publication number: 20220301189
    Abstract: According to one embodiment, a motion estimation device includes a first receiving circuit that receives a first input frame and a calculation circuit that performs motion estimation processing on the first input frame. The calculation circuit estimates a distance for each pixel of the first input frame and estimates a reliability of the distance for each pixel of the first input frame based on pixel information of the first input frame.
    Type: Application
    Filed: August 31, 2021
    Publication date: September 22, 2022
    Inventors: Yutaka YAMADA, Yuichi ODA, Manabu NISHIYAMA, Yutaka OKI
  • Publication number: 20220301208
    Abstract: According to one embodiment, a distance estimation device comprises a first distance estimation unit based on a first estimation method, and a second distance estimation unit based on a second estimation method different from the first estimation method. The second distance estimation unit is configured to change a part of the second estimation method according to an output of the first distance estimation unit.
    Type: Application
    Filed: September 7, 2021
    Publication date: September 22, 2022
    Inventors: Yuichi ODA, Yutaka YAMADA, Manabu NISHIYAMA, Yutaka OKI
  • Patent number: 11182311
    Abstract: According to one embodiment, a virtualization support device includes: a first processor controlling an operation of accelerators; a memory holding first information regarding a first application executed by a second processor, second information regarding a second application executed by the second processor, one or more first requests from the first application, and one or more second requests from the second application; and a management unit coupled to the first processor and the memory. The first processor performs arbitration of an order in which the accelerators execute the first and second requests, controls setting of the management unit by using the one of first and second information based on the arbitration, and causes the accelerators to execute one of the first and second requests based on the arbitration.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: November 23, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, Toshiba Electronic Devices & Storage Corporation :
    Inventors: Akira Takeda, Takeshi Kodaka, Yutaka Yamada
  • Publication number: 20210089478
    Abstract: According to one embodiment, a virtualization support device includes: a first processor controlling an operation of accelerators; a memory holding first information regarding a first application executed by a second processor, second information regarding a second application executed by the second processor, one or more first requests from the first application, and one or more second requests from the second application; and a management unit coupled to the first processor and the memory. The first processor performs arbitration of an order in which the accelerators execute the first and second requests, controls setting of the management unit by using the one of first and second information based on the arbitration, and causes the accelerators to execute one of the first and second requests based on the arbitration.
    Type: Application
    Filed: March 2, 2020
    Publication date: March 25, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, Toshiba Electronic Devices & Storage Corporation
    Inventors: Akira Takeda, Takeshi Kodaka, Yutaka Yamada
  • Patent number: 10884836
    Abstract: An arithmetic processing device according to an embodiment performs actual arithmetic processing for data inputted periodically and determination whether or not an error occurs in the actual arithmetic processing in real time. An ISP of this device includes an arithmetic processing circuit for performing image arithmetic processing for image data in moving image inputted from imaging device at each of frames, and a diagnostics control circuit and diagnostics processing circuit connected to the arithmetic processing circuit. The ISP, with these components, performs the image arithmetic processing for the image data in the moving image at each of the frames and error detection in the image arithmetic processing in real time.
    Type: Grant
    Filed: February 21, 2018
    Date of Patent: January 5, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Yutaka Yamada
  • Publication number: 20200285860
    Abstract: An image processing apparatus including a plurality of transfer units, a data storage, an image processing processor, and a test circuit. A plurality of captured image data are respectively assigned to the plurality of transfer units and the plurality of transfer units transfer the assigned image data. The data storage unit stores the plurality of image data which are transferred by the plurality of transfer units. The image processing processor performs image processing on the plurality of image data which are stored in the data storage unit. The test circuit tests the image processing processor in a period during which the image data are not input from the data storage unit to the image processing processor.
    Type: Application
    Filed: August 12, 2019
    Publication date: September 10, 2020
    Applicants: KABUSHIKI KAISHA TOSHIBA, Toshiba Electronic Devices & Storage Corporation
    Inventor: Yutaka YAMADA
  • Publication number: 20200054933
    Abstract: The purpose of the present invention is to provide a maintenance method for restoring the flexibility of a surface layer of a bowling ball in which the flexibility of the surface layer is lost by volatilization or elution of a plasticizer. In order to solve the above-mentioned problems, a maintenance method of bowling ball is provided, characterized in that a plasticizer is applied to a surface layer of the bowling ball.
    Type: Application
    Filed: August 8, 2019
    Publication date: February 20, 2020
    Inventor: Yutaka YAMADA
  • Patent number: 10513236
    Abstract: An energy absorbing member (20) is formed of an aluminum alloy extruded material having a substantially quadrangular outer shape. Straight portions of a pair of long sides of a quadrangular shape are each segmented into three side walls (21a, 21b, 21c) by two arcuate internal projections (26) that project inward. Vertices of opposing internal projections (26) are joined by a rib (25). Accordingly, the energy absorbing member (20) is configured to have a shape in which three cylindrical portions having hollow portions (24a, 24b, 24c) are joined. Arc-shaped internal projections (23) that each project inward are provided in four corners of the quadrangular shape.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: December 24, 2019
    Assignee: UACJ Corporation
    Inventors: Tomoya Yokota, Yutaka Yamada, Yoshiharu Sakai
  • Patent number: 10477357
    Abstract: A population or a population change in an particular area is accurately estimated based on the number of communication terminals existing in the area.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: November 12, 2019
    Assignee: AGOOP Corp.
    Inventor: Yutaka Yamada
  • Publication number: 20190306971
    Abstract: A circuit board is obtained by forming a wiring pattern on an insulating member. The circuit board includes a first circuit board and a second circuit board. The first circuit board is obtained by providing a first wiring pattern on a first insulating board. The first wiring pattern has a first thickness which falls within a range from the maximum allowable thickness to the minimum allowable thickness. The second circuit board is obtained by providing a second wiring pattern on a second insulating board. The second wiring pattern has a second thickness which is thinner than the minimum allowable thickness of the first wiring pattern.
    Type: Application
    Filed: February 21, 2019
    Publication date: October 3, 2019
    Applicant: FANUC CORPORATION
    Inventors: Norihiro SAIDO, Yutaka YAMADA
  • Patent number: 10279841
    Abstract: A vehicle front portion structure including: a front side member that extends in a vehicle longitudinal direction at a vehicle transverse direction outer side portion of a vehicle front portion and includes a projecting portion that projects-out toward a vehicle transverse direction outer side at an outer side wall at a front end portion; a spacer that is provided at a vehicle transverse direction outer side of the front side member and is fastened to the outer side wall at a vehicle front side of the projecting portion, and that has an adjacent portion that is adjacent to a vehicle transverse direction outer side of the projecting portion; and an engaging portion that is formed at the spacer and is disposed at a vehicle front side with respect to the projecting portion, and that engages with a front end of the projecting portion in the vehicle longitudinal direction.
    Type: Grant
    Filed: February 2, 2016
    Date of Patent: May 7, 2019
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Keita Ito, Yuji Takahashi, Ryoji Matsumoto, Hironori Kadoi, Yutaka Yamada
  • Patent number: 10269131
    Abstract: According to one embodiment, an image processing apparatus is provided with a first arithmetic unit, a second arithmetic unit, a third arithmetic unit, and a search unit. The first arithmetic unit calculates a first cost function. The first cost function represents a relation between a disparity value and a cost in a search range of a second image. The second arithmetic unit calculates a second cost function. The second cost function is a sum of first cost functions regarding a plurality of paths. The third arithmetic unit calculates a representative value of intermediate data. The intermediate data is an addition result of first cost functions regarding a first path group among the plurality of paths.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: April 23, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Yamada, Toru Sano
  • Publication number: 20190087260
    Abstract: An arithmetic processing device according to an embodiment performs actual arithmetic processing for data inputted periodically and determination whether or not an error occurs in the actual arithmetic processing in real time. An ISP of this device includes an arithmetic processing circuit for performing image arithmetic processing for image data in moving image inputted from imaging device at each of frames, and a diagnostics control circuit and diagnostics processing circuit connected to the arithmetic processing circuit. The ISP, with these components, performs the image arithmetic processing for the image data in the moving image at each of the frames and error detection in the image arithmetic processing in real time.
    Type: Application
    Filed: February 21, 2018
    Publication date: March 21, 2019
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Yutaka YAMADA