Patents by Inventor Yutaka Yamada

Yutaka Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8271853
    Abstract: A cache memory has a data holding unit having multiple cache lines each of which includes an address area, a data area and a dirty bit, and a controller which is given read data and a correction execution signal indicating whether or not error correction has been performed for the read data, the read data has been read from a memory storing error-correction-coded data, which also stores address information corresponding to the read data into the address area of any one of the multiple cache lines, stores the read data into the data area, and sets a predetermine value as the dirty bit on the basis of the correction execution signal.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: September 18, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsunori Kanai, Yutaka Yamada
  • Publication number: 20120194499
    Abstract: A flat panel display apparatus includes a plasma display panel, a power supply substrate, a signal processing substrate, a Y sustaining substrate, and an X sustaining substrate. The power supply substrate, the signal processing substrate, the Y sustaining substrate and the X sustaining substrate are arranged at a back of the plasma display panel. When viewing the plasma display panel from the back, the power supply substrate is arranged at a center portion of the plasma display panel, the Y sustaining substrate is arranged at one of a left and right side of the plasma display panel, the X sustaining substrate is arranged at the other of the left and right side, and the signal processing substrate is arranged under the X sustaining substrate. A circuit substrate other than the power supply substrate, the Y sustaining substrate, and the X sustaining substrate is arranged under the power supply substrate.
    Type: Application
    Filed: April 9, 2012
    Publication date: August 2, 2012
    Inventors: Teppei Tanaka, Yasushi Naito, Yasuhiro Tomita, Yoshiharu Yamashita, Yutaka Yamada, Kohei Miyoshi, Seiichi Sekiguchi
  • Patent number: 8217095
    Abstract: The object of the present invention is to provide an active energy ray-curable ink-jet printing ink, including: a coloring agent; a compound having an ethylenic double bond; and a photo-polymerization initiator, wherein the photo-polymerization initiator includes a compound represented by general formula (1): (wherein A represents any one of —O—, —CH2—, —CH(CH3)—, and —C(CH3)2—; and each of R1 and R2 independently represents a hydrogen atom, a methyl group, or a trimethylsilyl group), and an ?-aminoketone-based compound and/or an acyl phosphine oxide-based compound, and 40% by mass or more of the compound represented by general formula (1) is included with respect to the total photo-polymerization initiator.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: July 10, 2012
    Assignee: Dainippon Ink and Chemicals, Inc.
    Inventors: Hisao Yamaguchi, Yutaka Yamada, Naohito Saito, Osamu Oshima
  • Publication number: 20120151119
    Abstract: A virtual memory management apparatus of an embodiment is embedded in a computing machine 80 and is provided with an application program 21, an operating system 22, a volatile memory 11, and a nonvolatile memory 12. The volatile memory 11 is provided with a plurality of clean pages. The nonvolatile memory 12 is provided with a plurality of dirty pages and a page table memory unit 51. The operating system 22 is provided with a virtual memory management unit 23 which includes a page transfer unit 25.
    Type: Application
    Filed: February 13, 2012
    Publication date: June 14, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hideki Yoshida, Tatsunori Kanai, Masaya Tarui, Yutaka Yamada
  • Patent number: 8195975
    Abstract: A plurality of operation units connected in a pipeline structure performs an operation processing on data. A process control unit operates in synchronization with a system clock signal and generates a process control signal for controlling the operation units upon receiving a data notification signal that notifies the process control unit of an arrival of data from outside. A clock-control signal generating unit operates in synchronization with the system clock signal and generates a clock control signal for controlling a clock supply to each of the operation units upon receiving the process control signal.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: June 5, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Yamada, Takashi Yoshikawa, Shigehiro Asano
  • Publication number: 20120131418
    Abstract: According to one embodiment, a memory device comprises a writing device that writes data bits, check bits for error corrections, and overhead bit(s) into a memory, each bit of the overhead bit(s) corresponding to each group of bit group(s) including at least one bit of the data bits and/or the check bits, each bit of the overhead bit(s) indicating whether the corresponding bit group has been inverted, a reading unit that reads the data bits, the check bits, and the overhead bit(s) from the memory, a correcting unit that corrects an error in the data bits and overhead bit(s) read from the memory, based on the check bits, and an inverting unit that inverts the data bits contained in the bit group corresponding to the overhead bit and outputs the inverted data bits as data read from the memory when the error-corrected overhead bit indicates that inversion has been performed.
    Type: Application
    Filed: January 30, 2012
    Publication date: May 24, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masaya Tarui, Tatsunori Kanai, Yutaka Yamada, Hideki Yoshida
  • Publication number: 20120117407
    Abstract: According to one embodiment, a computer system comprises a first memory that stores a first program, a second memory that stores a second program or data, a processor, a first and a second power control circuits. The first power control circuit causes the first memory to operate at a first power consumption when detecting change of an input signal to the processor, and causes the first memory to operate at a second power consumption smaller than the first power consumption and transmits a temporary halt instruction to the processor when the execution of the first program or the second program by the processor is completed. The second power control circuit causes the second memory to operate at a third power consumption before the processor executes the second program, reads or writes the data. The second memory accepts read and write operations while operating at the third power consumption.
    Type: Application
    Filed: December 5, 2011
    Publication date: May 10, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tatsunori Kanai, Yutaka Yamada, Hideki Yoshida, Masaya Tarui
  • Patent number: 8159622
    Abstract: Space is decreased in the direction of thickness on a side of a substrates mounted on a back of a flat panel display to adapt requirement for increasing and thinning its size, and most flat panel displays forcibly radiate heat with a fan provided thereon. The present invention provides a flat panel display having fewer heat radiating fans to secure a channel for causing a heat radiating air to flow. Portions where electronic circuit device on a back of a display panel are mounted are divided into three: left; center; and right portions; with a main frame as a border, the electronic circuit device are constructed of four module substrates, the substrate which is the greatest in heating value in the four module substrates (hereinafter referred to as a substrate) is arranged in the center portion and the substrates which are the smallest and the second smallest in heating value therein are arranged in the same portion.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: April 17, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Teppei Tanaka, Yasushi Naito, Yasuhiro Tomita, Yoshiharu Yamashita, Yutaka Yamada, Kohei Miyoshi, Seiichi Sekiguchi
  • Publication number: 20120028753
    Abstract: An electric power tool includes a cylindrical reducer case accommodating the speed reduction mechanism. The speed reduction mechanism includes a planetary gear train and a movable member which is axially slidable to be engaged with or disengaged from the planetary gear train. The electric power tool includes the reducer case including a slide hole formed through a sidewall of the reducer case and axially extended and a rotary plate which is rotatable around a periphery of the reducer case about the axis, the rotary plate including an operation slot formed axially obliquely and overlapped with the slide hole; a supporting member radially outwardly protruded from the movable member and extended through the slide hole and the operation slot; and a biasing unit for applying a pressing force to the supporting member in a moving direction of the supporting member when the rotary plate is rotated to a position.
    Type: Application
    Filed: June 22, 2011
    Publication date: February 2, 2012
    Applicant: Panasonic Electric Works Power Tools Co., Ltd.
    Inventors: Masatoshi Atsumi, Yutaka Yamada, Kenichiro Inagaki
  • Publication number: 20120026784
    Abstract: According to an aspect of embodiments, there is provided a random number generating circuit including at least one magnetic tunnel junction (MTJ) element and a control circuit. The MTJ element comes into a high resistance state corresponding to a first logical value and also comes into a low resistance state corresponding to a second logical value different from the first logical value. The control circuit supplies the MTJ element with a first current for stochastically reversing the MTJ element from the high resistance state to the low resistance state when the MTJ element is in the high resistance state, and supplies the MTJ element with a second current for stochastically reversing the MTJ element from the low resistance state to the high resistance state when the MTJ element is in the low resistance state.
    Type: Application
    Filed: August 9, 2011
    Publication date: February 2, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tatsunori Kanai, Masaya Tarui, Yutaka Yamada
  • Publication number: 20120006574
    Abstract: An electric power tool includes a motor; a speed reducer for transferring a rotational power of the motor at a reduced speed; and a reduction ratio changing unit for changing a reduction ratio of the speed reducer. The speed reduction mechanism includes an axially slidable changeover member and a gear member, the changeover member being engaged with or disengaged from the gear member depending on an axial slide position thereof. The reduction ratio changing unit includes a shift actuator for axially sliding the changeover member, a driving state detector for detecting a driving state of the motor, a slide position detector for detecting a slide position of the changeover member and a controller for driving the shift actuator and for changing a drive control of the shift actuator depending on detection results of the slide position detector unit and the driving state detector unit, respectively.
    Type: Application
    Filed: June 28, 2011
    Publication date: January 12, 2012
    Applicant: Panasonic Electric Works Power Tools Co., Ltd.
    Inventors: Masatoshi ATSUMI, Kenichiro Inagaki, Tadashi Arimura, Hiroyuki Kaizo, Yutaka Yamada
  • Publication number: 20120010043
    Abstract: An electric power tool includes a motor; a speed reducer for transferring a rotational power of the motor at a reduced speed; and a reduction ratio changing unit for changing a reduction ratio of the speed reducer. The speed reduction mechanism includes an axially slidable changeover member and a gear member, the changeover member being engaged with or disengaged from the gear member depending on an axial slide position thereof. The reduction ratio changing unit includes a shift actuator for axially sliding the changeover member, a driving state detector for detecting a driving state of the motor, a slide position detector for detecting a slide position of the changeover member and a controller for driving the shift actuator and for temporarily decreasing or increasing a rotational power of the motor depending on detection results of the driving state detector and the slide position detector, respectively.
    Type: Application
    Filed: June 22, 2011
    Publication date: January 12, 2012
    Applicant: Panasonic Electric Works Power Tools Co., Ltd.
    Inventors: Kenichirou Inagaki, Yutaka Yamada, Tadashi Arimura, Masatoshi Atsumi, Hiroyuki Kaizo
  • Patent number: 8083007
    Abstract: An electric power tool includes a motor, a speed reducer unit arranged to deliver the rotational power of the motor and provided with gears, a housing arranged to accommodate the motor and the speed reducer unit, and a speed changing unit for changing a gear reduction ratio of the speed reducer unit. The speed changing unit is arranged in such a position as to be operable outside the housing. The speed changing unit includes an operation lever slidingly operable in a speed changing direction when pushed, an operation detector unit for detecting the operation lever to control electric power supplied to the motor, a shift unit for changing the gear reduction ratio of the speed reducer unit in response to sliding movement of the operation lever, and a slide restraint unit for restraining the sliding operation of the operation lever until the operation detector unit detects the operation lever.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: December 27, 2011
    Assignee: Panasonic Electric Works Co., Ltd.
    Inventors: Kenichiro Inagaki, Fumiaki Sekino, Yutaka Yamada
  • Patent number: 8085259
    Abstract: The present invention improves the reliability of a display apparatus by suppressing the temperature rise of the display apparatus mounted on a wall. The display apparatus is provided with a wall mount switch to detect a wall mount member if the wall mount member is attached to the rear of the display apparatus. If it is detected by the wall mount switch that the display apparatus is mounted on a wall, the display power supplied to a display unit is set lower than normal by a power controller. This suppresses the temperature rise of the apparatus mounted on a wall.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: December 27, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Hidenao Kubota, Yuzo Nishinaka, Yutaka Yamada
  • Patent number: 8066234
    Abstract: A large-screen image display apparatus includes a stand for supporting the display module, which has a leg portion. The leg portion of the stand is inserted into the main frame. The leg portion and the main frame are fastened together at a first screw hole formed through the leg portion. In addition, the leg portion and a fixing part of the outer frame are fastened together at a second screw hole formed through the leg portion. The first screw hole and the second screw hole are formed on different faces of the leg portion and at different heights. This can provide a large-screen image display apparatus with a less-wobble, high-safety, high-reliability, and low-cost stand-attaching structure.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: November 29, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Mika Ri, Masahiro Yamamoto, Yutaka Yamada, Kohei Miyoshi, Teppei Tanaka
  • Publication number: 20110289339
    Abstract: A semiconductor device performs operation in synchronization with a certain clock signal. The semiconductor device includes a control unit for outputting operation control information, a storage unit for storing data, a first operation unit for performing operation on first data in accordance with first operation control information, and a second operation unit for performing operation on second data in accordance with second operation control information. The first operation unit includes a plurality of operation circuits. The number of logic gates constituting the entire operation circuits is m. The second operation unit includes at least one operation circuit in which the number of logic gates is n (n>m). Each of the total delay of the operation unit or the total delay of the operation unit is set at a value equal to or less than the cycle of the clock signal.
    Type: Application
    Filed: March 17, 2011
    Publication date: November 24, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yohei Hasegawa, Yutaka Yamada, Takashi Yoshikawa, Shigehiro Asano
  • Publication number: 20110276858
    Abstract: A memory system comprises an encoding processing circuit 100 that performs redundant encoding process on target data Din to be written to thereby generate data RDin such that the number of bits having a predetermined value is half or less than the total number of bits, and a memory 120 to which the data RDin generated by the encoding processing circuit are written.
    Type: Application
    Filed: June 10, 2011
    Publication date: November 10, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masaya Tarui, Tatsunori Kanai, Yutaka Yamada
  • Publication number: 20110218113
    Abstract: Provided is a substrate for superconductive film formation, which includes a metal substrate, and an oxide layer formed directly on the metal substrate, containing chromium oxide as a major component and having a thickness of 10-300 nm and an arithmetic average roughness Ra of not more than 50 nm. A method of manufacturing a substrate for superconductive film formation, which includes forming an oxide layer directly on a metal substrate, the oxide layer containing chromium oxide as a major component and having a thickness of 10-300 nm and an arithmetic average roughness Ra of not more than 50 nm.
    Type: Application
    Filed: May 20, 2011
    Publication date: September 8, 2011
    Applicants: INTERNATIONAL SUPERCONDUCTIVITY TECHNOLOGY CENTER, FURUKAWA ELECTRIC CO., LTD, JAPAN FINE CERAMICS CENTER
    Inventors: Seiki Miyata, Hiroyuki Fukushima, Reiji Kuriki, Akira Ibi, Masateru Yoshizumi, Akio Kinoshita, Yutaka Yamada, Yuh Shiohara, Ryuji Yoshida, Takeharu Kato, Tsukasa Hirayama
  • Publication number: 20110210024
    Abstract: There is provided a package structure for packing a flat display unit which improves workability in taking a flat display unit out of a packing box. A lower cushioning material which supports a display portion of the flat display unit from below has a manual insertion portion so that the display portion can be held at a portion close to a lifting person's body when the display portion is taken out of a lower part of the packing box. A reinforcing rib is provided on a front side of the lower cushioning material to prevent damage to the lower cushioning material due to a reduction in strength. To prevent the lower cushioning material from being taken out together with the display portion when the display portion is taken out, a recess is provided in the lower cushioning material so that the recess is caught on a bending portion in the lower part when the display portion is taken out.
    Type: Application
    Filed: October 27, 2010
    Publication date: September 1, 2011
    Inventors: Teppei TANAKA, Yutaka Yamada, Shuji Kato
  • Patent number: 7980320
    Abstract: An electric power tool includes a motor, a reduction mechanism, a driving unit, a bearing unit, a housing, a speed changing unit, a power switch, and an operation detecting unit which detects a reduction ratio changing operation performed by the speed changing unit to control electric power supplied to the motor. The reduction mechanism transfers the rotating power of the motor, and the driving unit transfers the rotating power of the reduction mechanism to a tip end tool. The bearing unit rotatably supports the driving unit, and the housing accommodates the motor, the reduction mechanism, the driving unit and the bearing unit. The speed changing unit changes a reduction ratio of the reduction mechanism, a power switch for turning on and off a power source of the motor.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: July 19, 2011
    Assignee: Panasonic Electric Works Co., Ltd.
    Inventors: Kenichiro Inagaki, Yutaka Yamada, Fumiaki Sekino