Abstract: The present disclosure provides a method for signaling configuration. The method includes: signaling, by a base station, a first special subframe configuration and a second special subframe configuration to a User Equipment (UE) via a first signaling message and a second signaling message. The first special subframe configuration is determined by the base station and the UE based on the first signaling message, and the second special subframe configuration is determined by the base station and the UE based on the first signaling message and the second signaling message or based on the second signaling message. With the above method, the problem associated with low multiplexing capacity of Sounding Reference Signals (SRSs) can be solved and the multiplexing capacity of SRSs can be improved.

Abstract: The invention provides a method of transmitting a sounding reference signal (SRS) and a device utilizing the same. The method comprises: a user equipment transmits, to a base station, a sounding reference signal (SRS) on a time domain symbol in a special subframe, wherein the time domain symbol comprises one or more time domain symbols of time domain symbols occupying an uplink pilot time slot; and a number of the time domain symbols occupying the uplink pilot time slot is N, N is an integer, and 3?N?12. The embodiment resolves a problem of an incomplete scheme of transmitting an SRS on a time domain symbol, and realizes transmission of an SRS on increased time domain symbols.

Abstract: A method, system, and computer program product for generating a three-dimensional image from a captured two-dimensional image. The method includes capturing, via a wide-angle camera sensor of an image capturing device, a two-dimensional image of a scene. The method further includes determining depth information of the scene. The method further includes generating, from the depth information, a depth map that depicts a depth of the scene in a third dimension. The method further includes generating a wide-angle three-dimensional image by merging the depth map and the two-dimensional image.

Abstract: The present disclosure provides a method and device for configuring a channel state information reference signal (CSI-RS), and a method and device for parsing CSI-RS. The configuration method includes: configuring configuration information of the CSI-RS by a base station; generating a signaling carrying the configuration information of the CSI-RS by the base station; and transmitting the signaling by the base station. The configuration information includes at least one of: a number of CSI-RS ports, a number K of components of a pilot resource pattern, a number N of ports of the components of the pilot resource pattern, and a CSI-RS port-sorting mode, where the CSI-RS port-sorting mode includes M types of candidate port-sorting mode, and M, K, and N are positive integers.

Abstract: Provided are a method, apparatus and system for acquiring a codebook, the method including: generating, by a base station, a codebook corresponding to Nt ports and r layers transmission according to a first preset condition, the codebook being for feeding back a preceding matrix, the first preset condition being a common set condition between the base station and a terminal, Nt being a port number, and r being a transmission layer number; determining, by the base station, a signaling indication method for selecting a codebook subset corresponding to the codebook according to a second preset condition; and acquiring, by the base station, Codebook Subset Selection (CSS) signaling for selecting the codebook subset correspondingly according to the signaling indication method, and notifying the selected codebook subset to a terminal through the CSS signaling.

Abstract: Information sending, information determining and relationship determining methods and devices are provided. According to the information sending method, a base station sends M parameter sets via high-layer signaling, wherein M>=1, M is a positive integer, each parameter set includes quasi-co-location Non-Zero Power (NZP) Channel State Information Reference Signal (CSI-RS) indication information, and the quasi-co-location NZP CSI-RS indication information is used by a terminal to acquire a large-scale characteristic of a channel; and when M>1, the base station indicates, via a physical-layer control signaling, parameter set selection information of a subframe on which the physical-layer control signaling is sent.

Abstract: A method and system for processing a downlink pilot signal is disclosed. Herein, the method includes: a receiving end detecting downlink measurement pilot ports to obtain a received signal corresponding to each downlink measurement pilot port on each receiving antenna; performing screening on the downlink measurement pilot ports according to the received signals; calculating a receiving weight vector of each downlink measurement pilot port, and using an uplink precoding weight vector, calculated and obtained by combining the receiving weight vector with uplink and downlink operating frequencies, for data precoding; or, using N uplink precoding weight vectors, calculated and obtained by combining the receiving weight vector with uplink and downlink operating frequencies, for uplink pilot precoding, where N is the number of uplink precoding pilots transmitted, and N is an integer which is greater than or equal to 1. The above technical solution can effectively reduce pilot overhead in communication systems.

Abstract: The present invention provides a high-precision analog-to-digital converter, includes a redundant weight capacitor array, a comparator, a code reestablishment circuit, a weight storage circuit and a control logic circuit. The redundant weight capacitor array collects input voltages and generates output voltages in a sampling stage. The comparator compares the output voltages of the redundant weight capacitor array. The code reestablishment circuit calculates an output code of the successive approximation type analog-to-digital converter according to the comparator output result and a capacitor weight in the weight storage circuit. The weight storage circuit stores the capacitor weight. The control logic circuit controls the sampling and conversion stages of the redundant weight capacitor array. The present invention also provides a DNL-based performance improvement method adapted to the analog-to-digital converter.

Abstract: Disclosed are an inter-carrier frequency cooperation method and device. According to the method, description information of a second carrier frequency is determined and a communication node sends the description information of the second carrier frequency to a second communication node via a first carrier frequency. The description information of the second carrier frequency includes one of: sending beam information of the second carrier frequency, pilot information of the second carrier frequency, control channel information of the second carrier frequency, data channel information of the second carrier frequency, Hybrid Automatic Repeat Request (HARQ) timing information of the second carrier frequency and working time information of the second communication node on the second carrier frequency.

Abstract: Disclosed herein are methods for use in treating cancer comprising administering at least one cancer sternness inhibitor, for example, at least one STAT3 pathway inhibitor such as 2-acetylnaphtho [2, 3-b] furan-4, 9-dione, in order to sensitize or re-sensitive a cancer that is naive, resistant, or/and refractory to at least one immunotherapeutic agent, such as at least one immune checkpoint modulator.

Abstract: A method and device for configuring channel information are provided. The method includes: a base station configures Q Channel State Information (CSI) measurement threads for a CSI process, wherein Q is an integer greater than or equal to 2; and the base station configures P1 channel measurement reference signals and P2 interference measurement resources for the Q CSI measurement threads, wherein the P1 channel measurement reference signals are used to perform channel measurement on the Q CSI measurement threads, and the P2 interference measurement resources are used to perform interference measurement on the Q CSI measurement threads, P1 and P2 being integers greater than zero.

Abstract: Provided are a method and apparatus for determining the quantity of channel quality indicators (CQI). The method comprises: a terminal determining the quantity of layers or the quantity of CQIs to be fed back according to at least one piece of the following pieces of information: the quantity of ports of a channel state information referenced signal (CSI-RS), the quantity of ports of a downlink demodulation reference signal (DMRS), and a configuration signalling of a base station.

Abstract: An image sensor pixel noise measurement circuit includes a pixel array on an integrated circuit chip. The pixel array includes a plurality of pixels including a first pixel to output a first image data signal, and a second pixel to output a second image data signal. A noise amplification circuit on the integrated circuit chip is coupled to receive the first and second image data signals from the pixel array. The noise amplification circuit is coupled to output an amplified differential noise signal in response to the first and second image data signals received from the pixel array. A fast Fourier transform (FFT) analysis circuit on the integrated circuit chip is coupled to transform the amplified differential noise signal output by the noise amplification circuit from a time domain to a frequency domain to analyze a pixel noise characteristic of the pixel array.

Abstract: The present invention provides a high-precision analog-to-digital converter, includes a redundant weight capacitor array, a comparator, a code reestablishment circuit, a weight storage circuit and a control logic circuit. The redundant weight capacitor array collects input voltages and generates output voltages in a sampling stage. The comparator compares the output voltages of the redundant weight capacitor array. The code reestablishment circuit calculates an output code of the successive approximation type analog-to-digital converter according to the comparator output result and a capacitor weight in the weight storage circuit. The weight storage circuit stores the capacitor weight. The control logic circuit controls the sampling and conversion stages of the redundant weight capacitor array. The present invention also provides a DNL-based performance improvement method adapted to the analog-to-digital converter.

Abstract: The present invention provides a frequency-compensated transconductance amplifier, includes an input stage consisting of NMOS transistors M1 and M2, a first-stage active load consisting of PMOS transistors M3 and M4, a first-stage tail current source consisting of a constant current source Iss, a second-stage input transistor consisting of a PMOS transistor M5, a second-stage constant current source consisting of an NMOS transistor M6, a load capacitor consisting of a capacitor CL, and a frequency compensation network formed by sequentially connecting a gain stage GAIN, a compensating resistor Rc and a compensating capacitor Cc in series.

Abstract: In example implementations, a method for producing a thin film coating is provided. The method includes pre-treating a substrate, placing the substrate in a bath comprising at least phosphoric acid and sulphuric acid to produce a thin anodized layer, rinsing the thin anodized layer in a solution, plating a surface of the thin anodized layer in an electro deposition bath following a plating current profile for a predetermined period, and increasing the plating current to the recommended bath plating current to produce the thin film coating having a desired initial coating thickness.

Abstract: An image sensor pixel noise measurement circuit includes a pixel array on an integrated circuit chip. The pixel array includes a plurality of pixels including a first pixel to output a first image data signal, and a second pixel to output a second image data signal. A noise amplification circuit on the integrated circuit chip is coupled to receive the first and second image data signals from the pixel array. The noise amplification circuit is coupled to output an amplified differential noise signal in response to the first and second image data signals received from the pixel array. A fast Fourier transform (FFT) analysis circuit on the integrated circuit chip is coupled to transform the amplified differential noise signal output by the noise amplification circuit from a time domain to a frequency domain to analyze a pixel noise characteristic of the pixel array.

Abstract: Embodiments of the present disclosure provide a reference signal information feedback method, apparatus and terminal. The method includes: a terminal determines a reference signal parameter of an uplink measurement reference signal and/or a downlink measurement reference signal, and the terminal feeds the determined reference signal parameter back to a base station.

Abstract: A method and system for processing a downlink pilot signal is disclosed. Herein, the method includes: a receiving end detecting downlink measurement pilot ports to obtain a received signal corresponding to each downlink measurement pilot port on each receiving antenna; performing screening on the downlink measurement pilot ports according to the received signals; calculating a receiving weight vector of each downlink measurement pilot port, and using an uplink precoding weight vector, calculated and obtained by combining the receiving weight vector with uplink and downlink operating frequencies, for data precoding; or, using N uplink precoding weight vectors, calculated and obtained by combining the receiving weight vector with uplink and downlink operating frequencies, for uplink pilot precoding, where N is the number of uplink precoding pilots transmitted, and N is an integer which is greater than or equal to 1. The above technical solution can effectively reduce pilot overhead in communication systems.

Abstract: The invention provides a clock delay adjusting circuit based on edge addition and an integrated chip thereof.