Abstract: A method for preparing an alternating arrangement silver-copper lateral composite ingot, including: using a concave roller set; manufacturing a copper frame having a fixed width according to a negative tolerance of a width of the grooves of the concave roller, and corresponding copper bars and silver bars, and performing a surface into the copper frame to form a composite blank, i.e., a composite ingot. A method for preparing an alternating arrangement silver-copper lateral composite strip is further provided, and the silver-copper lateral composite ingot prepared by the method for preparing the alternating arrangement silver-copper lateral composite ingot is used to prepare the silver-copper lateral composite strip.

Abstract: Systems and methods for a process chamber that decreases the severity and occurrence of substrate defects due to loosened scale is discussed herein. A gas distribution assembly is disposed in a process chamber and includes a faceplate with a plurality of apertures formed therethrough and a second member. The faceplate is coupled to the second member which is configured to couple to the faceplate to reduce an exposed area of the faceplate and minimize an available area for material buildup during the release of gas into the process chamber. The second member is further configured to improve the glow of precursors into the process chamber. The gas distribution assembly can be heated before and during process chamber operations, and can remain heated between process chamber operations.

Abstract: Systems and methods for depositing a film in a PECVD chamber while reducing residue buildup in the chamber. In some embodiments disclosed herein, a processing chamber includes a chamber body, a substrate support, a showerhead, and one or more heaters configured to heat the showerhead. In some embodiments, the processing chamber includes a controller.

Abstract: A faceplate for a processing chamber is disclosed. The faceplate has a body with a plurality of apertures formed therethrough. A flexure is formed in the body partially circumscribing the plurality of apertures. A cutout is formed through the body on a common radius with the flexure. One or more bores extend from a radially inner surface of the cutout to an outer surface of the body. A heater is disposed between flexure and the plurality of apertures. The flexure and the cutout are thermal chokes which limit heat transfer thereacross from the heater.

Abstract: Embodiments herein relate to apparatus for gas distribution in a processing chamber. More specifically, aspects of the disclosure relate to a ceramic faceplate. The faceplate generally has a ceramic body. A recess is formed in an upper surface of the faceplate body. A plurality of apertures is formed in the recess through the faceplate. A heater is optionally disposed in the recess to heat the faceplate.

Abstract: Embodiments herein generally relate to gas distribution apparatuses. In one aspect, the disclosure relates to a faceplate having a plurality of apertures therethrough. Thermal chokes are disposed on the faceplate radially outward of the apertures. Seals are disposed at distal ends of the thermal chokes and are thermally separated from a body of the faceplate by the thermal chokes.

Abstract: Embodiments herein relate to an apparatus for use in a substrate processing chamber is disclosed herein. The apparatus has a faceplate, a support member, and a spacer. A plurality of apertures is formed through the faceplate. The faceplate is coupled to and supported by the support member. The spacer is further coupled to the support member.

Abstract: Systems and methods for depositing a film in a PECVD chamber while reducing residue buildup in the chamber. In some embodiments disclosed herein, a processing chamber includes a chamber body, a substrate support, a showerhead, and one or more heaters configured to heat the showerhead. In some embodiments, the processing chamber includes a controller.

Abstract: Embodiments herein relate to gas distribution apparatuses. In one aspect, the disclosure herein relates to a showerhead including a body having an upper surface and a lower surface. A thermal choke is disposed adjacent a perimeter of the body. The thermal choke includes a plurality of interleaved channels. One or more apertures are disposed between the upper surface and the lower surface of the body.

Abstract: A processing system processes transactions between users and merchant systems. The processing system extracts, for a group of transactions, features from each user transaction and generates, for each feature, a feature vector representing each transaction of the group of transactions. The processing system computes, for each feature vector shared between transactions, a similarity between each transaction and all other transactions of the group of transactions. The processing system clusters the transactions represented by the feature vectors via a hierarchical clustering algorithm based on the similarity values. The processing system, for each cluster of transactions, determines a volume of the cluster over time. For each cluster, the payment processing system determines whether the change in the volume of the cluster over time is anomalous or normal. If a cluster experienced anomalous growth, the payment processing system identifies the cluster as a potential new fraudulent transaction pattern.

Abstract: A pedestal is provided that includes a body, a heater embedded in the body, a support pocket formed within the body having a surface disposed in a first plane, a peripheral surface disposed in a second plane surrounding the support pocket, and a plurality of centering tabs positioned between the support pocket and the peripheral surface, each of the centering tabs having a surface disposed in a third plane that is between both of the first and second planes.

Abstract: In one embodiment, a method for converting an analog input value to a digital output value is disclosed. A successive approximation is performed. The analog input is quantized to a first quantized value, which is converted to a first analog value using a DAC. The first analog value is subtracted from the analog input value to form a first residue. The first residue is quantized to form a second quantized value, and a second residue is formed by converting the second quantized value to a second analog value using the DAC and subtracting the second analog value from the first residue value. The second residue is then quantized to form a third quantized value. The first, second and third quantized values are converted into a digital output value. The first, second and third quantized values each have at least three levels.

Abstract: The present disclosure generally relates to predistortion that compensates for non-linearity of a power amplifier as well as short-term and long-term memory effects of the power amplifier. In one embodiment, a transmitter includes a power amplifier that amplifies a power amplifier input signal to provide a power amplifier output signal, a predistortion sub-system that effects predistortion of the power amplifier input signal to compensate for non-linearity of the power amplifier and memory effects of the power amplifier, and a adaptation sub-system that adaptively configures the predistortion sub-system. The predistortion sub-system includes a memory-less predistortion component that compensates for the non-linearity of the power amplifier, a Finite Impulse Response (FIR) filter that compensates for short-term memory effects of the power amplifier, and an Infinite Impulse Response (IIR) filter that compensates for long-term memory effects of the power amplifier.

Abstract: One or more embodiments of a method and apparatus taught herein provide a predistortion system to compensate for the non-linearity of a power amplifier. The system includes an outer predistorter, an inner predistorter, and a first adaptation circuit. The predistorter predistorts an input signal to generate a first output signal, and uses a first memory model that models power amplifier memory effects within a first range of time constants. The inner predistorter predistorts the first output signal to generate a second output signal, and uses a second memory model that models power amplifier memory effects within a second range of time constants that is greater than the first range of time constants. The second output signal is provided as an input to the power amplifier, and the first adaptation circuit adapts the outer predistorter responsive to feedback from the power amplifier.

Abstract: In one embodiment, a method for converting an analog input value to a digital output value is disclosed. A successive approximation is performed. The analog input is quantized to a first quantized value, which is converted to a first analog value using a DAC. The first analog value is subtracted from the analog input value to form a first residue. The first residue is quantized to form a second quantized value, and a second residue is formed by converting the second quantized value to a second analog value using the DAC and subtracting the second analog value from the first residue value. The second residue is then quantized to form a third quantized value. The first, second and third quantized values are converted into a digital output value. The first, second and third quantized values each have at least three levels.

Abstract: One or more embodiments of a method and apparatus taught herein provide a predistortion system to compensate for the non-linearity of a power amplifier. The system includes an outer predistorter, an inner predistorter, and a first adaptation circuit. The predistorter predistorts an input signal to generate a first output signal, and uses a first memory model that models power amplifier memory effects within a first range of time constants. The inner predistorter predistorts the first output signal to generate a second output signal, and uses a second memory model that models power amplifier memory effects within a second range of time constants that is greater than the first range of time constants. The second output signal is provided as an input to the power amplifier, and the first adaptation circuit adapts the outer predistorter responsive to feedback from the power amplifier.

Abstract: In one embodiment, a method for converting an analog input value to a digital output value is disclosed. A successive approximation is performed. The analog input is quantized to a first quantized value, which is converted to a first analog value using a DAC. The first analog value is subtracted from the analog input value to form a first residue. The first residue is quantized to form a second quantized value, and a second residue is formed by converting the second quantized value to a second analog value using the DAC and subtracting the second analog value from the first residue value. The second residue is then quantized to form a third quantized value. The first, second and third quantized values are converted into a digital output value. The first, second and third quantized values each have at least three levels.

Abstract: The present disclosure generally relates to predistortion that compensates for non-linearity of a power amplifier as well as short-term and long-term memory effects of the power amplifier. In one embodiment, a transmitter includes a power amplifier that amplifies a power amplifier input signal to provide a power amplifier output signal, a predistortion sub-system that effects predistortion of the power amplifier input signal to compensate for non-linearity of the power amplifier and memory effects of the power amplifier, and a adaptation sub-system that adaptively configures the predistortion sub-system. The predistortion sub-system includes a memory-less predistortion component that compensates for the non-linearity of the power amplifier, a Finite Impulse Response (FIR) filter that compensates for short-term memory effects of the power amplifier, and an Infinite Impulse Response (IIR) filter that compensates for long-term memory effects of the power amplifier.

Abstract: In one embodiment, a method for converting an analog input value to a digital output value is disclosed. A successive approximation is performed. The analog input is quantized to a first quantized value, which is converted to a first analog value using a DAC. The first analog value is subtracted from the analog input value to form a first residue. The first residue is quantized to form a second quantized value, and a second residue is formed by converting the second quantized value to a second analog value using the DAC and subtracting the second analog value from the first residue value. The second residue is then quantized to form a third quantized value. The first, second and third quantized values are converted into a digital output value. The first, second and third quantized values each have at least three levels.

Abstract: For high resolution resistor string DACs, a resistor string is placed in an array of columns and rows, each resistor tap is connected to a switch network, and a decoder is used to select switches to be closed such that sub-DAC voltage comes from the resistor taps connected to the selected switches. The voltages from each row of the resistor string are fed into a multiplexer, wherein the multiplexer produces an output voltage. A method and apparatus are disclosed for implementing the reflective nature of Gray code to design a DAC such that all the switches in a column of the resistor string may be controlled with only one control signal, thereby reducing extra routing costs, surface area, and dynamic power consumed by the circuit.