Patents by Inventor Yuya Shiozaki

Yuya Shiozaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140085242
    Abstract: Discharge for detecting the position coordinates of an electronic pen is caused stably, and the position coordinates are detected accurately. For this purpose, in a driving method of an image display device, an image display subfield, a y-coordinate detection subfield, and an x-coordinate detection subfield are set in one field. In the y-coordinate detection subfield, a y-coordinate detection voltage of positive voltage is applied to data electrodes and y-coordinate detection pulses of negative polarity are sequentially applied to the scan electrodes. In the x-coordinate detection subfield, an x-coordinate detection voltage of negative voltage is applied to scan electrodes and x-coordinate detection pulses of positive polarity are sequentially applied to data electrodes.
    Type: Application
    Filed: August 6, 2012
    Publication date: March 27, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Takateru Sawada, Takahiko Origuchi, Yuya Shiozaki, Kazuaki Sakata
  • Publication number: 20130307832
    Abstract: A stable address operation is performed also when a plasma display panel having a high definition and large screen is driven. For this purpose, a driving method of a plasma display panel is provided. The panel is driven by forming one field using a plurality of subfields each of which has an address period and a sustain period in which sustain pulses varying from a base potential to a voltage at which a sustain discharge is caused in the discharge cell having undergone the address discharge are applied to the display electrode pairs. In the driving method, after generation of the final sustain pulse in the sustain period, an up-ramp waveform voltage which increases from the base potential to a predetermined voltage is applied to the scan electrodes. The predetermined voltage is set lower than the voltage of the sustain pulses.
    Type: Application
    Filed: January 25, 2012
    Publication date: November 21, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Yuya Shiozaki, Takahiko Origuchi, Ayuhiko Saito, Yuichi Sakai, Yuki Imai
  • Publication number: 20130278649
    Abstract: In the plasma display apparatus, address discharge is caused stably. For this purpose, one of a forced initializing operation and a selective initializing operation is performed in the initializing period. Then, one field includes a specific-cell initializing subfield having an initializing period in which a forced initializing operation is performed in a specific discharge cell and a selective initializing operation is performed in the other discharge cells. In the address period of the specific-cell initializing subfield, the period in which a scan pulse and an address pulse are simultaneously applied to a discharge cell having undergone the selective initializing operation in the initializing period of the specific-cell initializing subfield is made longer than the period in which a scan pulse and an address pulse are simultaneously applied to a discharge cell having undergone the forced initializing operation in the initializing period of the specific-cell initializing subfield.
    Type: Application
    Filed: December 22, 2011
    Publication date: October 24, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Ayuhiko Saito, Takahiko Origuchi, Yuya Shiozaki, Naoyuki Tomioka, Hidehiko Shoji
  • Publication number: 20130241972
    Abstract: In a plasma display apparatus, contrast is enhanced and a stable address discharge is caused. For this purpose, one of a forced initializing operation and a selective initializing operation is performed in initializing periods. A specified-cell initializing subfield and a selective initializing subfield are set in one field. In the specified-cell initializing subfield, the forced initializing operation is performed on specified discharge cells and the selective initializing operation is performed on the other discharge cells. In the selective initializing subfield, the selective initializing operation is performed on all the discharge cells. In the selective initializing period, a down-ramp waveform voltage is applied to the scan electrodes and a positive voltage is applied to the data electrodes. In the selective initializing subfield, based on the load calculated in the address period of the immediately preceding subfield, the minimum voltage of the down-ramp waveform voltage is controlled.
    Type: Application
    Filed: December 1, 2011
    Publication date: September 19, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Takahiko Origuchi, Yuya Shiozaki, Naoyuki Tomioka, Hidehiko Shoji
  • Publication number: 20130222358
    Abstract: Image display quality in the plasma display apparatus can be enhanced by allowing a stable address operation. For this purpose, the plasma display apparatus includes a scan electrode driver circuit. The scan electrode driver circuit generates driving voltages to be used in a subfield method and applies the driving voltages to scan electrodes. At the end of each sustain period, the scan electrode driver circuit performs the following operation. The scan electrodes are applied with a first ramp waveform voltage that rises from a base electric potential to a first electric potential. Subsequently, the electric potential of the scan electrodes is set to a second electric potential equal to or lower than the first electric potential. Subsequently, the scan electrodes are applied with a second ramp waveform voltage that rises from the second electric potential to a third electric potential higher than the first electric potential.
    Type: Application
    Filed: July 29, 2011
    Publication date: August 29, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Takahiko Origuchi, Hidehiko Shoji, Yuya Shiozaki, Ayuhiko Saito
  • Publication number: 20130176294
    Abstract: In the plasma display apparatus, accidental discharge is prevented from occurring in a second discharge cell. For this purpose, in driving a plasma display panel having first data electrodes and second data electrodes that are arranged in parallel with the first data electrodes in a region outside the region where the plurality of first data electrodes are arranged, first voltage is set to be higher than second voltage in at least one subfield. Here, it is assumed that the first voltage is the voltage derived by subtracting the voltage applied to the first data electrodes from the voltage applied to the second data electrodes when down-ramp waveform voltage is applied to scan electrodes in the initializing period, and the second voltage is the voltage derived by subtracting the low-voltage-side voltage of the address pulse applied to the first electrodes from the voltage applied to the second data electrodes in the address period.
    Type: Application
    Filed: October 12, 2011
    Publication date: July 11, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Takahiko Origuchi, Yuya Shiozaki, Ayuhiko Saito, Hidehiko Shoji
  • Patent number: 8421713
    Abstract: It is an object to provide a driving method of a plasma display panel, whereby a dark contrast can be improved while suppressing an erroneous discharge. In a resetting step in a first unit display period, while a first reset pulse having a predetermined peak electric potential is applied to one of first row electrodes of row electrode pairs formed in the PDP, a second reset pulse having a peak electric potential smaller than that of the first reset pulse is applied to the other of the first row electrodes. In the resetting step in a second unit display period subsequent to the first unit display period, a second reset pulse is applied to each of the one and the other of the first row electrodes.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: April 16, 2013
    Assignee: Panasonic Corporation
    Inventors: Kazuo Yahagi, Mitsuhiro Ishizuka, Yuya Shiozaki, Shunsuke Itakura, Kazuhiro Kanai, Hajime Homma, Yoshichika Sato, Hikaru Takahashi
  • Publication number: 20130016194
    Abstract: The shutter glasses normally control a right-eye shutter and left-eye shutter even if a control signal to be received is temporarily missed. The image display section displays an image by alternately repeating a right-eye field and a left-eye field, and transmits first control signals synchronously with the right-eye field and left-eye field. The shutter glasses receive the first control signals, and have a right-eye shutter and left-eye shutter for transmitting and blocking visible light. The shutter glasses include a shutter control circuit that stores first timing information for a plurality of fields based on the received first control signals for the plurality of fields and generates second control signals based on the stored first timing information for the plurality of fields. The shutter glasses control the transmission and blocking of visible light at the right-eye shutter and left-eye shutter using the second control signals.
    Type: Application
    Filed: March 28, 2011
    Publication date: January 17, 2013
    Applicant: PANASONIC CORPORATION
    Inventor: Yuya Shiozaki
  • Publication number: 20130002628
    Abstract: In a plasma display apparatus displaying a stereoscopic image, crosstalk is reduced and an address discharge is caused stably. For this purpose, in the plasma display apparatus displaying a stereoscopic image, each field has a plurality of subfields, each having a sustain period where an up-ramp waveform voltage is applied to the scan electrodes after all the sustain pulses are generated. The luminance weights of the respective subfields are set such that the subfield having the lightest luminance weight is generated first in each field, the subfield having the heaviest luminance weight is generated second, and the third subfield and those thereafter have luminance weights sequentially decreasing. The up-ramp waveform voltage in the sustain period of the first subfield in each field is generated so as to have a gradient gentler than that of the up-ramp waveform voltage in the sustain periods of the subfields generated second and thereafter.
    Type: Application
    Filed: February 25, 2011
    Publication date: January 3, 2013
    Inventors: Yuichi Sakai, Hidehiko Shoji, Naoyuki Tomioka, Yuya Shiozaki
  • Publication number: 20130002733
    Abstract: A plasma display apparatus usable as a 3D image display apparatus can reduce the crosstalk for a user who views a 3D image displayed on a plasma display panel through shutter glasses. For this purpose, the plasma display apparatus displays the 3D image on the plasma display panel having a plurality of pixels each of which is formed of a plurality of discharge cells by alternately repeating a right-eye field and a left-eye field. The plasma display apparatus adds a predetermined gradation value to an image signal to be displayed in a certain field when the number of pixels where the gradation equal to or higher than a high gradation threshold is displayed in the field immediately before a certain field and the gradation equal to or lower than a low gradation threshold is displayed in the certain field is equal to or larger than a number-of-pixels threshold.
    Type: Application
    Filed: March 2, 2011
    Publication date: January 3, 2013
    Inventors: Takahiko Origuchi, Yuya Shiozaki, Shigeo Kigo, Yutaka Yoshihama, Mitsuhiro Ishizuka
  • Publication number: 20120327053
    Abstract: Sharp contrast is achieved while the driving time in displaying a 3D image on a plasma display panel is shorted. For this purpose, an all-cell initializing subfield for applying up-ramp waveform voltage and down-ramp waveform voltage to a scan electrode in the initializing period is set as the first subfield of one field. The plasma display panel is driven by one of 3D drive and 2D drive. A gradient of at least one of the up-ramp waveform voltage and the down-ramp waveform voltage in the all-cell initializing period during the 3D drive is set to be steeper than a gradient of the one waveform voltage in the all-cell initializing period during the 2D drive. A shutter opening/closing timing signal is generated so that both of a right-eye timing signal and a left-eye timing signal are in the OFF state in the all-cell initializing period during the 3D drive.
    Type: Application
    Filed: March 10, 2011
    Publication date: December 27, 2012
    Inventors: Yuya Shiozaki, Takahiko Origuchi, Hidehiko Shoji, Mitsuhiro Ishizuka, Shigeo Kigo
  • Publication number: 20120327070
    Abstract: In display of a 3D image on a plasma display panel, the plasma display apparatus achieves an excellent contrast with reduced crosstalk. For this purpose, the plasma display apparatus includes a driver circuit and a control signal generation circuit. The driver circuit drives the plasma display panel in a manner such that a subfield where an all-cell initializing operation is performed in the initializing period and a sustain discharge is caused in all the discharge cells in the sustain period is set as the first subfield of one field. The control signal generation circuit generates shutter opening/closing timing signals that include a timing signal for the right eye and a timing signal for the left eye. The control signal generation circuit sets both of the timing signal for the right eye and the timing signal for the left eye to OFF in the period of the first subfield.
    Type: Application
    Filed: March 10, 2011
    Publication date: December 27, 2012
    Inventors: Yuya Shiozaki, Takahiko Origuchi, Mitsuhiro Ishizuka
  • Publication number: 20120320030
    Abstract: In display of a 3D image on a plasma display panel, the plasma display apparatus achieves excellent image display quality while reducing crosstalk. For this purpose, the plasma display apparatus includes a driver circuit and a control signal generation circuit. The driver circuit sets a subfield where an all-cell initializing operation is performed in the initializing period as the top subfield of one field. The control signal generation circuit sets both of the timing signal for the right eye and the timing signal for the left eye to OFF in the initializing period of the top subfield. The one field includes an auxiliary subfield where no address operation is performed in the discharge cells applied with a phosphor having a long afterglow time, and an identical address operation with that in the top subfield is performed in the discharge cells applied with a phosphor having a short afterglow time.
    Type: Application
    Filed: March 10, 2011
    Publication date: December 20, 2012
    Inventors: Takahiko Origuchi, Mitsuhiro Ishizuka, Yuya Shiozaki
  • Publication number: 20120320015
    Abstract: In a plasma display apparatus usable as a 3D image display apparatus, crosstalk is reduced to the user who views a 3D image displayed on the plasma display panel through a pair of shutter glasses. For this purpose, in a plasma display system, in each of fields for the right eye and fields for the left eye, luminance weights are set such that the first subfield in the one field has the heaviest luminance weight and those thereafter have luminance weights sequentially decreasing. A pair of shutter glasses is controlled in the following manner. The right eye shutter opens before the sustain period of the subfield where an address operation is performed first in the field for the right eye. The left eye shutter opens before the sustain period of the subfield where an address operation is performed first in the field for the left eye.
    Type: Application
    Filed: March 2, 2011
    Publication date: December 20, 2012
    Inventors: Yuya Shiozaki, Takahiko Origuchi, Mitsuhiro Ishizuka
  • Publication number: 20120293508
    Abstract: In a plasma display apparatus capable of displaying an image for stereoscopic view, the image display quality is enhanced. For this purpose, the plasma display apparatus includes a driver circuit and a timing generation circuit. The driver circuit drives the plasma display panel in a manner such that a field for the right eye and a field for the left eye are alternately repeated, each field is formed of an all-cell initializing subfield and a selective initializing subfield, and the top subfield of each field is the all-cell initializing subfield. The timing generation circuit generates shutter opening/closing timing signals. The timing generation circuit generates the shutter opening/closing timing signals such that both timing signal for opening/closing the right eye shutter and timing signal for opening/closing the left eye shutter are set to OFF in the all-cell initializing period of the fields for the right eye and for the left eye.
    Type: Application
    Filed: December 13, 2010
    Publication date: November 22, 2012
    Inventors: Yuya Shiozaki, Takahiko Origuchi, Hidehiko Shoji, Mitsuhiro Ishizuka, Shigeo Kigo
  • Publication number: 20120281032
    Abstract: In a plasma display apparatus capable of displaying an image for stereoscopic view, the image display quality is enhanced. For this purpose, the plasma display apparatus includes a driver circuit and a timing generation circuit. The driver circuit drives the plasma display panel by alternately repeating a field for the right eye and a field for the left eye. The timing generation circuit generates shutter opening/closing timing signals. The driver circuit applies the sustain pulses equal in number to the luminance weight multiplied by a luminance magnification to each scan electrode and each sustain electrode, in the subfields except the first subfield. In the first subfield, the driver circuit applies the sustain pulses greater in number than the luminance weight multiplied by the luminance magnification to each scan electrode and each sustain electrode.
    Type: Application
    Filed: January 13, 2011
    Publication date: November 8, 2012
    Inventors: Yutaka Yoshihama, Yuya Shiozaki, Takahiko Origuchi
  • Publication number: 20120256978
    Abstract: An address period is shortened while degradation of image display quality of a plasma display apparatus is suppressed. For this purpose, in a driving method for a plasma display apparatus, the following operation is performed. A field for the right eye and a field for the left eye are alternately displayed on the plasma display panel. In each of the field for the right eye and the field for the left eye, a subfield having a smallest luminance weight occurs first, a subfield having a largest luminance weight occurs next, and the other subfields occur thereafter. In the subfield having the smallest luminance weight and the subfield having the largest luminance weight, one-line address operation for applying a scan pulse to each scan electrode is performed. In the other subfields, two-line simultaneous address operation for applying a scan pulse simultaneously to two adjacent scan electrodes is performed.
    Type: Application
    Filed: December 13, 2010
    Publication date: October 11, 2012
    Inventors: Takahiko Origuchi, Yuya Shiozaki, Shigeo Kigo, Yutaka Yoshihama, Mitsuhiro Ishizuka
  • Publication number: 20120249500
    Abstract: An address period is shortened while degradation of image display quality of a plasma display apparatus is suppressed. For this purpose, in a driving method for a plasma display apparatus including a plasma display panel with a plurality of discharge cells having a scan electrode, a sustain electrode, and a data electrode, and a driver circuit, the following operation is performed. The driver circuit forms one field period by a subfield that displays an interlace signal as an image signal thinned out every one line and a subfield that displays oblique line interpolated data generated by interpolating oblique lines detected by an image signal. In the subfield displaying an image signal, the driver circuit performs two-line simultaneous address operation with application of a scan pulse simultaneously to two adjacent scan electrodes so as to generate an address discharge in a discharge cell.
    Type: Application
    Filed: December 14, 2010
    Publication date: October 4, 2012
    Inventors: Takahiko Origuchi, Yuya Shiozaki, Shigeo Kigo, Yutaka Yoshihama, Mitsuhiro Ishizuka
  • Patent number: 8269694
    Abstract: A method for driving a plasma display panel (PDP) that can increase dark contrast without causing erroneous discharges is provided. A unit display period is divided into a plurality of subfields. A reset process and a sustain process are performed in one of the subfields. In the reset process, a reset pulse is applied to row electrodes of the PDP to initialize each discharge cell to an emission mode (or non-emission mode). In the sustain process, a sustain discharge is repeatedly generated a number of times, corresponding to the number of times a sustain pulse is to be applied, in those discharge cells that are in the emission mode. In this case, a peak potential of the reset pulse is changed based on the number of those discharge cells that are maintained in the non-emission mode during the unit display period and the number of times the sustain pulse is to be applied in the sustain process in this subfield.
    Type: Grant
    Filed: September 10, 2008
    Date of Patent: September 18, 2012
    Assignee: Panasonic Corporation
    Inventors: Yuya Shiozaki, Hitoshi Fujimura, Kazuo Yahagi, Tsutomu Tokunaga
  • Publication number: 20120200543
    Abstract: It is an object to provide a driving method of a plasma display panel, whereby a dark contrast can be improved while suppressing an erroneous discharge. In a resetting step in a first unit display period, while a first reset pulse having a predetermined peak electric potential is applied to one of first row electrodes of row electrode pairs formed in the PDP, a second reset pulse having a peak electric potential smaller than that of the first reset pulse is applied to the other of the first row electrodes. In the resetting step in a second unit display period subsequent to the first unit display period, a second reset pulse is applied to each of the one and the other of the first row electrodes.
    Type: Application
    Filed: April 17, 2012
    Publication date: August 9, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Kazuo YAHAGI, Mitsuhiro ISHIZUKA, Yuya SHIOZAKI, Shunsuke ITAKURA, Kazuhiro KANAI, Hajime HOMMA, Yoshichika SATO, Hikaru TAKAHASHI