Patents by Inventor Yuzo Koda
Yuzo Koda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20070169890Abstract: A chemical-reaction inducing means is provided in an exhaust line connecting a processing space for subjecting a substrate or a film to plasma processing to an exhaust means, and at least either an unreacted gas or byproduct exhausted from the processing space are caused to chemically react without allowing plasma in the processing space to reach the chemical-reaction inducing means, thereby improving the processing ability of the chemical-reaction inducing means to process the unreacted gas or byproduct.Type: ApplicationFiled: March 30, 2007Publication date: July 26, 2007Applicant: CANON KABUSHIKI KAISHAInventors: TAKESHI SHISHIDO, Shotaro Okabe, Masahiro Kanai, Yuzo Koda, Yasuyoshi Takai, Tadashi Hori, Koichiro Moriyama, Hidetoshi Tsuzuki, Hiroyuki Ozaki
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Patent number: 7211708Abstract: A chemical-reaction inducing means is provided in an exhaust line connecting a processing space for subjecting a substrate or a film to plasma processing to an exhaust means, and at least either an unreacted gas or byproduct exhausted from the processing space are caused to chemically react without allowing plasma in the processing space to reach the chemical-reaction inducing means, thereby improving the processing ability of the chemical-reaction inducing means to process the unreacted gas or byproduct.Type: GrantFiled: April 2, 2001Date of Patent: May 1, 2007Assignee: Canon Kabushiki KaishaInventors: Takeshi Shishido, Shotaro Okabe, Masahiro Kanai, Yuzo Koda, Yasuyoshi Takai, Tadashi Hori, Koichiro Moriyama, Hidetoshi Tsuzuki, Hiroyuki Ozaki
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Patent number: 6877458Abstract: To provide an apparatus for forming a deposited film, which is a parallel plate electrode type CVD apparatus, with a discharge vessel receiving a material gas flowing therein and discharging air therefrom, decomposing the material gas by the aid of a plasma generated therein, and depositing the film on the substrate, in which the exhaust port of the material gas exhaust means has an opening wider in the lateral direction than the parallel plate electrode. This structure diminishes the stagnant region of the material gas during the deposited film forming process and controls formation of by-products, to deposit the film uniform in quality and thickness.Type: GrantFiled: March 5, 2001Date of Patent: April 12, 2005Assignee: Canon Kabushiki KaishaInventors: Hiroyuki Ozaki, Shotaro Okabe, Masahiro Kanai, Yuzo Koda, Tadashi Hori
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Patent number: 6846521Abstract: A two-layer structured electric power application electrode including a non-split electrode consisting of a single planar plate and six split electrodes arranged on the non-split electrode so as to be electrically in contact with the non-split electrode is arranged on the upper side of a discharge chamber provided within a vacuum container such that the power application electrode faces a strip substrate in parallel. The split electrodes are arranged in such a manner as to form a planar plane, and the distance between the surfaces of the split electrodes facing the strip substrate and the strip substrate is uniform. The total area of the surfaces of the split electrodes facing the strip substrate is the same as the area of the non-split electrode on which the split electrodes are mounted. This improves the uniformity in plasma generated in the apparatus for forming a deposited film and enables cutting-down of the costs required to form deposited films.Type: GrantFiled: August 29, 2003Date of Patent: January 25, 2005Assignee: Canon Kabushiki KaishaInventors: Takeshi Shishido, Masahiro Kanai, Yuzo Koda, Takahiro Yajima
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Patent number: 6794275Abstract: In a process for forming a silicon-based film on a substrate according to the present invention, the substrate has a temperature gradient in the thickness direction thereof in the formation of the silicon-based film and the temperature gradient is made such that a deposition surface of the substrate has a higher temperature than a backside or the direction of the temperature gradient is reversed. With this configuration, the present invention provides a silicon-based thin film having good properties at a high deposition rate and provides a semiconductor device including it. The present invention also provides a semiconductor device including the silicon-based thin films that has good adhesion and weather-resisting properties and that can be manufactured in a short tact time.Type: GrantFiled: April 2, 2002Date of Patent: September 21, 2004Assignee: Canon Kabushiki KaishaInventors: Takaharu Kondo, Shotaro Okabe, Masafumi Sano, Akira Sakai, Yuzo Koda, Ryo Hayashi, Shuichiro Sugiyama, Koichiro Moriyama
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Publication number: 20040035361Abstract: A two-layer structured electric power application electrode including a non-split electrode consisting of a single planar plate and six split electrodes arranged on the non-split electrode so as to be electrically in contact with the non-split electrode is arranged on the upper side of a discharge chamber provided within a vacuum container such that the power application electrode faces a strip substrate in parallel. The split electrodes are arranged in such a manner as to form a planar plane, and the distance between the surfaces of the split electrodes facing the strip substrate and the strip substrate is uniform. The total area of the surfaces of the split electrodes facing the strip substrate is the same as the area of the non-split electrode on which the split electrodes are mounted. This improves the uniformity in plasma generated in the apparatus for forming a deposited film and enables cutting-down of the costs required to form deposited films.Type: ApplicationFiled: August 29, 2003Publication date: February 26, 2004Inventors: Takeshi Shishido, Masahiro Kanai, Yuzo Koda, Takahiro Yajima
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Patent number: 6653165Abstract: For efficiently forming a semiconductor element with excellent adhesion and environment resistance, a semiconductor element forming method is configured to have a step of forming a plurality of pin junctions of a silicon-based material on a substrate by a high-frequency plasma CVD process under a pressure of not more than atmospheric pressure, and the method further has a step of forming a p-layer, an i-layer, and a portion of an n-layer of a first pin junction of the pin junctions or forming an n-layer, an i-layer, and a portion of a p-layer of a first pin junction of the pin junctions, and thereafter exposing the p-layer or the n-layer exposed in the surface, to an oxygen-containing atmosphere; a step of forming on the p-layer or the n-layer as exposed to the oxygen-containing atmosphere a layer of the same conductivity type as that of the p-layer or the n-layer; and a step of forming an n-layer or a p-layer of a second pin junction adjacent to the first pin junction to form a pn interface.Type: GrantFiled: January 30, 2002Date of Patent: November 25, 2003Assignee: Canon Kabushiki KaishaInventors: Takaharu Kondo, Masafumi Sano, Akira Sakai, Koichi Matsuda, Yuzo Koda, Tadashi Hori
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Patent number: 6632284Abstract: A two-layer structured electric power application electrode including a non-split electrode consisting of a single planar plate and six split electrodes arranged on the non-split electrode so as to be electrically in contact with the non-split electrode is arranged on the upper side of a discharge chamber provided within a vacuum container such that the power application electrode faces a strip substrate in parallel. The split electrodes are arranged in such a manner as to form a planar plane, and the distance between the surfaces of the split electrodes facing the strip substrate and the strip substrate is uniform. The total area of the surfaces of the split electrodes facing the strip substrate is the same as the area of the non-split electrode on which the split electrodes are mounted.Type: GrantFiled: January 24, 2001Date of Patent: October 14, 2003Assignee: Canon Kabushiki KaishaInventors: Takeshi Shishido, Masahiro Kanai, Yuzo Koda, Takahiro Yajima
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Publication number: 20030104664Abstract: In a process for forming a silicon-based film on a substrate according to the present invention, the substrate has a temperature gradient in the thickness direction thereof in the formation of the silicon-based film and the temperature gradient is made such that a deposition surface of the substrate has a higher temperature than a backside or the direction of the temperature gradient is reversed. With this configuration, the present invention provides a silicon-based thin film having good properties at a high deposition rate and provide a semiconductor device including it. The present invention also provides a semiconductor device including the silicon-based thin films that has good adhesion and weather-resisting properties and that can be manufactured in a short tact time.Type: ApplicationFiled: April 2, 2002Publication date: June 5, 2003Inventors: Takaharu Kondo, Shotaro Okabe, Masafumi Sano, Akira Sakai, Yuzo Koda, Ryo Hayashi, Shuichiro Sugiyama, Koichiro Moriyama
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Patent number: 6495392Abstract: A process for producing a semiconductor device such as a photovoltaic element including a solar cell or a photosensor having a photoelectric conversion semiconductor layer formed by sequentially forming a p-type or n-type semiconductor layer composed of a non-single crystalline silicon series semiconductor material, an i-type semiconductor layer composed of a non-single crystalline silicon series semiconductor material, and an n-type or p-type semiconductor layer composed of a non-single crystalline silicon series semiconductor material on a substrate by means of plasma CVD, characterized in that at least one i-type semiconductor as said i-type semiconductor layer is formed in a discharge chamber having a cathode electrode by means of VHF plasma CVD using a silicon-containing raw material gas, wherein a VHF power of a wattage which is two times or less that of a VHF power required for decomposing 100% of said silicon-containing raw material gas is applied to said cathode electrode.Type: GrantFiled: July 23, 2001Date of Patent: December 17, 2002Assignee: Canon Kabushiki KaishaInventors: Akira Sakai, Yasushi Fujioka, Shotaro Okabe, Masahiro Kanai, Tadashi Sawayama, Yuzo Koda, Takahiro Yajima
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Publication number: 20020168794Abstract: For efficiently forming a semiconductor element with excellent adhesion and environment resistance, a semiconductor element forming method is configured to have a step of forming a plurality of pin junctions of a silicon-based material on a substrate by a high-frequency plasma CVD process under a pressure of not more than atmospheric pressure, and the method further has a step of forming a p-layer, an i-layer, and a portion of an n-layer of a first pin junction of the pin junctions or forming an n-layer, an i-layer, and a portion of a p-layer of a first pin junction of the pin junctions, and thereafter exposing the p-layer or the n-layer exposed in the surface, to an oxygen-containing atmosphere; a step of forming on the p-layer or the n-layer as exposed to the oxygen-containing atmosphere a layer of the same conductivity type as that of the p-layer or the n-layer; and a step of forming an n-layer or a p-layer of a second pin junction adjacent to the first pin junction to form a pn interface.Type: ApplicationFiled: January 30, 2002Publication date: November 14, 2002Inventors: Takaharu Kondo, Masafumi Sano, Akira Sakai, Koichi Matsuda, Yuzo Koda, Tadashi Hori
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Patent number: 6472296Abstract: A process for producing a semiconductor layer by introducing a raw gas into a discharge chamber and supplying high-frequency power to the chamber to decompose the raw gas by discharge, thereby forming a semiconductor layer on a substrate within the discharge chamber, the process comprising the steps of supplying high-frequency power of at least very high frequency (VHF) as the high-frequency power; supplying bias power of direct current power and/or high-frequency power of radio-frequency (RF) together with the high-frequency power of VHF to the discharge chamber; and controlling a direct current component of an electric current flowing into an electrode, to which the bias power is supplied, so as to fall within a range of from 0.1 A/m2 to 10 A/m2 in terms of a current density based on the area of an inner wall of the discharge chamber. A good-quality semiconductor layer can be deposited over a large area at a high speed.Type: GrantFiled: July 26, 2001Date of Patent: October 29, 2002Assignee: Canon Kabushiki KaishaInventors: Yasushi Fujioka, Shotaro Okabe, Masahiro Kanai, Akira Sakai, Tadashi Sawayama, Yuzo Koda, Takahiro Yajima
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Patent number: 6470823Abstract: A film-forming apparatus comprising a vacuum chamber, a power application electrode, a raw material gas introduction portion through which a raw material gas is introduced into the vacuum chamber, and an exhaustion portion through which the vacuum chamber is exhausted, the power application electrode being arranged so as to oppose a substrate for film formation positioned in the vacuum chamber, characterized in that at least said raw material gas introduction portion or the exhaustion portion is provided with an opening adjusting member having a desired thickness for intercepting the plasma, and the power application electrode and the opening adjusting member are arranged to satisfy an equation a or c≧b, with a being a shortest distance between the power application electrode and the opening adjusting member provided at the raw material gas introduction portion, c being a shortest distance between the power application electrode and the opening adjusting member provided at the exhaustion portion, and b beiType: GrantFiled: January 30, 2001Date of Patent: October 29, 2002Assignee: Canon Kabushiki KaishaInventors: Takahiro Yajima, Masahiro Kanai, Yuzo Koda, Takeshi Shishido
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Patent number: 6447612Abstract: A film-forming apparatus which has at least a vacuum vessel whose inside is capable of being vacuumed and a film-forming chamber having a discharge region provided in said vacuum vessel and in which a substrate web having a desired width and a desired length is arranged so as to constitute a part of said film-forming chamber, wherein said substrate web is continuously moved to pass through said discharge region of said film-forming chamber to continuously form a deposited film on said substrate web, characterized in that said film-forming chamber is provided with an opening-adjusting member such that said opening-adjusting member constitutes an entrance or/and an exit of said film-forming chamber, and a face of said opening-adjusting member which is opposed to said substrate web has one or more grooves formed substantially in parallel to a direction for said substrate web to be transported.Type: GrantFiled: July 26, 2000Date of Patent: September 10, 2002Assignee: Canon Kabushiki KaishaInventors: Koichiro Moriyama, Masahiro Kanai, Yuzo Koda, Tadashi Hori
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Patent number: 6436797Abstract: A film-forming apparatus for forming a non-single crystalline silicon series semiconductor film on a substrate in a film-forming space provided in a vacuum chamber using a very high frequency power supplied through a high frequency power supply means comprising a bar-like shaped electrode, wherein said bar-like shaped electrode is arranged such that the longitudinal direction thereof intersects a direction for said substrate to be moved, and a length of said film-forming space relative to the direction for said substrate to be moved is in a range of from {fraction (1/16)} to ½ of a wavelength of said very high frequency power supplied in said film-forming space. A film-forming method for forming a non-single crystalline silicon series semiconductor film on a substrate using said film-forming apparatus.Type: GrantFiled: May 26, 2000Date of Patent: August 20, 2002Assignee: Canon Kabushiki KaishaInventors: Yasushi Fujioka, Shotaro Okabe, Masahiro Kanai, Akira Sakai, Tadashi Sawayama, Yuzo Koda, Takahiro Yajimaa
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Publication number: 20020016017Abstract: A process for producing a semiconductor device such as a photovoltaic element including a solar cell or a photosensor hating a photoelectric conversion semiconductor layer formed by sequentially forming a p-type or n-type semiconductor layer composed of a non-single crystalline silicon series semiconductor material, an i-type semiconductor layer composed of a non-single crystalline silicon series semiconductor material, and an n-type or p-type semiconductor layer composed of a non-single crystalline silicon series semiconductor material on a substrate by means of plasma CVD, characterized in that at least one i-type semiconductor as said i-type semiconductor layer is formed in a discharge chamber having a cathode electrode by means of VHF plasma CVD using a silicon-containing raw material gas, wherein a VHF power of a wattage which is two times or less that of a VHF power required for decomposing 100% of said silicon-containing raw material gas is applied to said cathode electrode.Type: ApplicationFiled: July 23, 2001Publication date: February 7, 2002Inventors: Akira Sakai, Yasushi Fujioka, Shotaro Okabe, Masahiro Kanai, Tadashi Sawayama, Yuzo Koda, Takahiro Yajima
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Publication number: 20020006477Abstract: A chemical-reaction inducing means is provided in an exhaust line connecting a processing space for subjecting a substrate or a film to plasma processing to an exhaust means, and at least either an unreacted gas or byproduct exhausted from the processing space are caused to chemically react without allowing plasma in the processing space to reach the chemical-reaction inducing means, thereby improving the processing ability of the chemical-reaction inducing means to process the unreacted gas or byproduct.Type: ApplicationFiled: April 2, 2001Publication date: January 17, 2002Inventors: Takeshi Shishido, Shotaro Okabe, Masahiro Kanai, Yuzo Koda, Yasuyoshi Takai, Tadashi Hori, Koichiro Moriyama, Hidetoshi Tsuzuki, Hiroyuki Ozaki
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Publication number: 20020001924Abstract: The invention provides a process for producing a semiconductor layer by introducing a raw gas into a discharge chamber and supplying high-frequency power to the chamber to decompose the raw gas by discharge, thereby forming a semiconductor layer on a substrate within the discharge chamber, the process comprising the steps of supplying high-frequency power of at least very high frequency (VHF) as the high-frequency power; supplying bias power of direct current power and/or high-frequency power of radio-frequency (RF) together with the high-frequency power of VHF to the discharge chamber; and controlling a direct current component of an electric current flowing into an electrode, to which the bias power is supplied, so as to fall within a range of from 0.1 A/m2 to 10 A/m2 in terms of a current density based on the area of an inner wall of the discharge chamber. A good-quality semiconductor layer can be deposited over a large area at a high speed.Type: ApplicationFiled: July 26, 2001Publication date: January 3, 2002Inventors: Yasushi Fujioka, Shotaro Okabe, Masahiro Kanai, Akira Sakai, Tadashi Sawayama, Yuzo Koda, Takahiro Yajima
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Publication number: 20010039924Abstract: To provide an apparatus for forming a deposited film, which is a parallel plate electrode type CVD apparatus, with a discharge vessel receiving a material gas flowing therein and discharging air therefrom, decomposing the material gas by the aid of a plasma generated therein, and depositing the film on the substrate, in which the exhaust port of the material gas exhaust means has an opening wider in the lateral direction than the parallel plate electrode. This structure diminishes the stagnant region of the material gas during the deposited film forming process and controls formation of by-products, to deposit the film uniform in quality and thickness.Type: ApplicationFiled: March 5, 2001Publication date: November 15, 2001Inventors: Hiroyuki Ozaki, Shotaro Okabe, Masahiro Kanai, Yuzo Koda, Tadashi Hori
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Publication number: 20010025601Abstract: A film-forming apparatus comprising a vacuum chamber, a power application electrode, a raw material gas introduction portion through which a raw material gas is introduced into said vacuum chamber, and an exhaustion portion through which said vacuum chamber is exhausted, said power application electrode being arranged so as to oppose a substrate for film formation positioned in said vacuum chamber, characterized in that at least said raw material gas introduction portion or said exhaustion portion is provided with an opening adjusting member having a desired thickness for intercepting said plasma, and said power application electrode and said opening adjusting member are arranged to satisfy an equation a or c≧b.Type: ApplicationFiled: January 30, 2001Publication date: October 4, 2001Inventors: Takahiro Yajima, Masahiro Kanai, Yuzo Koda, Takeshi Shishido