Abstract: A semiconductor device includes a wafer having a frontside and a backside. The wafer is formed from at least one integrated circuit chip having an electrical connection frontside co-planar with the wafer frontside and a backside co-planar with the wafer backside. A passive component including at least one conductive plate and a dielectric plate is positioned adjacent the integrated circuit chip. An encapsulation block embeds the integrated circuit chip and the passive component, the block having a frontside co-planar with the wafer frontside and a backside co-planar with the wafer backside. An electrical connection is made between the electrical connection frontside and the passive component. That electrical connection includes connection lines placed on the wafer frontside and wafer backside. The electrical connection further includes at least one via passing through the encapsulation block.

Abstract: An electronic device which includes an electronic component having a substrate and a plurality of metal interconnection layers, the plurality of metal interconnection layers having a top surface. It further comprises a dielectric layer situated above said metal interconnection layers, a conductive layer situated above said dielectric layer, an inductor coil and a ground shield, the inductor coil being formed in the conductive layer and the ground shield being formed in a layer of said plurality of metal interconnection layers.

Abstract: A broad-band antenna includes in a common plane tow symmetrical parts (2,3) each including at least two interconnected conductor strands (4,5,7,8;19,20,21) powered by a double-wire line (10;22), each strand including in its portion opposite the double-wire line, a resistive load (11,12,14,15;23,24,25,26).