Abstract: The present disclosure relates to borehole logging methods and apparatuses for estimating formation properties using nuclear radiation, particularly an apparatus and method for estimating amounts of silicon and/or oxygen in the formation. The present disclosure includes estimating a formation property using an oxygen estimate and at least a formation lithology. The method may include using nuclear radiation information from at least one nuclear radiation detector generate the oxygen estimate. The apparatus may include at least one nuclear radiation detector. The apparatuses may include an information processing device to perform the methods.

Abstract: The present disclosure relates to borehole logging methods and apparatuses for estimating formation properties using nuclear radiation, particularly an apparatus and method for estimating amounts of silicon and/or oxygen in the formation using exposure time information. The method may include using nuclear radiation information from at least one nuclear radiation detector to estimate at least one parameter of interest. The method may also include reducing an error in the estimated formation properties due to speed variations of a nuclear radiation source that activates the silicon and oxygen in the formation. The apparatus may include at least one nuclear radiation detector. The apparatuses may include an information processing device to perform the methods.

Abstract: Techniques for programming trimming circuitry of a power integrated circuit without the need for separate programming pins are disclosed. According to a first aspect of the invention, there is provided a power supply controller IC with internal circuitry, a plurality of external connections, the IC further comprising trimming circuitry with no external connections to the IC other than via shared ones of the external connections. The shared external connections can comprise a first connection comprising a data input for receiving data for programming the trimming circuitry, and a second, different connection comprising a select input to select between a data receiving mode for receiving data from the data input and a programming mode for programming the trimming circuitry using the received data.

Abstract: The invention relates to techniques for programming trimming circuitry of a power integrated circuit without the need for separate programming pins. We describe a power supply controller IC with internal circuitry, a plurality of external connections, the IC further comprising trimming circuitry with no external connections to said IC other than via shared ones of said external connections. The shared external connections comprise a first connection comprising a data input for receiving data for programming said trimming circuitry, and a second, different connection comprising a select input to select between a data receiving mode for receiving data from said data input and a programming mode for programming said trimming circuitry using said received data.

Abstract: A pulse width modulation scheme allows the creation of a unipolar pulse width modulated output signal. Two switching circuits (104, 204), preferably different legs of an inverter circuit, can operate to not only modulate an input voltage but also to reverse the polarity of the PWM output signal. Both switching circuits can be configured to accomplish both features, thus the switching load is spread out across all four switches.

Abstract: An output circuit (50) is provided for a programmable logic array (PLA) integrated circuit. The output circuit (50) includes a flip flop (52) which stores a given output term from the array. The flip flop (52) contains a set input lead (S) and a reset input lead (R). The signals present at the set input, reset input, the clock leads are generated by programmable logic within the PLA. A multiplexer (54) is provided which receives the output data of the flip flop (52) and the signal constituting the input data for the flip flop. The multiplexer provides the data input signal on the multiplexer output lead (60) when both the set and reset input signals are true. However, if either or both the set and reset input signals are false, then the multiplexer (54) provides the Q output signal from the flip flop (52) on the multiplexer output lead (60). The multiplexer output signal is presented to a three-state buffer (62) which in turn drives an output pin.