Patents by Inventor Zailong Bian

Zailong Bian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070045769
    Abstract: The invention includes semiconductor constructions having trenched isolation regions. The trenches of the trenched isolation regions can include narrow bottom portions and upper wide portions over the bottom portions. Electrically insulative material can fill the upper wide portions while leaving voids within the narrow bottom portions. The trenched isolation regions can be incorporated into a memory array, and/or can be incorporated into an electronic system. The invention also includes methods of forming semiconductor constructions.
    Type: Application
    Filed: September 1, 2005
    Publication date: March 1, 2007
    Inventors: Zailong Bian, Janos Fucsko
  • Publication number: 20060265868
    Abstract: An inter-metal dielectric (IMD) fill process includes depositing an insulating nanolaminate barrier layer. The nanolaminate is preferably an oxide liner formed by using an alternating layer deposition process. The layer is highly conformal and is an excellent diffusion barrier. Gaps between metal lines are filled using high density plasma chemical vapor deposition with a reactive species gas. The barrier layer protects the metal lines from shorts between neighboring layers. The resulting structure has substantially uneroded metal lines and an insulating IMD fill.
    Type: Application
    Filed: July 14, 2006
    Publication date: November 30, 2006
    Inventors: Neal Rueger, Chris Hill, Zailong Bian, John Smythe
  • Publication number: 20060246719
    Abstract: An inter-metal dielectric (IMD) fill process includes depositing an insulating nanolaminate barrier layer. The nanolaminate is preferably an oxide liner formed by using an alternating layer deposition process. The layer is highly conformal and is an excellent diffusion barrier. Gaps between metal lines are filled using high density plasma chemical vapor deposition with a reactive species gas. The barrier layer protects the metal lines from shorts between neighboring layers. The resulting structure has substantially uneroded metal lines and an insulating IMD fill.
    Type: Application
    Filed: July 14, 2006
    Publication date: November 2, 2006
    Applicant: MICRON TECHNOLOGY, INC
    Inventors: Neal Rueger, Chris Hill, Zailong Bian, John Smythe
  • Publication number: 20060038293
    Abstract: An inter-metal dielectric (IMD) fill process includes depositing an insulating nanolaminate barrier layer. The nanolaminate is preferably an oxide liner formed by using an alternating layer deposition process. The layer is highly conformal and is an excellent diffusion barrier. Gaps between metal lines are filled using high density plasma chemical vapor deposition with a reactive species gas. The barrier layer protects the metal lines from shorts between neighboring layers. The resulting structure has substantially uneroded metal lines and an insulating IMD fill.
    Type: Application
    Filed: August 23, 2004
    Publication date: February 23, 2006
    Inventors: Neal Rueger, Chris Hill, Zailong Bian, John Smythe
  • Publication number: 20050287731
    Abstract: A method includes removing a portion of a substrate to define an isolation trench; forming a first dielectric layer on exposed surfaces of the substrate in the trench; forming a second dielectric layer on at least the first dielectric layer, the second dielectric layer containing a different dielectric material than the first dielectric layer; depositing a third dielectric layer to fill the trench; removing an upper portion of the third dielectric layer from the trench and leaving a lower portion covering a portion of the second dielectric layer; oxidizing the lower portion of the third dielectric layer after removing the upper portion; removing an exposed portion of the second dielectric layer from the trench, thereby exposing a portion of the first dielectric layer; and forming a fourth dielectric layer in the trench covering the exposed portion of the first dielectric layer.
    Type: Application
    Filed: May 16, 2005
    Publication date: December 29, 2005
    Inventors: Zailong Bian, John Smythe, Janos Fucsko, Michael Violette