Patents by Inventor Zhaohui QIANG

Zhaohui QIANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973094
    Abstract: The present disclosure provides an array substrate, an electronic device and a manufacturing method of the array substrate. The array substrate includes a base substrate, and a first transistor and a second transistor on the base substrate, a first electrode of the first transistor being connected to a second electrode of the second transistor; the array substrate further includes a photodiode including a first electrode, a second electrode, and a photosensitive layer between the first electrode and the second electrode, and the first electrode is electrically connected to a gate of the first transistor. In the arrangement, the first transistor and the second transistor are connected in series to form one control unit, and the uniformity and stability of the control unit are greatly improved.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: April 30, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tianmin Zhou, Rui Huang, Wei Yang, Lizhong Wang, Zhaohui Qiang, Tao Yang, Li Qiang
  • Patent number: 11817460
    Abstract: A thin film transistor includes a gate, a gate insulating layer, an active layer, an ionized amorphous silicon layer, a source and a drain. The gate insulating layer covers the gate. The active layer is disposed on a side of the gate insulating layer away from the gate. The ionized amorphous silicon layer is disposed on a side of the active layer away from the gate, and the ionized amorphous silicon layer is in contact with the gate insulating layer. The source and the drain are disposed on a side of the ionized amorphous silicon layer away from the gate insulating layer, and the source and the drain are coupled to the active layer through the ionized amorphous silicon layer.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: November 14, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chao Luo, Feng Guan, Zhi Wang, Jianhua Du, Yang Lv, Zhaohui Qiang, Chao Li
  • Patent number: 11728352
    Abstract: The present disclosure provides a driving substrate including: a flexible substrate base, a plurality of thin film transistors on the flexible substrate base and a first conductive pattern layer on a side of the thin film transistors distal to the flexible substrate base. The first conductive pattern layer includes: a plurality of first connection terminals in the display region and a plurality of signal supply lines in the bendable region. A first number of first connection terminals are electrically coupled to first electrodes of the plurality of thin film transistors. The plurality of signal supply lines are coupled to a second number of first connection terminals other than the first number of first connection terminals. At least one inorganic insulating layer including a hollowed-out pattern in the bendable region is between the first conductive pattern layer and the flexible substrate base.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: August 15, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xinhong Lu, Fangzhen Zhang, Guangcai Yuan, Zhanfeng Cao, Jiushi Wang, Ke Wang, Xiaoyan Zhu, Qi Qi, Jingshang Zhou, Zhaohui Qiang, Zhiwei Liang
  • Publication number: 20220416091
    Abstract: A thin film transistor includes an active layer, first and second electrodes, and a third doped pattern. The active layer has a channel region, and a first electrode region and a second electrode region, the first electrode region has a first ion doping concentration, and the second electrode region has a second ion doping concentration. The first electrode and the second electrode are disposed on a side of the active layer in the thickness direction. The first electrode is coupled to the first electrode region, and the second electrode is coupled to the second electrode region. The third doped pattern is disposed between the first electrode and the first electrode region, and in direct contact with the first electrode and the first electrode region. The third doped pattern has a third ion doping concentration, and the third ion doping concentration is different from the first ion doping concentration.
    Type: Application
    Filed: June 15, 2021
    Publication date: December 29, 2022
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhaohui QIANG, Chao LI, Huiqin ZHANG, Li QIANG, Feng GUAN, Zhiwei LIANG
  • Publication number: 20220375966
    Abstract: An array substrate includes a base substrate, a driving circuit layer, and a functional device layer which are sequentially stacked; the driving circuit layer is provided with first driving circuits, and each first driving circuit at least comprises a driving transistor; and the driving circuit layer comprises a first gate layer, a first gate insulation layer, a semiconductor layer, a second gate insulation layer, a second gate layer, an interlayer dielectric layer, and a source-drain metal layer which are sequentially stacked on one side of the base substrate.
    Type: Application
    Filed: May 18, 2021
    Publication date: November 24, 2022
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Xue DONG, Guangcai YUAN, Ce NING, Zhiwei LIANG, Feng GUAN, Zhaohui QIANG, Yingwei LIU, Ke WANG, Zhanfeng CAO
  • Patent number: 11469336
    Abstract: The present disclosure relates to a photodiode, a method for preparing the same, and an electronic device. The photodiode includes: a first electrode layer and a semiconductor structure that are stacked, a surface of the semiconductor structure away from the first electrode layer having a first concave-convex structure; and a second electrode layer arranged on a surface of the semiconductor structure away from the first electrode layer, a surface of the second electrode layer away from the first electrode layer having a second concave-convex structure.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: October 11, 2022
    Assignee: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
    Inventors: Jianhua Du, Chao Li, Zhaohui Qiang, Yupeng Gao, Feng Guan, Rui Huang, Zhi Wang, Yang Lv, Chao Luo
  • Patent number: 11367791
    Abstract: The present disclosure provides a thin film transistor, a fabricating method thereof, an array substrate, and a display device. The thin film transistor includes: a substrate; a channel region; a heavily doped first semiconductor pattern located on both sides of the channel region; a second semiconductor pattern disposed on the heavily doped first semiconductor pattern; a gate insulating layer covering the channel region and the second semiconductor pattern; a gate pattern disposed on the gate insulating layer, an orthographic projection of the gate pattern on the substrate being within an orthographic projection of the channel region on the substrate; and a source pattern and a drain pattern in contact with the heavily doped first semiconductor pattern through the first via and the second via, respectively.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: June 21, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhaohui Qiang, Jianhua Du, Feng Guan, Chunhao Li
  • Patent number: 11362072
    Abstract: A light emitting diode, a display substrate and a transfer method are disclosed. The transfer method includes: disposing a display substrate on an adsorption carrier plate, and absorbing, by a transport head, multiple light emitting diodes from a donor substrate; dropping, by the transport head, the multiple light emitting diodes onto the display substrate, the light emitting diodes falling into positioning holes on the display substrate; and absorbing and removing, by the transport head, a light emitting diode on the display substrate which does not fall into a positioning hole.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: June 14, 2022
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Li Qiang, Zhaohui Qiang, Tao Yang, Dongsheng Yin
  • Publication number: 20220115413
    Abstract: A thin film transistor includes a gate, a gate insulating layer, an active layer, an ionized amorphous silicon layer, a source and a drain. The gate insulating layer covers the gate. The active layer is disposed on a side of the gate insulating layer away from the gate. The ionized amorphous silicon layer is disposed on a side of the active layer away from the gate, and the ionized amorphous silicon layer is in contact with the gate insulating layer. The source and the drain are disposed on a side of the ionized amorphous silicon layer away from the gate insulating layer, and the source and the drain are coupled to the active layer through the ionized amorphous silicon layer.
    Type: Application
    Filed: March 27, 2020
    Publication date: April 14, 2022
    Inventors: Chao LUO, Feng GUAN, Zhi WANG, Jianhua DU, Yang LV, Zhaohui QIANG, Chao LI
  • Patent number: 11296249
    Abstract: A photosensitive device, a manufacturing method thereof, a detection substrate and an array substrate are provided. The photosensitive device is formed on a substrate, and it includes a photosensitive element and a thin film transistor. The photosensitive element includes a first electrode layer on the substrate; a second electrode layer on a side of the first electrode layer distal to the substrate; and a photoelectric conversion layer between the first electrode layer and the second electrode layer. The thin film transistor is electrically connected to the photosensitive element, and it includes a first gate electrode on the substrate; an active layer on a side of the first gate electrode distal to the substrate; and a second gate electrode on a side of the active layer distal to the substrate. The first electrode layer and the second gate electrode are located in the same layer.
    Type: Grant
    Filed: March 9, 2020
    Date of Patent: April 5, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tianmin Zhou, Rui Huang, Lizhong Wang, Jipeng Song, Tao Yang, Zhaohui Qiang
  • Patent number: 11251208
    Abstract: A photosensor includes a base substrate; an insulating layer on the base substrate; and a photodiode including a semiconductor junction on a side of the insulating layer away from the base substrate. The semiconductor junction includes a first polarity semiconductor layer, an intrinsic semiconductor layer, and a second polarity semiconductor layer, stacked on the insulating layer. The second polarity semiconductor layer encapsulates a lateral surface of the intrinsic semiconductor layer.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: February 15, 2022
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Chao Li, Jianhua Du, Feng Guan, Zhaohui Qiang, Zhi Wang, Yupeng Gao, Yang Lv
  • Patent number: 11251207
    Abstract: The present disclosure discloses a method for preparing an array substrate, an array substrate and a display panel, wherein the method comprises: forming a buffer layer on a substrate in a first region and a second region, wherein the buffer layer has a groove located in the second region; forming a first indium oxide thin film on the buffer layer in the first region; forming a second indium oxide thin film in the groove; performing a reduction process on the second indium oxide thin film to obtain indium particles; forming an amorphous silicon thin film in the groove, and inducing the amorphous silicon of the amorphous silicon thin film to form microcrystalline silicon at a preset temperature by using the indium particles; and removing the indium particles in the microcrystalline silicon to form a microcrystalline silicon semiconductor layer of the microcrystalline silicon thin film transistor.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: February 15, 2022
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Yupeng Gao, Guangcai Yuan, Feng Guan, Zhi Wang, Jianhua Du, Zhaohui Qiang, Chao Li
  • Publication number: 20220028898
    Abstract: The present disclosure provides a driving substrate including: a flexible substrate base, a plurality of thin film transistors on the flexible substrate base and a first conductive pattern layer on a side of the thin film transistors distal to the flexible substrate base. The first conductive pattern layer includes: a plurality of first connection terminals in the display region and a plurality of signal supply lines in the bendable region. A first number of first connection terminals are electrically coupled to first electrodes of the plurality of thin film transistors. The plurality of signal supply lines are coupled to a second number of first connection terminals other than the first number of first connection terminals. At least one inorganic insulating layer including a hollowed-out pattern in the bendable region is between the first conductive pattern layer and the flexible substrate base.
    Type: Application
    Filed: June 22, 2021
    Publication date: January 27, 2022
    Inventors: Xinhong LU, Fangzhen ZHANG, Guangcai YUAN, Zhanfeng CAO, Jiushi WANG, Ke WANG, Xiaoyan ZHU, Qi QI, Jingshang ZHOU, Zhaohui QIANG, Zhiwei LIANG
  • Publication number: 20220020780
    Abstract: A thin film transistor includes a base, a first electrode, an active pattern, a gate insulating layer, a gate and a second electrode. The active pattern includes a first semiconductor pattern, a second semiconductor pattern and a third semiconductor pattern. A material of one of the first semiconductor pattern and the third semiconductor pattern includes a semiconductor material and N-type doped ions, and a material of another of the first semiconductor pattern and the third semiconductor pattern includes the semiconductor material and P-type doped ions. An orthogonal projection of the gate on the base is non-overlapping with an orthogonal projection of the active pattern on the base.
    Type: Application
    Filed: June 9, 2020
    Publication date: January 20, 2022
    Inventors: Zhaohui QIANG, Li QIANG, Chao LUO, Huiqin ZHANG, Rui HUANG, Zhi WANG
  • Publication number: 20210408095
    Abstract: The present disclosure provides an array substrate, an electronic device and a manufacturing method of the array substrate. The array substrate includes a base substrate, and a first transistor and a second transistor on the base substrate, a first electrode of the first transistor being connected to a second electrode of the second transistor; the array substrate further includes a photodiode including a first electrode, a second electrode, and a photosensitive layer between the first electrode and the second electrode, and the first electrode is electrically connected to a gate of the first transistor. In the arrangement, the first transistor and the second transistor are connected in series to form one control unit, and the uniformity and stability of the control unit are greatly improved.
    Type: Application
    Filed: September 23, 2020
    Publication date: December 30, 2021
    Inventors: Tianmin ZHOU, Rui HUANG, Wei YANG, Lizhong WANG, Zhaohui QIANG, Tao YANG, Li QIANG
  • Patent number: 11183610
    Abstract: The present disclosure discloses a photoelectric detector, a preparation method thereof, a display panel and a display device. The photoelectric detector includes a base, and a thin film transistor (TFT) and a photosensitive PIN device on the base, wherein the PIN device includes an I-type region that does not overlap with an orthographic projection of the TFT on the base; a first etching barrier layer covering a top surface of the I-type region; a first heavily doped region in contact with a side surface on a side, proximate to the TFT, of the I-type region; and a second heavily doped region in contact with a side surface on a side, away from the TFT, of the I-type region, the doping types of the first heavily doped region and the second heavily doped region being different from each other.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: November 23, 2021
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Chao Li, Jianhua Du, Feng Guan, Yupeng Gao, Zhaohui Qiang, Zhi Wang, Yang Lyu, Chao Luo
  • Patent number: 11121257
    Abstract: The present disclosure provides a thin film transistor, a pixel structure, a display device, and a manufacturing method. The thin film transistor includes: a gate on the substrate; a gate insulating layer covering the gate and the substrate; a first support portion and a second support portion, which are provided on the gate insulating layer covering the substrate and located on both sides of the gate, wherein the first support portion is not connected to the second support portion; a semiconductor layer on the first support portion, the second support portion, and the gate insulating layer covering the gate; and a source and a drain respectively connected to the semiconductor layer. The first support portion and the second support portion are respectively configured to support the semiconductor layer.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: September 14, 2021
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Zhaohui Qiang, Feng Guan, Zhi Wang, Yupeng Gao, Yang Lyu, Chao Li, Jianhua Du, Lei Chen
  • Publication number: 20210217909
    Abstract: The present disclosure relates to a photodiode, a method for preparing the same, and an electronic device. The photodiode includes: a first electrode layer and a semiconductor structure that are stacked, a surface of the semiconductor structure away from the first electrode layer having a first concave-convex structure; and a second electrode layer arranged on a surface of the semiconductor structure away from the first electrode layer, a surface of the second electrode layer away from the first electrode layer having a second concave-convex structure.
    Type: Application
    Filed: January 17, 2020
    Publication date: July 15, 2021
    Inventors: Jianhua DU, Chao LI, Zhaohui QIANG, Yupeng GAO, Feng GUAN, Rui HUANG, Zhi WANG, Yang LV, Chao LUO
  • Publication number: 20210151476
    Abstract: A photosensor includes a base substrate; an insulating layer on the base substrate; and a photodiode including a semiconductor junction on a side of the insulating layer away from the base substrate. The semiconductor junction includes a first polarity semiconductor layer, an intrinsic semiconductor layer, and a second polarity semiconductor layer, stacked on the insulating layer. The second polarity semiconductor layer encapsulates a lateral surface of the intrinsic semiconductor layer.
    Type: Application
    Filed: March 18, 2019
    Publication date: May 20, 2021
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Chao Li, Jianhua Du, Feng Guan, Zhaohui Qiang, Zhi Wang, Yupeng Gao, Yang Lv
  • Publication number: 20210111200
    Abstract: The present disclosure discloses a method for preparing an array substrate, an array substrate and a display panel, wherein the method comprises: forming a buffer layer on a substrate in a first region and a second region, wherein the buffer layer has a groove located in the second region; forming a first indium oxide thin film on the buffer layer in the first region; forming a second indium oxide thin film in the groove; performing a reduction process on the second indium oxide thin film to obtain indium particles; forming an amorphous silicon thin film in the groove, and inducing the amorphous silicon of the amorphous silicon thin film to form microcrystalline silicon at a preset temperature by using the indium particles; and removing the indium particles in the microcrystalline silicon to form a microcrystalline silicon semiconductor layer of the microcrystalline silicon thin film transistor.
    Type: Application
    Filed: April 13, 2020
    Publication date: April 15, 2021
    Inventors: Yupeng GAO, Guangcai YUAN, Feng GUAN, Zhi WANG, Jianhua DU, Zhaohui QIANG, Chao LI