Patents by Inventor Zhen Peng
Zhen Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11120185Abstract: The computer processor identifies a first shared set of input ports that are common to a first hardware model and a second hardware model and a second shared set of input ports that are common to a first reference model and a second reference model. The computer processor selects logic of the first hardware model and logic of the second hardware model that are each traceable to the first shared set of input ports and selects logic of the first reference model and logic of the second reference model that are each traceable to the second shared set of input ports. The computer processor determines that the logic of the second hardware model and the logic of the second reference model have verified logic by determining that the logic of the first hardware model is equivalent to the logic of the second hardware model and the logic of the first reference model is equivalent to the logic of the second reference model.Type: GrantFiled: November 29, 2018Date of Patent: September 14, 2021Assignee: International Business Machines CorporationInventors: Yan Heng Lu, Chen Qian, Zhen Peng Zuo, Heng Liu, Peng Fei Gou, Yang Fan Liu
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Patent number: 11048630Abstract: A symmetrical multi-processing (SMP) node, a distributed SMP (DSMP) system comprising a plurality of SMP nodes, and a method implemented in the SMP node are disclosed. The SMP node comprises: a plurality of processors, a memory coupled to the plurality of processors, and a memory coherent proxy coupled to the plurality of processors through a coherent accelerator interface. The memory coherent proxy is configured to manage statuses of cache lines in the memory.Type: GrantFiled: November 27, 2018Date of Patent: June 29, 2021Assignee: International Business Machines CorporationInventors: Zhen Peng Zuo, Peng Fei Gou, Yang Fan Liu, Yang Liu, Hua Xin Yao
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Publication number: 20210139638Abstract: Described herein is a method for producing a PU foam insole, including the following steps of: (1) pouring the raw materials used to form a PU foam into a mould, reacting to obtain a PU sheet, where the height of the mould cavity is from about 1.0 to about 1.6 times of the total thickness of two finished insoles; (2) splitting the PU sheet into two halves in the horizontal direction to obtain two pieces of PU insole material, where one surface of the material has open pores, and the other surface of the material has a skin; and (3) attaching a piece of fabric onto the surface having open pores of the material obtained in step (2). Also described herein is a PU foam insole produced by the method.Type: ApplicationFiled: December 4, 2018Publication date: May 13, 2021Inventors: Zhen Peng LIANG, Yun Bang ZHONG
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Publication number: 20210086407Abstract: A method of forming a large-area nanoimprint mold master is provided. The method includes positioning a plurality of sub-master tiles on a rigid planar substrate. Each sub-master tile of the sub-master tile plurality has a nanoscale pattern and represents a subsection of the large-area nanoimprint mold master. The method further includes adhering the plurality of sub-master tiles to the rigid planar substrate. The positioning determines a distance between a nanoscale feature of the nanoscale pattern on each sub-master tile of a pair of adjacent sub-master tiles. The distance has microscale positioning tolerance. Also provided are a large-area nanoimprint mold master and a method of large-area nanoimprint lithography.Type: ApplicationFiled: December 4, 2020Publication date: March 25, 2021Inventors: Zhen Peng, Sonny Vo, Emeline Soichi
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Publication number: 20210054391Abstract: Disclosed is a method for overcoming self-incompatibility of diploid potatoes, including: (1) selecting a target fragment; (2) constructing a gene-targeting recombinant vector; (3) achieving a loss-of-function mutation of the intracellular S-RNase gene; (4) regenerating a plurality of potato plants; (5) specifically amplifying a DNA segment containing the target fragment of the S-RNase gene in a regenerated plant; (6) selecting a regenerated plant in which the S-RNase gene is edited; (7) further screening the selected gene-edited plant for a diploid gene-edited plant line; (8) propagating and planting the selected gene-edited plant line, and identifying the self-compatible phenotype at the flowering stage; and (9) sequencing the gene amplification products of the harvested offspring of the self-compatible plant, and detecting the inheritance and isolation of the offspring in which the target gene is edited.Type: ApplicationFiled: April 4, 2019Publication date: February 25, 2021Inventors: Sanwen HUANG, Chunzhi ZHANG, Zhen PENG, Mingwang YE
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Publication number: 20210009805Abstract: A non-pneumatic tire may include a polyurethane matrix and expanded thermoplastic elastomer particles. The non-pneumatic tire has 60 to 90 wt. % of the polyurethane matrix and 10 to 40 wt. % of the expanded thermoplastic elastomer particles. The non-pneumatic tire may be produced in a production method. The non-pneumatic tire may be used in a low-speed vehicle.Type: ApplicationFiled: March 27, 2019Publication date: January 14, 2021Applicant: BASF SEInventors: Zhen Peng LIANG, Yun Bang Zhong
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Patent number: 10830939Abstract: Multibeam diffraction grating-based backlighting includes a light guide and a multibeam diffraction grating at a surface of the light guide. The light guide is configured to guide light from a light source. The multibeam diffraction grating is configured to couple out a portion of the guided light using diffractive coupling and to direct the diffractively coupled out portion away from the light guide as a plurality of light beams with different principal angular directions having directions corresponding to view directions of a multiview display.Type: GrantFiled: February 7, 2019Date of Patent: November 10, 2020Assignee: LEIA INC.Inventors: David A. Fattal, Zhen Peng, Charles M. Santori
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Patent number: 10769331Abstract: An apparatus for verification includes a processing module, a data collection module, an engine selection module and an engine execution module. The processing module processes a netlist using a plurality of engines. The netlist includes components and nodes of an integrated circuit design. Each engine includes an algorithm for verification of the integrated circuit design. The data collection module stores, for each engine, execution results for the engine for a plurality of netlists, the results stored in a history buffer. The engine selection module, for a current netlist, calculates using execution results in the history buffer which engine of the plurality of engines has a highest predicted performance and selects the engine with the highest predicted performance. The engine execution module executes the current netlist using the selected engine to produce execution results, reports the execution results and stores the execution results in the history buffer.Type: GrantFiled: July 12, 2018Date of Patent: September 8, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Peng Fei Gou, Heng Liu, Yang Fan Liu, Yan Heng Lu, Chen Qian, Zhen Peng Zuo
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Publication number: 20200250885Abstract: A generation device includes: a communication interface via which two-dimensional (2D) images are to be received, the 2D images having been generated by photographing a space from different viewpoints with at least one camera; and a processor connected to the communication interface and configured to determine, according to the 2D images, a matching pattern to match feature points included in two pictures among the 2D images, match the feature points according to the matching pattern in order to generate first three-dimensional (3D) points, the first 3D points indicating respective first positions in the space, generate second 3D point based on the 2D images, the second 3D point indicating a second position in the space, and generate a 3D model of the space based on the first 3D points and the second 3D point.Type: ApplicationFiled: April 22, 2020Publication date: August 6, 2020Inventors: Zhen Peng BIAN, Pongsak LASANG, Toshiyasu SUGIO, Toru MATSUNOBU, Satoshi YOSHIKAWA, Tatsuya KOYAMA
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Publication number: 20200226825Abstract: A generation method is disclosed. Two-dimensional (2D) images that are generated by photographing a space from different viewpoints with at least one camera are obtained. Resolutions of the 2D images are reduced to generate first images, respectively. Second images are generated from the 2D images, respectively such that a resolution of each of the second images is higher than a resolution of any one of the first images. First three-dimensional (3D) points are generated based on the first images. The first 3D points indicate respective first positions in the space. A second 3D point is generated based on the second images. The second 3D point indicates a second position in the space. A 3D model of the space is generated based on the first 3D points and the second 3D point.Type: ApplicationFiled: March 24, 2020Publication date: July 16, 2020Inventors: Zhen Peng BIAN, Pongsak LASANG, Toshiyasu SUGIO, Toru MATSUNOBU, Satoshi YOSHIKAWA, Tatsuya KOYAMA
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Patent number: 10699044Abstract: An apparatus for model splitting includes an extraction module that extracts netlist parameters from a static netlist. The netlist parameters include node parameters of each node of the static netlist. The node parameters include node connection information and execution cycle information. The nodes of the static netlist include nodes of an integrated circuit design from an input to an output. A split node module analyzes, using the netlist parameters, each node in a cycle and determines if each node is a potential split node, which is a node with a projected sub-proof execution time less than a time limit. A split chain module determines if a split chain exists. The split chain includes a connection between potential split nodes from the input to the output at each execution cycle. A reporting module reports nodes of a split chain in response to determining that a split chain exists.Type: GrantFiled: July 13, 2018Date of Patent: June 30, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Chen Qian, Heng Liu, Peng Fei Gou, Yang Fan Liu, Yan Heng Lu, Zhen Peng Zuo
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Publication number: 20200175299Abstract: A example receiver includes analog circuitry configured to equalize and amplify an input signal and provide an analog signal as output; clock data recovery (CDR) circuitry configured to recover data clocks and edge clocks from the analog signal; a plurality of eye height optimization circuits, each of the plurality of eye height optimization circuits configured to, based on a respective data pattern of a plurality of data patterns, sample the analog signal based on the data clocks and the edge clocks, feed back first information to the analog circuitry for adjusting the eye amplitude, and feed back second information to the CDR circuitry for adjusting the data clocks; and an eye width optimization circuit configured to receive data and edge samples from the plurality of eye height optimization circuits, feed back third information to the CDR circuitry to adjust the edge clocks, and feed back fourth information to the analog circuitry to adjust the equalization.Type: ApplicationFiled: November 30, 2018Publication date: June 4, 2020Inventors: Xiao Di XING, Zhen Peng ZUO, Yang XIAO, Xu Guang SUN
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Publication number: 20200175128Abstract: The computer processor identifies a first shared set of input ports that are common to a first hardware model and a second hardware model and a second shared set of input ports that are common to a first reference model and a second reference model. The computer processor selects logic of the first hardware model and logic of the second hardware modelt that are each traceable to the first shared set of input ports and selects logic of the first reference model and logic of the second reference model that are each traceable to the second shared set of input ports. The computer processor determines that the logic of the second hardware model and the logic of the second reference model have verified logic by determining that the logic of the first hardware model is equivalent to the logic of the second hardware model and the logic of the first reference model is equivalent to the logic of the second reference model.Type: ApplicationFiled: November 29, 2018Publication date: June 4, 2020Inventors: Yan Heng LU, Chen QIAN, Zhen Peng ZUO, Heng LIU, Peng Fei GOU, Yang Fan LIU
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Publication number: 20200167283Abstract: A symmetrical multi-processing (SMP) node, a distributed SMP (DSMP) system comprising a plurality of SMP nodes, and a method implemented in the SMP node are disclosed. The SMP node comprises: a plurality of processors, a memory coupled to the plurality of processors, and a memory coherent proxy coupled to the plurality of processors through a coherent accelerator interface. The memory coherent proxy is configured to manage statuses of cache lines in the memory.Type: ApplicationFiled: November 27, 2018Publication date: May 28, 2020Inventors: Zhen Peng Zuo, Peng Fei Gou, Yang Fan Liu, Yang Liu, Hua Xin Yao
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Patent number: 10658539Abstract: A light emitting diode device is described which includes at least one planar non-periodic high-index-contrast grating. The light emitting diode device includes a cavity formed between a reflective optical element and a transmissive optical element. One or both of the optical elements can be a planar non-periodic high-index-contrast grating. The transmissive optical element can be a collimating lens used to collimate incident beams of light while the reflective optical element can be a parabolic reflector used to reflect incident beams of light along a direction opposite to an incidence direction. A light emitter can be disposed within the cavity and can emit beams of light.Type: GrantFiled: January 5, 2016Date of Patent: May 19, 2020Assignee: Hewlett Packard Enterprise Development LPInventors: Zhen Peng, Nathaniel Quitoriano, Marco Fiorentino
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Patent number: 10585841Abstract: Techniques and systems for performing calibration. A method includes: creating a common calibration pool for performing a calibration operation for two or more communication links, wherein the calibration operation is common to the two or more communication links; and performing a calibration on each of the two or more communication links using the common calibration pool by receiving a calibration request associated with the common calibration operation via a link calibration interface, wherein the calibration request is from at least one of the two or more communication links, upon determining the calibration agent is available to handle the calibration request, retrieving a calibration engine from at least one of the plurality of calibration clusters corresponding to the calibration operation, retrieving a calibration engine from at least one of the plurality of calibration clusters corresponding to the calibration operation, and performing the common calibration based on the retrieving.Type: GrantFiled: July 24, 2018Date of Patent: March 10, 2020Assignee: International Business Machines CorporationInventors: Xu Guang Sun, Yang Xiao, Xiao Di Xing, Zhen Peng Zuo
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Publication number: 20200034328Abstract: Techniques and systems for performing calibration. A method includes: creating a common calibration pool for performing a calibration operation for two or more communication links, wherein the calibration operation is common to the two or more communication links; and performing a calibration on each of the two or more communication links using the common calibration pool by receiving a calibration request associated with the common calibration operation via a link calibration interface, wherein the calibration request is from at least one of the two or more communication links, upon determining the calibration agent is available to handle the calibration request, retrieving a calibration engine from at least one of the plurality of calibration clusters corresponding to the calibration operation, retrieving a calibration engine from at least one of the plurality of calibration clusters corresponding to the calibration operation, and performing the common calibration based on the retrieving.Type: ApplicationFiled: July 24, 2018Publication date: January 30, 2020Inventors: Xu Guang SUN, Yang XIAO, Xiao Di XING, Zhen Peng ZUO
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Publication number: 20200019654Abstract: An apparatus for verification includes a processing module, a data collection module, an engine selection module and an engine execution module. The processing module processes a netlist using a plurality of engines. The netlist includes components and nodes of an integrated circuit design. Each engine includes an algorithm for verification of the integrated circuit design. The data collection module stores, for each engine, execution results for the engine for a plurality of netlists, the results stored in a history buffer. The engine selection module, for a current netlist, calculates using execution results in the history buffer which engine of the plurality of engines has a highest predicted performance and selects the engine with the highest predicted performance. The engine execution module executes the current netlist using the selected engine to produce execution results, reports the execution results and stores the execution results in the history buffer.Type: ApplicationFiled: July 12, 2018Publication date: January 16, 2020Inventors: PENG FEI GOU, HENG LIU, YANG FAN LIU, YAN HENG LU, CHEN QIAN, ZHEN PENG ZUO
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Publication number: 20200019652Abstract: An apparatus for model splitting includes an extraction module that extracts netlist parameters from a static netlist. The netlist parameters include node parameters of each node of the static netlist. The node parameters include node connection information and execution cycle information. The nodes of the static netlist include nodes of an integrated circuit design from an input to an output. A split node module analyzes, using the netlist parameters, each node in a cycle and determines if each node is a potential split node, which is a node with a projected sub-proof execution time less than a time limit. A split chain module determines if a split chain exists. The split chain includes a connection between potential split nodes from the input to the output at each execution cycle. A reporting module reports nodes of a split chain in response to determining that a split chain exists.Type: ApplicationFiled: July 13, 2018Publication date: January 16, 2020Inventors: CHEN QIAN, HENG LIU, PENG FEI GOU, YANG FAN LIU, YAN HENG LU, ZHEN PENG ZUO
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Publication number: 20190170926Abstract: Multibeam diffraction grating-based backlighting includes a light guide and a multibeam diffraction grating at a surface of the light guide. The light guide is configured to guide light from a light source. The multibeam diffraction grating is configured to couple out a portion of the guided light using diffractive coupling and to direct the diffractively coupled out portion away from the light guide as a plurality of light beams with different principal angular directions having directions corresponding to view directions of a multiview display.Type: ApplicationFiled: February 7, 2019Publication date: June 6, 2019Inventors: David A. Fattal, Zhen Peng, Charles M. Santori