Patents by Inventor Zhen-Yu Li

Zhen-Yu Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190352187
    Abstract: The present disclosure provides a method for repairing defect of graphene, including: firstly introducing a composite fluid containing a reactive compound and a supercritical fluid to a reactor where the graphene powder has been placed, and impregnating the graphene powder with the composite fluid to passivate and repair the defect of graphene, wherein the reactive compound includes carbon, hydrogen, nitrogen, silicon or oxygen element; and separating the composite fluid from the graphene powder, simultaneously using molecular sieves to absorb the graphene from the composite fluid. The present disclosure further provides the graphene powder prepared by the method above. With the method of the present disclosure, it effectively reduces the ratio of the defect of the graphene, increases the content of the graphene, and has less-layer graphene with high thermal conductivity and electrical conductivity.
    Type: Application
    Filed: May 15, 2019
    Publication date: November 21, 2019
    Inventors: Zhen-Yu Li, Po-Min Tu, Chia-Jung Chen, Yeu-Wen Huang
  • Patent number: 9966366
    Abstract: A lighting device includes a plurality of light-emitting diodes including a first light-emitting diode with a non-rectangular shape in a top view, a submount to which each of the plurality of light-emitting diodes is coupled, and a plurality of conductive elements formed between the submount and the plurality of light-emitting diodes to electrically connecting at least a portion of the plurality of light-emitting diodes with each other in series.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: May 8, 2018
    Assignee: EPISTAR CORPORATION
    Inventors: Kuan-Chun Chen, Hao-Chung Kuo, You-Da Lin, Zhen-Yu Li
  • Publication number: 20180040267
    Abstract: A display apparatus and a driving circuit thereof are disclosed. The display apparatus includes a display panel, a timing controller and a plurality of driving circuits. The timing controller is used to generate a plurality of independent timing control signals respectively. The plurality of driving circuits is coupled between the timing controller and the display panel respectively. The plurality of driving circuits receives the plurality of independent timing control signals respectively and generates a plurality of independent clock signals respectively. The plurality of driving circuits randomly performs different modulations on the plurality of independent clock signals respectively to make different changes on phases of the plurality of clock signals with time. Therefore, the phases of the plurality of clock signals generated by the plurality of driving circuits will be different.
    Type: Application
    Filed: August 2, 2017
    Publication date: February 8, 2018
    Inventors: Chih Chuan HUANG, Zhen-Yu LI
  • Publication number: 20170294301
    Abstract: The present disclosure involves a method of fabricating a semiconductor device. A surface of a silicon wafer is cleaned. A first buffer layer is then epitaxially grown on the silicon wafer. The first buffer layer contains an aluminum nitride (AlN) material. A second buffer layer is then epitaxially grown on the first buffer layer. The second buffer layer includes a plurality of aluminum gallium nitride (AlxGa1?xN) sub-layers. Each of the sub-layers has a respective value for x that is between 0 and 1. A value of x for each sub-layer is a function of its position within the second buffer layer. A first gallium nitride (GaN) layer is epitaxially grown over the second buffer layer. A third buffer layer is then epitaxially grown over the first GaN layer. A second GaN layer is then epitaxially grown over the third buffer layer.
    Type: Application
    Filed: June 26, 2017
    Publication date: October 12, 2017
    Inventors: Zhen-Yu Li, Hsing-Kuo Hsia, Hao-Chung Kuo
  • Patent number: 9691855
    Abstract: The present disclosure involves a method of fabricating a semiconductor device. A surface of a silicon wafer is cleaned. A first buffer layer is then epitaxially grown on the silicon wafer. The first buffer layer contains an aluminum nitride (AlN) material. A second buffer layer is then epitaxially grown on the first buffer layer. The second buffer layer includes a plurality of aluminum gallium nitride (AlxGa1-xN) sub-layers. Each of the sub-layers has a respective value for x that is between 0 and 1. A value of x for each sub-layer is a function of its position within the second buffer layer. A first gallium nitride (GaN) layer is epitaxially grown over the second buffer layer. A third buffer layer is then epitaxially grown over the first GaN layer. A second GaN layer is then epitaxially grown over the third buffer layer.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: June 27, 2017
    Assignee: Epistar Corporation
    Inventors: Zhen-Yu Li, Hsing-Kuo Hsia, Hao-Chung Kuo
  • Patent number: 9673352
    Abstract: A light emitting device is provided. The light emitting device includes a substrate, an N type semiconductor layer formed on the substrate, an active layer, an electron-blocking layer, and a P type semiconductor layer formed on the electron-blocking layer. An N side electrode is formed on a first portion of the N type semiconductor layer, and the active layer is formed on a second portion of the N type semiconductor layer. The electron-blocking layer is a super lattice multi-layer structure formed on the active layer, the P type semiconductor layer is formed on the electron-blocking layer, and a P side electrode is formed on a portion of the P type semiconductor layer.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: June 6, 2017
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Chun-Yen Chang, Zhen-Yu Li, Hao-Chung Kuo
  • Patent number: 9660066
    Abstract: A high electron mobility transistor is provided, which includes a substrate, a superlattice structure formed on the substrate, and a transistor epitaxial structure formed on the superlattice structure such that the superlattice structure is interposed between the substrate and the transistor epitaxial layer. As the high electron mobility transistor has the carbon-doped AlN/GaN superlattice structure between the substrate and the transistor epitaxial layer. Thus, the present invention can effectively reduce vertical leakage current, so as to improve the epitaxial quality and the breakdown voltage of the high electron mobility transistor.
    Type: Grant
    Filed: October 1, 2015
    Date of Patent: May 23, 2017
    Inventors: Zhen-Yu Li, An-Jye Tzou, Hao-Chung Kuo, Chunyen Chang
  • Patent number: 9559977
    Abstract: A system and method can support dynamically scaling up/down transactional resources in a transactional middleware machine environment. Transactional resources, such as groups and machines, can be added or removed using a dynamic resource broker according to resource usage changes. The transactional middleware machine environment can comprise a deployment center in the transactional middleware machine environment, wherein the deployment center maintains one or more deployment policies for the transactional middleware machine environment and one or more deployment agents. Each of the one or more deployment agents is associated with a transactional middleware machine of a plurality of transactional middleware machines in a transactional domain in the transactional middleware machine environment.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: January 31, 2017
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Jared Zhen Yu Li, Lidan Liu
  • Publication number: 20160365337
    Abstract: A lighting device includes a plurality of light-emitting diodes including a first light-emitting diode with a non-rectangular shape in a top view, a submount to which each of the plurality of light-emitting diodes is coupled, and a plurality of conductive elements formed between the submount and the plurality of light-emitting diodes to electrically connecting at least a portion of the plurality of light-emitting diodes with each other in series.
    Type: Application
    Filed: August 29, 2016
    Publication date: December 15, 2016
    Inventors: Kuan-Chun CHEN, Hao-Chung KUO, You-Da LIN, Zhen-Yu LI
  • Publication number: 20160322533
    Abstract: A light emitting device is provided. The light emitting device includes a substrate, an N type semiconductor layer formed on the substrate, an active layer, an electron-blocking layer, and a P type semiconductor layer formed on the electron-blocking layer. An N side electrode is formed on a first portion of the N type semiconductor layer, and the active layer is formed on a second portion of the N type semiconductor layer. The electron-blocking layer is a super lattice multi-layer structure formed on the active layer, the P type semiconductor layer is formed on the electron-blocking layer, and a P side electrode is formed on a portion of the P type semiconductor layer.
    Type: Application
    Filed: April 30, 2015
    Publication date: November 3, 2016
    Inventors: Chun-Yen Chang, Zhen-Yu Li, Hao-Chung Kuo
  • Patent number: 9431576
    Abstract: A lighting device includes a plurality of light-emitting diodes including a first light-emitting diode with a non-rectangular shape in a top view, a submount to which each of the plurality of light-emitting diodes is coupled, and a plurality of conductive elements formed between the submount and the plurality of light-emitting diodes to electrically connecting at least a portion of the plurality of light-emitting diodes with each other in series.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: August 30, 2016
    Assignee: EPISTAR CORPORATION
    Inventors: Kuan-Chun Chen, Hao-Chung Kuo, You-Da Lin, Zhen-Yu Li
  • Publication number: 20160211330
    Abstract: A high electron mobility transistor is provided, which includes a substrate, a superlattice structure formed on the substrate, and a transistor epitaxial structure formed on the superlattice structure such that the superlattice structure is interposed between the substrate and the transistor epitaxial layer. As the high electron mobility transistor has the carbon-doped AlN/GaN superlattice structure between the substrate and the transistor epitaxial layer. Thus, the present invention can effectively reduce vertical leakage current, so as to improve the epitaxial quality and the breakdown voltage of the high electron mobility transistor.
    Type: Application
    Filed: October 1, 2015
    Publication date: July 21, 2016
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Zhen-Yu LI, An-Jye TZOU, Hao-Chung KUO, Chunyen CHANG
  • Patent number: 9312432
    Abstract: The present disclosure involves an apparatus. The apparatus includes a photonic die structure that includes a light-emitting diode (LED) die. The LED die is a vertical LED die in some embodiments. The LED die includes a substrate. A p-doped III-V compound layer and an n-doped III-V compound layer are each disposed over the substrate. A multiple quantum well (MQW) layer is disposed between the p-doped III-V compound layer and the n-doped III-V compound layer. The p-doped III-V compound layer includes a first region having a non-exponential doping concentration characteristic and a second region having an exponential doping concentration characteristic. In some embodiments, the second region is formed using a lower pressure than the first region.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: April 12, 2016
    Assignee: TSMC SOLID STATE LIGHTING LTD.
    Inventors: Ming-Hua Lo, Zhen-Yu Li, Hsing-Kuo Hsia, Hao-Chung Kuo
  • Publication number: 20150340553
    Abstract: A photonic device includes: a first-type III-V group layer; a second-type III-V group layer formed on the first-type III-V group layer; and a multi-quantum well layer disposed between the first-type III-V group layer and the second-type III-V group layer; wherein: the multi-quantum well layer comprises a plurality of active layers interleaved with a plurality of barrier layers such that each barrier layer is separated from adjacent barrier layers by a respective one of the active layer; a material of each barrier layer comprises semiconductor compound devoid of Al element; the barrier layers comprises a first group layers between the first-type III-V group layer and the second-type III-V group layer and a second group layers between the second-type III-V group layer and the first group layers, and a thickness of each barrier layer of the first group layers is greater than that of each barrier layer of the second group layers; and the barrier layers of the first group layers comprise uniform thickness.
    Type: Application
    Filed: August 4, 2015
    Publication date: November 26, 2015
    Inventors: Zhen-Yu Li, Hon-Way Lin, Chung-Pao Lin, Hsing-Kuo Hsia, Hao-Chung Kuo
  • Publication number: 20150311391
    Abstract: A lighting device includes a plurality of light-emitting diodes including a first light-emitting diode with a non-rectangular shape in a top view, a submount to which each of the plurality of light-emitting diodes is coupled, and a plurality of conductive elements formed between the submount and the plurality of light-emitting diodes to electrically connecting at least a portion of the plurality of light-emitting diodes with each other in series.
    Type: Application
    Filed: July 6, 2015
    Publication date: October 29, 2015
    Inventors: Kuan-Chun CHEN, Hao-Chung KUO, You-Da LIN, Zhen-Yu LI
  • Patent number: 9099593
    Abstract: The present disclosure involves an illumination apparatus. The illumination apparatus includes an n-doped semiconductor compound layer, a p-doped semiconductor compound layer spaced apart from the n-doped semiconductor compound layer, and a multiple-quantum-well (MQW) disposed between the first semiconductor compound layer and the second semiconductor compound layer. The MQW includes a plurality of alternating first and second layers. The first layers of the MQW have substantially uniform thicknesses. The second layers have graded thicknesses with respect to distances from the p-doped semiconductor compound layer. A subset of the second layers located most adjacent to the p-doped semiconductor compound layer is doped with a p-type dopant. The doped second layers have graded doping concentration levels that vary with respect to distances from the p-doped semiconductor layer.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: August 4, 2015
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Zhen-Yu Li, Hon-Way Lin, Chung-Pao Lin, Hsing-Kuo Hsia, Hao-Chung Kuo
  • Patent number: 9076950
    Abstract: A lighting apparatus includes a polygon die including a plurality of light-emitting diodes (LEDs), and a submount to which each of the LEDs is coupled. Each LED includes a plurality of epi-layers which contains a p-type layer, an n-type layer, and a multiple quantum well (MQW) disposed between the p-type layer and the n-type layer, and a p-type electrode and an n-type electrode which are electrically coupled to the p-type layer and the n-type layer, respectively. The p-type and the n-type electrodes are located between the submount and the epi-layers. The submount contains a plurality of conductive elements configured to electrically couple at least a portion of the plurality of LEDs in series. At least some of the plurality of LEDs have non-rectangular top view shapes.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: July 7, 2015
    Assignee: TSMC SOLID STATE LIGHTING LTD.
    Inventors: Kuan-Chun Chen, Hao-Chung Kuo, You-Da Lin, Zhen-Yu Li
  • Publication number: 20150171266
    Abstract: The present disclosure involves an apparatus. The apparatus includes a substrate having a front side a back side opposite the front side. The substrate includes a plurality of openings formed from the back side of the substrate. The openings collectively define a pattern on the back side of the substrate from a planar view. In some embodiments, the substrate is a silicon substrate or a silicon carbide substrate. Portions of the silicon substrate vertically aligned with the openings have vertical dimensions that vary from about 100 microns to about 300 microns. A III-V group compound layer is formed over the front side of the silicon substrate. The III-V group compound layer is a component of one of: a light-emitting diode (LED), a laser diode (LD), and a high-electron mobility transistor (HEMT).
    Type: Application
    Filed: February 25, 2015
    Publication date: June 18, 2015
    Inventors: Zhen-Yu Li, Chung-Pao Lin, Hsing-Kuo Hsia, Hao-Chung Kuo, Cindy Huichun Shu, Hsin-Chieh Huang
  • Patent number: 8981534
    Abstract: The present disclosure involves an apparatus. The apparatus includes a substrate having a front side a back side opposite the front side. The substrate includes a plurality of openings formed from the back side of the substrate. The openings collectively define a pattern on the back side of the substrate from a planar view. In some embodiments, the substrate is a silicon substrate or a silicon carbide substrate. Portions of the silicon substrate vertically aligned with the openings have vertical dimensions that vary from about 100 microns to about 300 microns. A III-V group compound layer is formed over the front side of the silicon substrate. The III-V group compound layer is a component of one of: a light-emitting diode (LED), a laser diode (LD), and a high-electron mobility transistor (HEMT).
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: March 17, 2015
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Zhen-Yu Li, Chung-Pao Lin, Hsing-Kuo Hsia, Hao-Chung Kuo, Cindy Huichun Shu, Hsin-Chieh Huang
  • Publication number: 20150055671
    Abstract: The present disclosure involves a light-emitting device. The light-emitting device includes an n-doped gallium nitride (n-GaN) layer located over a substrate. A multiple quantum well (MQW) layer is located over the n-GaN layer. An electron-blocking layer is located over the MQW layer. A p-doped gallium nitride (p-GaN) layer is located over the electron-blocking layer. The light-emitting device includes a hole injection layer. In some embodiments, the hole injection layer includes a p-doped indium gallium nitride (p-InGaN) layer that is located in one of the three following locations: between the MQW layer and the electron-blocking layer; between the electron-blocking layer and the p-GaN layer; and inside the p-GaN layer.
    Type: Application
    Filed: November 5, 2014
    Publication date: February 26, 2015
    Inventors: Zhen-Yu Li, Tzu-Te Yang, Hon-Way Lin, Chung-Pao Lin, Kuan-Chun Chen, Ching-Yu Chen, You-Da Lin, Hao-Chung Kuo