Abstract: The present disclosure involves an apparatus. The apparatus includes a substrate having a front side a back side opposite the front side. The substrate includes a plurality of openings formed from the back side of the substrate. The openings collectively define a pattern on the back side of the substrate from a planar view. In some embodiments, the substrate is a silicon substrate or a silicon carbide substrate. Portions of the silicon substrate vertically aligned with the openings have vertical dimensions that vary from about 100 microns to about 300 microns. A III-V group compound layer is formed over the front side of the silicon substrate. The III-V group compound layer is a component of one of: a light-emitting diode (LED), a laser diode (LD), and a high-electron mobility transistor (HEMT).

Abstract: The present disclosure involves a light-emitting device. The light-emitting device includes an n-doped gallium nitride (n-GaN) layer located over a substrate. A multiple quantum well (MQW) layer is located over the n-GaN layer. An electron-blocking layer is located over the MQW layer. A p-doped gallium nitride (p-GaN) layer is located over the electron-blocking layer. The light-emitting device includes a hole injection layer. In some embodiments, the hole injection layer includes a p-doped indium gallium nitride (p-InGaN) layer that is located in one of the three following locations: between the MQW layer and the electron-blocking layer; between the electron-blocking layer and the p-GaN layer; and inside the p-GaN layer.

Abstract: A system and method can support dynamically scaling up/down transactional resources in a transactional middleware machine environment. Transactional resources, such as groups and machines, can be by added or removed using a dynamic resource broker according to resource usage changes. The transactional middleware machine environment can comprise a deployment center in the transactional middleware machine environment, wherein the deployment center maintains one or more deployment policies for the transactional middleware machine environment and one or more deployment agents. Each of the one or more deployment agents is associated with a transactional middleware machine of a plurality of transactional middleware machines in a transactional domain in the transactional middleware machine environment.

Abstract: A nano-patterned substrate includes a substrate and a plurality of nano-structures. The substrate has an upper surface and each of the plurality of nano-structures comprises a semiconductor buffer region and a buffer region formed on the upper surface of the substrate, wherein one of the pluralities of nano-structures has a ratio of height to diameter greater than 1, and an arc-shaped top surface.

Abstract: The present disclosure involves an apparatus. The apparatus includes a substrate having a front side a back side opposite the front side. The substrate includes a plurality of openings formed from the back side of the substrate. The openings collectively define a pattern on the back side of the substrate from a planar view. In some embodiments, the substrate is a silicon substrate or a silicon carbide substrate. Portions of the silicon substrate vertically aligned with the openings have vertical dimensions that vary from about 100 microns to about 300 microns. A III-V group compound layer is formed over the front side of the silicon substrate. The III-V group compound layer is a component of one of: a light-emitting diode (LED), a laser diode (LD), and a high-electron mobility transistor (HEMT).

Abstract: The present disclosure involves a light-emitting device. The light-emitting device includes an n-doped gallium nitride (n-GaN) layer located over a substrate. A multiple quantum well (MQW) layer is located over the n-GaN layer. An electron-blocking layer is located over the MQW layer. A p-doped gallium nitride (p-GaN) layer is located over the electron-blocking layer. The light-emitting device includes a hole injection layer. In some embodiments, the hole injection layer includes a p-doped indium gallium nitride (p-InGaN) layer that is located in one of the three following locations: between the MQW layer and the electron-blocking layer; between the electron-blocking layer and the p-GaN layer; and inside the p-GaN layer.

Abstract: The present disclosure involves an illumination apparatus. The illumination apparatus includes an n-doped semiconductor compound layer, a p-doped semiconductor compound layer spaced apart from the n-doped semiconductor compound layer, and a multiple-quantum-well (MQW) disposed between the first semiconductor compound layer and the second semiconductor compound layer. The MQW includes a plurality of alternating first and second layers. The first layers of the MQW have substantially uniform thicknesses. The second layers have graded thicknesses with respect to distances from the p-doped semiconductor compound layer. A subset of the second layers located most adjacent to the p-doped semiconductor compound layer is doped with a p-type dopant. The doped second layers have graded doping concentration levels that vary with respect to distances from the p-doped semiconductor layer.

Abstract: The present disclosure involves a lighting apparatus. The lighting apparatus includes a polygon die. The polygon die includes a plurality of light-emitting diodes (LEDs). Each LED includes a plurality of epi-layers, the epi-layers containing a p-type layer, an n-type layer, and a multiple quantum well (MQW) disposed between the p-type layer and the n-type layer. Each LED includes a p-type electrode and an n-type electrode electrically coupled to the p-type layer and the n-type layer, respectively. The polygon die also includes a submount to which each of the LEDs is coupled. The p-type and the n-type electrodes are located between the submount and the epi-layers. The submount contains a plurality of conductive elements configured to electrically couple at least a portion of the plurality of LEDs in series.

Abstract: A semiconductor light emitting device is disclosed, which comprises: a substrate having a first surface and a second surface; a first semiconductor conductive layer is disposed on the first surface of the substrate; an insert layer is disposed on the first semiconductor conductive layer; an active layer is disposed on the insert layer; a second semiconductor conductive layer is disposed on the active layer; a first electrode is disposed on the second semiconductor conductive layer; and a second electrode is disposed on the second surface of the substrate, in which the electric of the second electrode is opposite to that of the first electrode.

Abstract: The present disclosure involves an apparatus. The apparatus includes a photonic die structure that includes a light-emitting diode (LED) die. The LED die is a vertical LED die in some embodiments. The LED die includes a substrate. A p-doped III-V compound layer and an n-doped III-V compound layer are each disposed over the substrate. A multiple quantum well (MQW) layer is disposed between the p-doped III-V compound layer and the n-doped III-V compound layer. The p-doped III-V compound layer includes a first region having a non-exponential doping concentration characteristic and a second region having an exponential doping concentration characteristic. In some embodiments, the second region is formed using a lower pressure than the first region.

Abstract: The present disclosure involves an apparatus. The apparatus includes a photonic die structure that includes a plurality of layers. A current blocking layer is embedded in one of the plurality of layers. The current blocking layer is a doped layer. The present disclosure also involves a method of fabricating a light-emitting diode (LED). As a part of the method, an LED is provided. The LED includes a plurality of layers. A patterned mask is then formed over the LED. The patterned mask contains an opening. A dopant is introduced through the opening to a layer of the LED through either an ion implantation process or a thermal diffusion process. As a result of the dopant being introduced, a doped current blocking component is formed to be embedded within the layer of the LED.

Abstract: The present disclosure involves a method of fabricating a semiconductor device. A surface of a silicon wafer is cleaned. A first buffer layer is then epitaxially grown on the silicon wafer. The first buffer layer contains an aluminum nitride (AlN) material. A second buffer layer is then epitaxially grown on the first buffer layer. The second buffer layer includes a plurality of aluminum gallium nitride (AlxGa1?xN) sub-layers. Each of the sub-layers has a respective value for x that is between 0 and 1. A value of x for each sub-layer is a function of its position within the second buffer layer. A first gallium nitride (GaN) layer is epitaxially grown over the second buffer layer. A third buffer layer is then epitaxially grown over the first GaN layer. A second GaN layer is then epitaxially grown over the third buffer layer.

Abstract: There is disclosed a method for making solar cells with sensitized quantum dots in the form of nanometer metal crystals. Firstly, a first substrate is provided. Then, a silicon-based film is grown on a side of the first substrate. A pattern mask process is executed to etch areas of the silicon-based film. Nanometer metal particles are provided on areas of the first substrate exposed from the silicon-based film. A metal electrode is attached to an opposite side of the first substrate. A second substrate is provided. A transparent conductive film is grown on the second substrate. A metal catalytic film is grown on the transparent conductive film. The second substrate, the transparent conductive film and the metal catalytic film together form a laminate. The laminate is inverted and provided on the first substrate. Finally, electrolyte is provided between the first substrate and the metal catalytic film.

Abstract: There is disclosed a method for making solar cells with sensitized quantum dots in the form of nanometer metal crystals. Firstly, a first substrate is provided. Then, a silicon-based film is grown on a side of the first substrate. A pattern mask process is executed to etch areas of the silicon-based film. Nanometer metal particles are provided on areas of the first substrate exposed from the silicon-based film. A metal electrode is attached to an opposite side of the first substrate. A second substrate is provided. A transparent conductive film is grown on the second substrate. A metal catalytic film is grown on the transparent conductive film. The second substrate, the transparent conductive film and the metal catalytic film together form a laminate. The laminate is inverted and provided on the first substrate. Finally, electrolyte is provided between the first substrate and the metal catalytic film.

Abstract: A nano-patterned substrate includes a plurality of nano-particles or nanopillars on an upper surface thereof. A ratio of height to diameter of each of the nano-particles or each of the nanopillars is either greater than or equal to 1. Particularly, a ratio of height to diameter of the nanopillars is greater than or equal to 5. Each of the nano-particles or each of the nanopillars has an arc-shaped top surface. When an epitaxial growth process is applied onto the nano-patterned substrate to form an epitaxial layer, the epitaxial layer has very low defect density. Thus, a production yield of fabricating the subsequent device can be improved.

Abstract: There is disclosed a method for coating nanometer metal particles. The step includes three steps. At the first step, a substrate is provided. At the second step, the substrate is coated with a metal layer. At the third step, the metal layer is annealed so that the metal layer is transformed into nanometer metal particles.

Abstract: A method is disclosed for making a thin-film poly-crystalline silicon solar cell. In the method, there is provided an ITO-glass substrate by coating a glass substrate with a transparent and conductive ITO film. An amorphous silicon film is grown on the ITO-glass substrate. An aluminum film is grown on the amorphous silicon film. The aluminum film and the amorphous silicon film are annealed and therefore converted and interchanged into an aluminum-silicon alloy film and a p+ poly-crystalline silicon film, respectively. In a low-temperature plasma-based deposition process, a p? poly-crystalline silicon film is coated on the p+ poly-crystalline silicon film, and an n+ poly-crystalline silicon film is coated on the p? poly-crystalline silicon film. An ohmic contact is provided on the transparent and conductive ITO film. Other ohmic contacts are provided on the n+ poly-crystalline silicon film. An anti-reflection film is coated on the n+ poly-crystalline silicon film.

Abstract: A method is disclosed for making a thin-film poly-crystalline silicon solar cell. In the method, there is provided an ITO-glass substrate by coating a glass substrate with a transparent and conductive ITO film. An amorphous silicon film is grown on the ITO-glass substrate. An aluminum film is grown on the amorphous silicon film. The aluminum film and the amorphous silicon film arte annealed and therefore converted into an aluminum-silicon alloy film and a p+ poly-crystalline silicon film, respectively. In a low-temperature plasma-based deposition process, a p? poly-crystalline silicon film is coated on the p+ poly-crystalline silicon film, and an n+ poly-crystalline silicon film is coated on the p? poly-crystalline silicon film. An ohm contact is provided on the transparent and conductive ITO film. Other ohm contacts are provided on the n+ poly-crystalline silicon film. An anti-reflection film is coated on the n+ poly-crystalline silicon film.