Abstract: This application provides a shift register, a gate drive circuit, a display panel, and an electronic device. The shift register includes: a node control module, electrically connected to a first level signal receive end that receives a low level, a second level signal receive end that receives a high level, a first clock signal end, a second clock signal end, a first node, and a second node; an input module, electrically connected to the second clock signal end, a trigger signal input end, and the second node; a voltage regulator module, electrically connected to the second node, a third node, and the second clock signal end; and an output module, electrically connected to the first level signal receive end, the second level signal receive end, a drive signal output end, the first node, and the third node.

Abstract: This application provides an organic light-emitting touch display panel and an organic light-emitting touch display apparatus, including a display layer (10), a touch layer (20), and a packaging layer (30) disposed between the display layer (10) and the touch layer (20), where the three layers are disposed along a thickness direction of the organic light-emitting touch display panel, and the touch layer (20) is disposed on the packaging layer (30). The display layer (10) includes a plurality of display units (11), and the display unit (11) includes a first electrode (111), a second electrode (112), and an organic light-emitting layer (113) disposed between the first electrode (111) and the second electrode (112).

Abstract: This application discloses a display control apparatus, a display apparatus, and an electronic device, relates to the field of electronic circuit technologies. A specific solution is as follows. An adjustment unit in the display control apparatus outputs an adjustment voltage in a write frame to a control-end back channel of a drive thin-film transistor in a light-emitting drive unit, so that the influence of negative bias of a threshold voltage of the drive thin-film transistor caused by a negative voltage of a first reset voltage, and therefore a transfer characteristic curve of the drive thin-film transistor shifts forward in the write frame, that is, the threshold voltage of the drive thin-film transistor shifts forward, making it easier for the drive thin-film transistor to turn on in the write frame, and increasing the brightness of the drive thin-film transistor in the write frame.

Abstract: A module integrated with an optical sensor, a display panel, and a display apparatus. A light guide plate and the optical sensor are arranged in a thickness direction. A first part of the light guide plate at least partially overlaps the optical sensor in the thickness direction, and a second part does not overlap the optical sensor. A surface that is of the first part and that is away from the optical sensor is a first protrusion structure, and an included angle between at least a partial side edge of the second part and the thickness direction is greater than 0°. In the embodiments of this application, the second part that protrudes from the optical sensor may receive an optical signal around the optical sensor, and enable the optical signal to be totally reflected inside the light guide plate.

Abstract: This application provides a display apparatus and an electronic device. The display apparatus includes a display panel, a shielding layer, and a light adjustment layer that are sequentially stacked from bottom to top. A plurality of monochrome pixels are distributed on the display panel. The shielding layer includes a light shielding structure and a plurality of through holes, the light shielding structure shields a first part of light, and the through holes are configured to allow a second part of light and a third part of light to pass through. An acute angle between the first part of light and a plane on which the display panel is located is less than a preset angle. The light adjustment layer includes a plurality of ink capsules.

Abstract: This application provides a shift register, a gate drive circuit, a display panel, and an electronic device. The shift register includes: a node control module, electrically connected to a first level signal receive end that receives a low level, a second level signal receive end that receives a high level, a first clock signal end, a second clock signal end, a first node, and a second node; an input module, electrically connected to the second clock signal end, a trigger signal input end, and the second node; a voltage regulator module, electrically connected to the second node, a third node, and the second clock signal end; and an output module, electrically connected to the first level signal receive end, the second level signal receive end, a drive signal output end, the first node, and the third node.

Abstract: This application provides a shift register, a gate drive circuit, a display panel, and an electronic device. The shift register includes a node control module, electrically connected to a first level signal receiving end, a second level signal receiving end, a first node, and a second node; an input module, electrically connected to a first clock signal end, a trigger signal input end, and the second node; an output module, electrically connected to the first level signal receiving end, the second level signal receiving end, the first node, a third node, and a drive signal output end; a first voltage stabilizing module, electrically connected to the first node, a fourth node, and the second level signal receiving end; and a second voltage stabilizing module, electrically connected to the second node, the third node, the fourth node, and a second clock signal end.

Abstract: A module integrated with an optical sensor, a display panel, and a display apparatus. A light guide plate and the optical sensor are arranged in a thickness direction. A first part of the light guide plate at least partially overlaps the optical sensor in the thickness direction, and a second part does not overlap the optical sensor. A surface that is of the first part and that is away from the optical sensor is a first protrusion structure, and an included angle between at least a partial side edge of the second part and the thickness direction is greater than 0°. In the embodiments of this application, the second part that protrudes from the optical sensor may receive an optical signal around the optical sensor, and enable the optical signal to be totally reflected inside the light guide plate.

Abstract: A semiconductor die is provided. The semiconductor die includes a D2D transceiver composed of a single die or dual dies. The D2D transceiver includes a first D2D transmitter and a first D2D receiver. The D2D transmitter is configured to send data to a second D2D receiver in a second D2D transceiver of another semiconductor die using a first reference clock signal. The D2D receiver is configured to receive data from a second D2D transmitter in the second D2D transceiver using a second reference clock signal. Through using the embodiments of the disclosure, a transmission solution may be flexibly configured for a multi-application scenario including D2D.

Abstract: This application provides a display and a terminal device, and relates to the field of image display, to resolve a problem of PPI decrease of a semi-emissive and semi-reflective display.

Abstract: An electronic ink screen and a display apparatus. The electronic ink screen includes at least the following which are stacked: a first conductive substrate, an ink display layer and a second conductive substrate. The ink display layer is located between the first conductive substrate and the second conductive substrate, and the second conductive substrate is located above the first conductive substrate. The ink display layer has a plurality of ink accommodating cavities that are mutually independent. A plurality of ink particles that have a same color are provided in the ink accommodating cavity. The ink particles are used for displaying a first color. The electronic ink screen further includes a function layer. The function layer is configured to display a second color. The function layer is located at a side that is of the ink display layer and that faces away from the second conductive substrate.

Abstract: Embodiments of this application provide a display panel and a display device, which are applied to the field of terminal technologies. The display panel includes: a display region and a peripheral region that at least partially surrounds the display region. The display region includes a first edge to a fourth edge that are disposed opposite to each other. A corner between the first edge and the fourth edge is curved. The display region includes a plurality of pixel units. Peripheral regions corresponding to the first edge, a second edge, and a third edge each include a gate driver on array (GOA) circuit and a GOA signal line. The GOA circuit is configured to drive the pixel unit, and the GOA signal line is used to connect the GOA circuit and the pixel unit.

Abstract: This application provides a shift register, a gate drive circuit, a display panel, and an electronic device. The shift register includes a node control module, electrically connected to a first level signal receiving end, a second level signal receiving end, a first node, and a second node; an input module, electrically connected to a first clock signal end, a trigger signal input end, and the second node; an output module, electrically connected to the first level signal receiving end, the second level signal receiving end, the first node, a third node, and a drive signal output end; a first voltage stabilizing module, electrically connected to the first node, a fourth node, and the second level signal receiving end; and a second voltage stabilizing module, electrically connected to the second node, the third node, the fourth node, and a second clock signal end.

Abstract: A display panel and a display device. The display panel includes: a display region and a peripheral region that surrounds the display region. The display region includes a first edge to a fourth edge that are disposed opposite to each other. A corner between the first edge and the fourth edge is curved. The display region includes pixel units and R GOA signal lines. The peripheral region includes a GOA circuit, configured to drive the pixel units. The pixel units include M columns*N rows of light-emitting devices, M*N bottom drive circuits at lower layers of the light-emitting devices, and M*N anode leads connect the light-emitting devices to the bottom drive circuits, and R, M, and N are natural numbers.

Abstract: A display panel includes a display area (DA) and a peripheral area (PA) surrounding the display area (DA). The display area (DA) includes a second area and a first area that includes first pixel units disposed around holes, where the second area includes second pixel units and K data lines. The second pixel units include M columns*N rows of light emitting devices, M*N bottom drive circuits located at lower layers of the light emitting devices, and M*N anode leads connecting the light emitting devices to the bottom drive circuits. Intervals between some or all of the adjacent light emitting devices are greater than dimensions of the bottom drive circuits corresponding to the light emitting devices, and therefore there are gaps between the some or all of the second pixel units.

Abstract: A display panel includes a display area (DA) and a peripheral area (PA) surrounding the display area (DA). The display area (DA) includes a second area and a first area that includes first pixel units disposed around holes, where the second area includes second pixel units and K data lines. The second pixel units include M columns*N rows of light emitting devices, M*N bottom drive circuits located at lower layers of the light emitting devices, and M*N anode leads connecting the light emitting devices to the bottom drive circuits. Intervals between some or all of the adjacent light emitting devices are greater than dimensions of the bottom drive circuits corresponding to the light emitting devices, and therefore there are gaps between the some or all of the second pixel units.

Abstract: This application discloses a display control apparatus, a display apparatus, and an electronic device, relates to the field of electronic circuit technologies. A specific solution is as follows. An adjustment unit in the display control apparatus outputs an adjustment voltage in a write frame to a control-end back channel of a drive thin-film transistor in a light-emitting drive unit, so that the influence of negative bias of a threshold voltage of the drive thin-film transistor caused by a negative voltage of a first reset voltage, and therefore a transfer characteristic curve of the drive thin-film transistor shifts forward in the write frame, that is, the threshold voltage of the drive thin-film transistor shifts forward, making it easier for the drive thin-film transistor to turn on in the write frame, and increasing the brightness of the drive thin-film transistor in the write frame.

Abstract: This application provides an organic light-emitting touch display panel and an organic light-emitting touch display apparatus, including a display layer (10), a touch layer (20), and a packaging layer (30) disposed between the display layer (10) and the touch layer (20), where the three layers are disposed along a thickness direction of the organic light-emitting touch display panel, and the touch layer (20) is disposed on the packaging layer (30). The display layer (10) includes a plurality of display units (11), and the display unit (11) includes a first electrode (111), a second electrode (112), and an organic light-emitting layer (113) disposed between the first electrode (111) and the second electrode (112).

Abstract: The present disclosure provides a chipset and a manufacturing method thereof. The chipset includes a logic chip, an input/output chip, and an interposer. The logic chip includes a plurality of first bonding components disposed in the first device layer. The input/output chip includes a plurality of second bonding components disposed in the second device layer. The interposer includes a plurality of third bonding components disposed in the third device layer. The logic chip is directly bonded to the first portion of the plurality of third bonding components of the interposer in a pad-to-pad manner through the first portion of the plurality of first bonding components, and the input/output chip is directly bonded to the second portion of the plurality of third bonding components of the interposer in a pad-to-pad manner through the plurality of second bonding components.

Abstract: A semiconductor die is provided. The semiconductor die includes a D2D transceiver composed of a single die or dual dies. The D2D transceiver includes a first D2D transmitter and a first D2D receiver. The D2D transmitter is configured to send data to a second D2D receiver in a second D2D transceiver of another semiconductor die using a first reference clock signal. The D2D receiver is configured to receive data from a second D2D transmitter in the second D2D transceiver using a second reference clock signal. Through using the embodiments of the disclosure, a transmission solution may be flexibly configured for a multi-application scenario including D2D.