Patents by Inventor Zheng Yong
Zheng Yong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250126870Abstract: A semiconductor device structure and methods of forming the same are described. The structure includes a gate dielectric layer disposed over a substrate, a gate electrode layer disposed over the gate dielectric layer, and a first gate spacer disposed adjacent the gate dielectric layer. The first gate spacer includes an inner surface facing the gate dielectric layer and an outer surface opposite the inner surface, and the first gate spacer includes a fluorine concentration that decreases from the inner surface and the outer surface towards a center of the first gate spacer. The structure further includes a second gate spacer disposed on the outer surface of the first gate spacer, and the second gate spacer includes a fluorine concentration that decreases from an outer surface towards an inner surface.Type: ApplicationFiled: October 15, 2023Publication date: April 17, 2025Inventors: Zheng-Yong LIANG, Wei-Ting YEH, Fu-Ting YEN, Hung-Yu YEN, Chien-Hung LIN, Kuei-Lin CHAN, Yu-Yun PENG, Keng-Chu LIN
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Publication number: 20250014943Abstract: An integrated circuit (IC) chip with polish stop layers and a method of fabricating the IC chip are disclosed. The method includes forming a first IC chip having a device region and a peripheral region. Forming the first IC chip includes forming a device layer on a substrate, forming an interconnect structure on the device layer, depositing a first dielectric layer on a first portion of the interconnect structure in the peripheral region, depositing a second dielectric layer on the first dielectric layer and on a second portion of the interconnect structure in the device region, and performing a polishing process on the second dielectric layer to substantially coplanarize a top surface of the second dielectric layer with a top surface of the first dielectric layer. The method further includes performing a bonding process on the second dielectric layer to bond a second IC chip to the first IC chip.Type: ApplicationFiled: July 7, 2023Publication date: January 9, 2025Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Zheng Yong LIANG, Wei-Ting YEH, I-Han HUANG, Chen-Hao WU, An-Hsuan LEE, Huang-Lin CHAO, Yu-Yun PENG, Keng-Chu LIN
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Publication number: 20250006687Abstract: An integrated circuit die with two material layers having metal nano-particles and the method of forming the same are provided. The integrated circuit die includes a device layer comprising a first transistor, a first interconnect structure on a first side of the device layer, a first material layer on the first interconnect structure, wherein the first material layer comprises first metal nano-particles, and a second material layer bonded to the first material layer, wherein the second material layer comprises second metal nano-particles, and wherein the first material layer and the second material layer share an interface.Type: ApplicationFiled: June 30, 2023Publication date: January 2, 2025Inventors: Zheng-Yong Liang, Wei-Ting Yeh, Han-De Chen, Chen-Fong Tsai, Yu-Yun Peng, Keng-Chu Lin
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Publication number: 20240355805Abstract: Provided is a method of forming a semiconductor structure including: bonding a device wafer onto a carrier wafer; forming a support structure between an edge of the device wafer and an edge of the carrier wafer, wherein the support structure surrounds a device layer of the device wafer along a closed path; removing a substrate and a portion of a bonding dielectric layer of the device wafer from a backside of the device wafer to expose the support structures while the support structure is in place; and removing the support structure through an acid etchant.Type: ApplicationFiled: April 21, 2023Publication date: October 24, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Ting Yeh, Zheng-Yong Liang, Yu-Yun Peng, Keng-Chu Lin
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Publication number: 20240355733Abstract: A semiconductor structure and a manufacturing method thereof are provided. A semiconductor structure includes a first nitride-containing layer on a side of a carrier substrate, first semiconductor devices thermally coupled to the first nitride-containing layer, a first interconnect structure physically and electrically coupled to first sides of the first semiconductor devices, and a first metal-containing dielectric layer bonding the first nitride-containing layer to the first interconnect structure. A thermal conductivity of the first nitride-containing layer is greater than a thermal conductivity of the first metal-containing dielectric layer.Type: ApplicationFiled: April 20, 2023Publication date: October 24, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Zheng-Yong Liang, Wei-Ting Yeh, Yu-Yun Peng, Keng-Chu Lin
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Publication number: 20240282761Abstract: A carrier structure and methods of forming and using the same are described. In some embodiments, the method includes forming one or more devices over a substrate, forming a first interconnect structure over the one or more devices, and bonding the first interconnect structure to a carrier structure. The carrier structure includes a semiconductor substrate, a release layer, and a first dielectric layer, and the release layer includes a metal nitride. The method further includes flipping over the one or more devices so the carrier structure is located at a bottom, performing backside processes, flipping over the one or more devices so the carrier structure is located at a top, and exposing the carrier structure to IR lights. Portions of the release layer are separated from the first dielectric layer.Type: ApplicationFiled: February 22, 2023Publication date: August 22, 2024Inventors: Zheng Yong Liang, Wei-Ting Yeh, Jyh-Cherng Sheu, Yu-Yun Peng, Keng-Chu Lin
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Publication number: 20240222542Abstract: A photodetector apparatus (100), being configured for detecting light in the visible or infrared spectrum, comprises a substrate (30), a waveguide (20), a detector section (10), a first contact section (50) and a second contact section (52). The substrate (30) has a substrate surface (32) and a cladding layer (40). The waveguide (20) is arranged above the substrate surface (32) in the cladding layer (40) and is adapted for guiding light. The detector section (10) comprises a p-doped region (12, 14) and an ndoped region (16, 18), and the detector section (10?) is arranged for producing charge carriers by the (10) light guided in the waveguide (20). The first contact section (50) is connected to the p-doped region (12, 14) and the second contact section (52) is connected to the n-doped region (16, 18), the first and second contact sections (50, 52) being connectable to a measuring device for measuring an electrical signal based on the charge carriers produced by the light.Type: ApplicationFiled: May 9, 2022Publication date: July 4, 2024Inventors: Yiding LIN, Zheng YONG, Jason MAK, Wesley SACHER, Joyce POON
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Publication number: 20240170323Abstract: The present disclosure describes a method of forming low thermal budget dielectrics in semiconductor devices.Type: ApplicationFiled: January 30, 2024Publication date: May 23, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Mrunal Abhijith KHADERBAD, Ko-Feng Chen, Zheng-Yong Liang, Chen-Han Wang, De-Yang Chiou, Yu-Yun Peng, Keng-Chu Lin
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Patent number: 11942358Abstract: The present disclosure describes a method of forming low thermal budget dielectrics in semiconductor devices. The method includes forming, on a substrate, first and second fin structures with an opening in between, filling the opening with a flowable isolation material, treating the flowable isolation material with a plasma, and removing a portion of the plasma-treated flowable isolation material between the first and second fin structures.Type: GrantFiled: March 12, 2021Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Mrunal Abhijith Khaderbad, Ko-Feng Chen, Zheng-Yong Liang, Chen-Han Wang, De-Yang Chiou, Yu-Yun Peng, Keng-Chu Lin
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Patent number: 11921519Abstract: A method estimates an intention of a lead vehicle by an ego vehicle. The method includes: (a) receiving, from at least one of a first plurality of sensors coupled to the ego vehicle, information associated with a parametric variable, (b) selecting a partition of an operating region of the parametric variable based on the parametric variable information, wherein the operating region includes a predetermined range of values for the parametric variable, wherein the partition includes a subset of the predetermined range of values and being associated with a predetermined ego vehicle input, and wherein the predetermined vehicle input includes at least one value for a parameter corresponding to dynamics of the ego vehicle, and (c) causing a vehicle control system of the ego vehicle to perform a vehicle maneuver based on the predetermined ego vehicle input.Type: GrantFiled: June 24, 2019Date of Patent: March 5, 2024Assignee: ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITYInventors: Sze Zheng Yong, Ruochen Niu, Qiang Shen
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Patent number: 11918015Abstract: An edible composition consisting of (a) natural gum comprising a polysaccharide hydrocolloid (a1) containing mannose repeating units; (b) carrageenan; (c) cellulose ether, and optionally (d) water, wherein the weight ratio of carrageenan (b) to polysaccharide hydrocolloid (a1) ranges from 0.4:1 to 1.4:1 and the weight ratio of cellulose ether (c) to polysaccharide hydrocolloid (a1) is at least 0.02:1; its use in an edible product; and the edible product, typically sausage, comprising the edible composition.Type: GrantFiled: January 30, 2013Date of Patent: March 5, 2024Assignee: Nutrition & Biosciences USA 1, LLCInventors: Kai Cao, Zheng Yong Yan, Dong Yun, Xiuqin Shi, Xiaoyi Pang
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Publication number: 20240030180Abstract: A method for manufacturing a semiconductor structure includes: forming a first bonding layer on a device substrate formed with a semiconductor device so as to cover the semiconductor device, wherein the first bonding layer includes a first metal oxide material in an amorphous state; forming a second bonding layer on a carrier substrate, wherein the second bonding layer includes a second metal oxide material in an amorphous state; conducting a surface modification process on the first bonding layer and the second bonding layer; bonding the device substrate and the carrier substrate to each other through the first and second bonding layers; and annealing the first and second bonding layers so as to convert the first and second metal oxide materials from the amorphous state to a crystalline state.Type: ApplicationFiled: July 20, 2022Publication date: January 25, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Zheng-Yong LIANG, Wei-Ting YEH, Yu-Yun PENG, Keng-Chu LIN
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Patent number: 11704946Abstract: The present disclosure provides a method in a data processing system that includes at least one processor and at least one memory. The at least one memory includes instructions executed by the at least one processor to implement a bounded-error estimator system. The method includes receiving information about a plurality of vehicle states of a vehicle from at least one sensor, determining that the information is missing data about at least one vehicle state of the plurality of vehicle states, and determining an estimated vehicle state associated with a final vehicle state. Determining the estimated vehicle state includes calculating a plurality of augmented states for each of the vehicle states included in the plurality of vehicle states and calculating the estimated vehicle state based on the plurality of augmented states. The estimated vehicle state is provided to a vehicle control system of the vehicle.Type: GrantFiled: July 9, 2020Date of Patent: July 18, 2023Assignee: ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITYInventors: Syed Hassaan, Qiang Shen, Sze Zheng Yong
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Publication number: 20220415696Abstract: The present disclosure describes a method to form a bonded semiconductor structure. The method includes forming a first bonding layer on a first wafer, forming a debonding structure on a second wafer, forming a second bonding layer on the debonding structure, bonding the first and second wafers with the first and second bonding layers, and debonding the second wafer from the first wafer via the debonding structure. The debonding structure includes a first barrier layer, a second barrier layer, and a water-containing dielectric layer between the first and second barrier layers.Type: ApplicationFiled: March 23, 2022Publication date: December 29, 2022Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wei-Ting YEH, Zheng Yong Liang, De-Yang Chiou, Yu-Yun Peng, Keng-Chu Lin
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Publication number: 20220293458Abstract: The present disclosure describes a method of forming low thermal budget dielectrics in semiconductor devices.Type: ApplicationFiled: March 12, 2021Publication date: September 15, 2022Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Mrunal Abhijith Khaderbad, Ko-Feng Chen, Zheng Yong Liang, Chen-Han Wang, De-Yang Chiou, Yu-Yun Peng, Keng-Chu Lin
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Patent number: 11440543Abstract: A method of the disclosure implements a prefix-based estimator system. The method includes: receiving a plurality of vehicle states at a plurality of time points from at least one sensor coupled to a vehicle, wherein each of the plurality of vehicle states includes at least one parameter information and a discrete state; determining a most recent vehicle state of the plurality of vehicle states has at least one parameter information missing; identifying a prefix comprising a missing data pattern that matches a sequence of discrete states of a subset of time-ordered vehicle states including the most recent vehicle state, wherein the subset of time-ordered vehicle states correspond to the prefix; calculating an estimated updated vehicle state of the vehicle using an optimized prefix-based dynamic estimator based on the prefix and the subset of time ordered vehicle states; and providing the estimated updated vehicle state to a driving control system of the vehicle.Type: GrantFiled: January 24, 2019Date of Patent: September 13, 2022Assignee: THE REGENTS OF HTE UNIVERSITY OF MICHIGANInventors: Necmiye Ozay, Sze Zheng Yong, Kwesi J. Rutledge
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Patent number: 11242059Abstract: In one aspect, the present disclosure provides a method in a data processing system comprising at least one processor and at least one memory, the at least one memory comprising instructions executed by the at least one processor to implement a vehicle overtaking monitoring system. The method comprises receiving, from a first plurality of sensors coupled to an ego vehicle, lead vehicle data about a lead vehicle, inferring an estimated intention of the lead vehicle based on the lead vehicle data, selecting an intention model from a plurality of intention models based on the estimated intention, calculating a set of permissible driving inputs of the ego vehicle based on the intention model, calculating at least one driver input range based on the set of permissible driving inputs, and causing the at least one driver input range to be displayed to a driver of the ego vehicle.Type: GrantFiled: April 25, 2019Date of Patent: February 8, 2022Assignees: THE REGENTS OF THE UNIV. OF MICHIGAN, AZ BRD REGENTS ON BEHALF OF AZ STATE UNIV.Inventors: Necmiye Ozay, Yunus E. Sahin, Zexiang Liu, Kwesi Rutledge, Sze Zheng Yong, Dimitra Panagou
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Patent number: 11119275Abstract: Various polarization rotator splitter (PRS) configurations are disclosed. In an example embodiment, a system includes a PRS that includes a silicon nitride (SiN) rib waveguide core that includes a rib and a ridge that extends vertically above the rib, the SiN rib waveguide core having a total height hSiN from a bottom of the rib to a top of the ridge, a rib height hrib from the bottom of the rib to a top of the rib, a rib width wrib, and a top width wSiN of the ridge. The rib width wrib varies along at least a portion of a length of the SiN rib waveguide core.Type: GrantFiled: November 26, 2019Date of Patent: September 14, 2021Assignee: II-VI DELAWARE, INC.Inventors: Bryan Park, Zheng Yong, Joyce Kai See Poon
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Patent number: 11101256Abstract: An optoelectronic device. The optoelectronic device operable to provide a PAM-N modulated output, the device comprising: M optical modulators, M being an integer greater than 1, the M optical modulators being arranged in a cascade, the device being configured to operate in N distinct transmittance states, as a PAM-N modulator, wherein, in each transmittance state of the N distinct transmittance states, each of the M optical modulators has applied to it a respective control voltage equal to one of: a first voltage or a second voltage. One or more of the modulators may include a substrate; a crystalline cladding layer, on top of the substrate; and an optically active region, above the crystalline cladding layer. The crystalline cladding layer may have a refractive index which is less than a refractive index of the optically active region.Type: GrantFiled: November 19, 2018Date of Patent: August 24, 2021Assignee: Rockley Photonics LimitedInventors: Guomin Yu, Amit Singh Nagra, Damiana Lerose, Hooman Abediasl, Pradeep Srinivasan, Joyce Kai See Poon, Zheng Yong, Haydn Frederick Jones
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Patent number: D925781Type: GrantFiled: December 27, 2019Date of Patent: July 20, 2021Assignee: Fourstar Group Inc.Inventor: Zhang Zheng Yong