Abstract: The present disclosure provides a polysilicon resistor, a method for manufacturing the same, and a successive approximation register analog-to-digital converter.

Abstract: Provided is an antibody drug conjugate, specifically comprising a therapeutic antibody moiety, an intermediate linker moiety and a cytotoxic drug moiety which are linked. The therapeutic antibody moiety is an antibody against an HER2 target. The cytotoxic drug moiety is a camptothecin topoisomerase I inhibitor. The cytotoxic drug moiety or the linker-cytotoxic drug moiety is modified by means of deuterium substitution. The antibody drug conjugate can be used for the prevention or treatment of cancers.

Abstract: Provided is an isolated monoclonal antibody or an antigen-binding portion thereof that specifically binds human CD40. A nucleic acid molecule encoding the antibody or antigen-binding portion thereof, an expression vector, a host cell and a method for expressing the antibody or the antigen-binding portion thereof are also provided. An immunoconjugate, a bispecific molecule, a chimeric antigen receptor, an oncolytic virus and a pharmaceutical composition comprising the antibody or antigen-binding portion thereof, as well as a treatment method using the same are further provided.

Abstract: Provided is an ST2 antigen binding protein, such as a mouse, human, chimeric or humanized antibody or antigen binding fragment thereof that specifically binds to ST2. Also provided are nucleic acid molecules encoding the above-mentioned antibodies and antigen binding fragments thereof, and an expression vector and host cell for expressing the antibodies or antigen binding fragments thereof. Further provided are methods for preparing and using the antibodies and antigen binding fragments thereof. The methods comprise treating and preventing IL33/ST2-mediated related diseases or conditions.

Abstract: A differential-follower control circuit has been provided, comprising: a follower; an output-voltage following module, which controls a voltage at a control terminal of the follower to vary with an output voltage; a substrate-voltage following module, which controls a substrate voltage of an output transistor of the follower to vary with an input voltage; an output terminal of the follower is connected to a first terminal of the output-voltage following module; a second terminal of the output-voltage following module is connected to the control terminal of the follower; a first terminal of the substrate-voltage following module is connected to an input terminal of the follower and a second terminal of the substrate-voltage following module is connected to a substrate of the output transistor; the invention effectively improves the overall linearity of the follower.

Abstract: A follow-hold switch circuit comprising: a follower; a sampling sub-circuit for voltage sampling; a bootstrap-control sub-circuit, which provides a bootstrap voltage to the sampling sub-circuit when the circuit is in a following state; a sampling-switch-control sub-circuit, which provides a common-mode voltage to a bootstrap capacitor in the bootstrap-control sub-circuit when the circuit is in a holding state; the follower is connected to an output of the sampling sub-circuit; the sampling sub-circuit is connected to the bootstrap-control sub-circuit and the sampling-switch-control sub-circuit respectively through a sampling switch; the present disclosure can effectively improve the linearity of sampling switches.

Abstract: An isolated monoclonal antibody that specifically binds human IL4R?, or an antigen-binding portion thereof. A nucleic acid molecule encoding the antibody or the antigen-binding portion thereof, an expression vector, a host cell and a method for expressing the antibody or the antigen-binding portion thereof are also provided. The present disclosure further provides a bispecific molecule, an oncolytic virus and a pharmaceutical composition comprising the antibody or the antigen-binding portion thereof, as well as a treatment method using an Anti-IL4R? antibody or the antigen-binding portion thereof of the disclosure.

Abstract: Disclosed is an isolated monoclonal antibody that specifically binds human TSLP, or the antigen-binding portion thereof. A nucleic acid molecule encoding the antibody, an expression vector, a host cell and a method for expressing the antibody are also provided. The present disclosure further provides a bispecific molecule, an immunoconjugate, a CAR-immune cell, an oncolytic virus and a pharmaceutical composition comprising the antibody, as well as a treatment method using an anti-TSLP antibody of the disclosure.

Abstract: A digital temperature sensor circuit is disclosed. The digital temperature sensor circuit includes a proportional to the absolute temperature (PTAT) current source, generating a PTAT current proportional to absolute temperature; a sigma-delta modulation module, including an integrator, an analog-to-digital conversion unit, and a feedback digital-to-analog conversion unit; the integrator converts the PTAT current into temperature voltage; the analog-to-digital conversion unit compares the temperature voltage with a band gap reference voltage to generate a digital modulation signal with a duty ratio proportional to the temperature; the feedback digital-to-analog conversion unit adjusts the voltage input by the analog-to-digital conversion unit and controls the charging and discharging speed of the integrator; a digital filter, quantizing the digital modulation signal into a digital signal, and outputting the digital signal.

Abstract: The present disclosure provides a low-jitter frequency division clock circuit, including: a clock control signal generation circuit, to generate clock signals having different phases; a low-level narrow pulse width clock control signal generation circuit, to generate a low-level narrow pulse width clock control signal; a high-level narrow pulse width clock control signal generation circuit, to generate a high-level narrow pulse width clock control signal; and a frequency division clock generation circuit, to generate a frequency division clock signal according to low-level narrow pulse width clock control signal and high-level narrow pulse width clock control signal. The delay from a clock input end to an output end of low-jitter frequency division clock circuit is up to three logic gates.

Abstract: The present disclosure provides a circuit for generating a multi-phase clock having random disturbance added thereto. The circuit for generating a clock includes a main clock module, a random signal generation module and a buffer matrix switch module. The main clock module generates N multi-phase clock signals; and the buffer matrix switch module randomly switches, under the control of a random control signal output by the random signal generation module, transmission paths of the input N multi-phase clock signals, and outputs N multi-phase clock signals with random disturbance. In the present disclosure, the clock phase error is whitened by adding random disturbance. Only with a small loss of signal-to-noise ratio, the influence of a multi-phase clock phase error on the performance of a high-precision TI ADC can be eliminated in real time, and the influence of the fluctuation of a clock phase error can be tracked and eliminated.

Abstract: The present disclosure provides a low-jitter frequency division clock circuit, including: a clock control signal generation circuit, to generate clock signals having different phases; a low-level narrow pulse width clock control signal generation circuit, to generate a low-level narrow pulse width clock control signal; a high-level narrow pulse width clock control signal generation circuit, to generate a high-level narrow pulse width clock control signal; and a frequency division clock generation circuit, to generate a frequency division clock signal according to low-level narrow pulse width clock control signal and high-level narrow pulse width clock control signal. The delay from a clock input end to an output end of low-jitter frequency division clock circuit is up to three logic gates.

Abstract: The present disclosure provides a circuit for generating a multi-phase clock having random disturbance added thereto. The circuit for generating a clock includes a main clock module, a random signal generation module and a buffer matrix switch module. The main clock module generates N multi-phase clock signals; and the buffer matrix switch module randomly switches, under the control of a random control signal output by the random signal generation module, transmission paths of the input N multi-phase clock signals, and outputs N multi-phase clock signals with random disturbance. In the present disclosure, the clock phase error is whitened by adding random disturbance. Only with a small loss of signal-to-noise ratio, the influence of a multi-phase clock phase error on the performance of a high-precision TI ADC can be eliminated in real time, and the influence of the fluctuation of a clock phase error can be tracked and eliminated.

Abstract: The present disclosure provides a negative voltage generating circuit having an automatic voltage adjustment function, including a negative voltage generating circuit and a feedback control module. The negative voltage generated by the negative voltage generating circuit is adjusted by the feedback control module. The negative voltage generating circuit having the automatic voltage adjustment function of the present disclosure can automatically adjust the charge current of the charge pump according to the load current, thereby realizing the stability of the output voltage, such that the traditional analog circuit structure can work normally under the extremely low power supply voltage, and is particularly suitable for the deep submicron process. The present disclosure also realizes the digital adjustment of the output voltage, the negative voltage output is no longer single, and can be adjusted according to actual needs.

Abstract: Disclosed is a successive approximation algorithm-based ADC self-correcting circuit, comprising: a coding circuit, a voltage dividing resistor string, a comparator array, a multi-path selection switch, a first digital-to-analog converter, a reference circuit, a control register, and a data register; an input end of the coding circuit is connected to an output end of the comparator array; a positive-phase input end of each comparator in the comparator array is connected to a mobile end of the multi-path selection switch; a negative-phase input end of each comparator in the comparator array is correspondingly connected between each two neighboring resistors in the voltage dividing resistor string; an enabling end of the comparator array is connected to the control register; a first immobile end of the multi-path selection switch is used for receiving an analog signal, a second immobile send is connected to an output end of the first digital-to-analog converter, and a control end is connected to the control regi

Abstract: Disclosed is a successive approximation algorithm-based ADC self-correcting circuit, comprising: a coding circuit, a voltage dividing resistor string, a comparator array, a multi-path selection switch, a first digital-to-analog converter, a reference circuit, a control register, and a data register; an input end of the coding circuit is connected to an output end of the comparator array; a positive-phase input end of each comparator in the comparator array is connected to a mobile end of the multi-path selection switch; a negative-phase input end of each comparator in the comparator array is correspondingly connected between each two neighboring resistors in the voltage dividing resistor string; an enabling end of the comparator array is connected to the control register; a first immobile end of the multi-path selection switch is used for receiving an analog signal, a second immobile send is connected to an output end of the first digital-to-analog converter, and a control end is connected to the control regi

Abstract: The present disclosure provides a negative voltage generating circuit having an automatic voltage adjustment function, including a negative voltage generating circuit and a feedback control module. The negative voltage generated by the negative voltage generating circuit is adjusted by the feedback control module. The negative voltage generating circuit having the automatic voltage adjustment function of the present disclosure can automatically adjust the charge current of the charge pump according to the load current, thereby realizing the stability of the output voltage, such that the traditional analog circuit structure can work normally under the extremely low power supply voltage, and is particularly suitable for the deep submicron process. The present disclosure also realizes the digital adjustment of the output voltage, the negative voltage output is no longer single, and can be adjusted according to actual needs.

Abstract: The invention provides a clock delay adjusting circuit based on edge addition and an integrated chip thereof.

Abstract: A system and method for profit sharing with viewers of online advertisements are disclosed. The system comprises a central control and a plurality of clients that are distributed to and installed on users' devices registered under viewers' accounts. The client, coordinating with ad blocking software or hardware, monitors online advertisements, controls the ad blocking, and communicates with the central control in sending publishers' or advertisers' information and following responses to allow or block the advertisements. Publishers or advertisers need to register with the system and pay for advertising on viewers' devices.

Abstract: The present invention relates to the use of a composition for preparing a medicament for the treatment of amyotrophic lateral sclerosis and associated disorders. The composition comprises 3-methyl-1-phenyl-2-pyrazoline-5-one or pharmaceutically acceptable salts thereof and borneol. The medicament is a drug used for delaying the occurrence time of amyotrophic lateral sclerosis and extending the survival time, and for improving memory function defect of amyotrophic lateral sclerosis.