Patents by Inventor Zhenhua Huang

Zhenhua Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11003445
    Abstract: A microprocessor for neural network computing having a mapping table, a microcode memory, and a microcode decoding finite-state machine (FSM) is disclosed. According to the mapping table, a macroinstruction is mapped to an address on the microcode memory. The microcode decoding FSM decodes contents which are retrieved from the microcode memory according to the address, to get microinstructions involving at least one microinstruction loop that is repeated to operate a datapath to complete the macroinstruction.
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: May 11, 2021
    Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
    Inventors: Jing Chen, Xiaoyang Li, Juanli Song, Zhenhua Huang, Weilin Wang, Jiin Lai
  • Publication number: 20200392096
    Abstract: The present invention provides a novel antibiotic compound represented by the following formula (I), a pharmaceutically acceptable salt thereof, an ester thereof, a prodrug thereof, a solvate thereof, or a deuterated analog thereof, or a stereoisomer thereof. The compound of the present invention exhibits excellent antibacterial activity, especially against Gram bacteria. wherein each group is defined as in the description.
    Type: Application
    Filed: August 15, 2019
    Publication date: December 17, 2020
    Inventors: Zhenhua Huang, Li Li, Min Zhang
  • Publication number: 20200382289
    Abstract: A data processing method includes the following steps: a processor receives a symmetric wrapping key, and when an application needs to use a user private key, the processor executes an encryption and decryption instruction in a hardware-acceleration instruction-set. The encryption and decryption instruction is configured to apply the symmetric wrapping key to decrypt a wrapped private key that corresponds to the application to obtain the user private key. In addition, the symmetric wrapping key is stored in a model specific register of the processor.
    Type: Application
    Filed: March 16, 2020
    Publication date: December 3, 2020
    Inventors: Gangru XUE, Zhenhua HUANG, Yun SHEN
  • Patent number: 10776109
    Abstract: A microprocessor with dynamically adjustable bit width is provided, which has a bit width register, a datapath, a statistical register, and a bit width adjuster. The bit width register stores at least one bit width. The datapath operates according to the bit width stored in the bit width register to acquire input operands from received data and process input operands. The statistical register collects calculation results of the datapath. The bit width adjuster adjusts the bit width stored in the bit width register based on the calculation results collected in the statistical register.
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: September 15, 2020
    Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
    Inventors: Jing Chen, Xiaoyang Li, Juanli Song, Zhenhua Huang, Weilin Wang, Jiin Lai
  • Patent number: 10776108
    Abstract: A microprocessor provides at least two storage areas and uses a datapath for Booth multiplication. According to a first and second field of a microinstruction, the datapath gets multiplicand number supply data from the first storage area and multiplier number supply data from the second storage area. The datapath operates according to a word length indicated in a third field of the microinstruction. The datapath gets multi-bit acquisitions for Booth multiplication from the multiplier number supply data. The datapath divides the multiplicand number supply data into multiplicand numbers according to the word length, and performs Booth multiplication on the multiplicand numbers based on the multi-bit acquisitions to get partial products. According to the word length, the datapath selects a part of the partial products to be shifted and added for generation of a plurality of products.
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: September 15, 2020
    Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
    Inventors: Jing Chen, Xiaoyang Li, Juanli Song, Zhenhua Huang, Weilin Wang, Jiin Lai
  • Patent number: 10754646
    Abstract: A microprocessor with Booth multiplication, in which several acquisition registers are used. In a first word length, a first acquisition register stores an unsigned ending acquisition of a first multiplier number carried in multiplier number supply data, and a third acquisition register stores a starting acquisition of a second multiplier number carried in the multiplier number supply data. In a second word length that is longer than the first word length, a fourth acquisition register stores a middle acquisition of a third multiplier number carried in the multiplier number supply data. A partial product selection circuit is required for selection of a partial product, to get the partial product from Booth multiplication based on the third acquisition register (corresponding to the first word length) or based on the fourth acquisition register (corresponding to the second word length).
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: August 25, 2020
    Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
    Inventors: Jing Chen, Xiaoyang Li, Juanli Song, Zhenhua Huang, Weilin Wang, Jiin Lai
  • Patent number: 10633337
    Abstract: The present invention belongs to the field of pharmaceutical technology, and crystal forms of a 9-aminomethyl substituted tetracycline compound and a process for preparing the same. More specifically, the present invention relates to crystal forms of the compound represented by formula (1), a process for preparing crystal forms of the compound represented by formula (1) and use of said crystal forms in manufacture of medicament for treating and/or preventing an infection disease caused by tetracycline-sensitive bacteria and/or tetracycline-resistant bacteria.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: April 28, 2020
    Assignee: KBP Biosciences Co., Ltd.
    Inventors: Zhenhua Huang, Mei Hong, Chen Jiang
  • Publication number: 20190286974
    Abstract: A processing circuit and its neural network computation method are provided. The processing circuit includes multiple processing elements (PEs), multiple auxiliary memories, a system memory, and a configuration module. The PEs perform computation processes. Each of the auxiliary memories corresponds to one of the PEs and is coupled to another two of the auxiliary memories. The system memory is coupled to all of the auxiliary memories and configured to be accessed by the PEs. The configuration module is coupled to the PEs, the auxiliary memories corresponding to the PEs, and the system memory to form a network-on-chip (NoC) structure. The configuration module statically configures computation operations of the PEs and data transmissions on the NoC structure according to a neural network computation. Accordingly, the neural network computation is optimized, and high computation performance is provided.
    Type: Application
    Filed: June 11, 2018
    Publication date: September 19, 2019
    Applicant: Shanghai Zhaoxin Semiconductor Co., Ltd.
    Inventors: Xiaoyang Li, Mengchen Yang, Zhenhua Huang, Weilin Wang, Jiin Lai
  • Publication number: 20190243790
    Abstract: A direct memory access (DMA) engine and a method thereof are provided. The DMA engine controls data transmission from a source memory to a destination memory, and includes a task configuration storing module, a control module and a computing module. The task configuration storing module stores task configurations. The control module reads source data from the source memory according to the task configuration. The computing module performs a function computation on the source data from the source memory in response to the task configuration of the control module. Then, the control module outputs destination data output through the function computation to the destination memory according to the task configuration. Accordingly, on-the-fly computation is achieved during data transfer between memories.
    Type: Application
    Filed: May 15, 2018
    Publication date: August 8, 2019
    Applicant: Shanghai Zhaoxin Semiconductor Co., Ltd.
    Inventors: Xiaoyang Li, Chen Chen, Zhenhua Huang, Weilin Wang, Jiin Lai
  • Publication number: 20190241515
    Abstract: The present invention belongs to the field of pharmaceutical technology, and crystal forms of a 9-aminomethyl substituted tetracycline compound and a process for preparing the same. More specifically, the present invention relates to crystal forms of the compound represented by formula (1), a process for preparing crystal forms of the compound represented by formula (1) and use of said crystal forms in manufacture of medicament for treating and/or preventing an infection disease caused by tetracycline-sensitive bacteria and/or tetracycline-resistant bacteria.
    Type: Application
    Filed: June 22, 2017
    Publication date: August 8, 2019
    Inventors: Zhenhua Huang, Mei Hong, Chen Jiang
  • Publication number: 20190227769
    Abstract: A microprocessor with Booth multiplication, in which several acquisition registers are used. In a first word length, a first acquisition register stores an unsigned ending acquisition of a first multiplier number carried in multiplier number supply data, and a third acquisition register stores a starting acquisition of a second multiplier number carried in the multiplier number supply data. In a second word length that is longer than the first word length, a fourth acquisition register stores a middle acquisition of a third multiplier number carried in the multiplier number supply data. A partial product selection circuit is required for selection of a partial product, to get the partial product from Booth multiplication based on the third acquisition register (corresponding to the first word length) or based on the fourth acquisition register (corresponding to the second word length).
    Type: Application
    Filed: October 18, 2018
    Publication date: July 25, 2019
    Inventors: Jing CHEN, Xiaoyang LI, Juanli SONG, Zhenhua HUANG, Weilin WANG, Jiin LAI
  • Publication number: 20190227795
    Abstract: A microprocessor for neural network computing having a mapping table, a microcode memory, and a microcode decoding finite-state machine (FSM) is disclosed. According to the mapping table, a macroinstruction is mapped to an address on the microcode memory. The microcode decoding FSM decodes contents which are retrieved from the microcode memory according to the address, to get microinstructions involving at least one microinstruction loop that is repeated to operate a datapath to complete the macroinstruction.
    Type: Application
    Filed: October 18, 2018
    Publication date: July 25, 2019
    Inventors: Jing CHEN, Xiaoyang LI, Juanli SONG, Zhenhua HUANG, Weilin WANG, Jiin LAI
  • Publication number: 20190227770
    Abstract: A microprocessor provides at least two storage areas and uses a datapath for Booth multiplication. According to a first and second field of a microinstruction, the datapath gets multiplicand number supply data from the first storage area and multiplier number supply data from the second storage area. The datapath operates according to a word length indicated in a third field of the microinstruction. The datapath gets multi-bit acquisitions for Booth multiplication from the multiplier number supply data. The datapath divides the multiplicand number supply data into multiplicand numbers according to the word length, and performs Booth multiplication on the multiplicand numbers based on the multi-bit acquisitions to get partial products. According to the word length, the datapath selects a part of the partial products to be shifted and added for generation of a plurality of products.
    Type: Application
    Filed: October 18, 2018
    Publication date: July 25, 2019
    Inventors: Jing CHEN, Xiaoyang LI, Juanli SONG, Zhenhua HUANG, Weilin WANG, Jiin LAI
  • Publication number: 20190227799
    Abstract: A microprocessor with dynamically adjustable bit width is provided, which has a bit width register, a datapath, a statistical register, and a bit width adjuster. The bit width register stores at least one bit width. The datapath operates according to the bit width stored in the bit width register to acquire input operands from received data and process input operands. The statistical register collects calculation results of the datapath. The bit width adjuster adjusts the bit width stored in the bit width register based on the calculation results collected in the statistical register.
    Type: Application
    Filed: October 18, 2018
    Publication date: July 25, 2019
    Inventors: Jing CHEN, Xiaoyang LI, Juanli SONG, Zhenhua HUANG, Weilin WANG, Jiin LAI
  • Publication number: 20190201390
    Abstract: Provided are a pharmaceutical composition comprising a mineralocorticoid receptor antagonist and use thereof. When the pharmaceutical composition is orally administered to a patient having chronic kidney disease in need thereof, the effective and safe AUC ranges from 188 ng*h/mL to 3173 ng*h/mL, with bioavailability of 50% or more in mammals. When the pharmaceutical composition is orally administered at a daily dose of 0.1 to 1.0 mg to treat chronic kidney disease, the AUC is controlled at a safe and effective level.
    Type: Application
    Filed: September 22, 2017
    Publication date: July 4, 2019
    Applicant: KBP BIOSCIENCES CO., LTD.
    Inventors: Zhenhua HUANG, Xiaocui GUO
  • Patent number: 10322132
    Abstract: The present invention relates to the use of a compound of formula (I), a pharmaceutically acceptable salt thereof, a solvate thereof, or a pharmaceutical composition containing the same in reducing uric acid level, preventing or reducing inflammations, and preventing or treating uratic or gouty diseases. In particular, the present invention relates to the use of a compound of formula (I), a pharmaceutically acceptable salt thereof, a solvate thereof, or a pharmaceutical composition containing the same in the manufacture of a medicament for the treatment or prevention of hyperuricemia, gout, gouty inflammations, pain and uric acid nephropathy. R1 represents hydrogen, C1-4 alkyl or the like. R2 represents C1-10 alkyl or the like. R3 represents halogen or the like.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: June 18, 2019
    Assignee: SHANTON PHARMA CO., LTD
    Inventors: Qian Zhang, Zhenhua Huang, Jinrong Liu, Shuangshuang Chi
  • Patent number: 10073698
    Abstract: A processor has an execution pipeline that executes microinstructions and an instruction translator that translates architectural instructions into the microinstructions. The instruction translator has a memory that holds microcode instructions and provides a fetch quantum of a plurality of microcode instructions per clock cycle, a queue that holds microcode instructions provided by the memory, and a branch decoder that decodes the fetch quantum to detect local branch instructions, causes microcode instructions of the fetch quantum up to but not including a first-in-program-order local branch instruction to be written to the queue, and prevents the first-in-program-order local branch instruction and following microcode instructions of the fetch quantum from being written to the queue. Local branch instructions are resolved by the instruction translator rather than the execution pipeline.
    Type: Grant
    Filed: October 24, 2016
    Date of Patent: September 11, 2018
    Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
    Inventors: Longfei Bai, Zhenhua Huang, Mengmeng Yan
  • Publication number: 20180235994
    Abstract: In one aspect, the present invention features a method of inhibiting proliferation and/or reducing survival of a cell comprising a GNAQ polynucleotide or polypeptide having a R183Q or Q209L mutation, comprising contacting the cell with puromycin or a puromycin analog, thereby inhibiting proliferation and/or reducing survival of the cell. In another aspect, a method of treating a vascular malformation or related condition in a subject, comprising administering to the subject an effective amount of puromycin or a puromycin analog is featured.
    Type: Application
    Filed: July 28, 2016
    Publication date: August 23, 2018
    Inventors: Anne Comi, Jonathan Pevsner, Zhenhua Huang, Doug Marchuk
  • Publication number: 20180095753
    Abstract: A processor has an execution pipeline that executes microinstructions and an instruction translator that translates architectural instructions into the microinstructions. The instruction translator has a memory that holds microcode instructions and provides a fetch quantum of a plurality of microcode instructions per clock cycle, a queue that holds microcode instructions provided by the memory, and a branch decoder that decodes the fetch quantum to detect local branch instructions, causes microcode instructions of the fetch quantum up to but not including a first-in-program-order local branch instruction to be written to the queue, and prevents the first-in-program-order local branch instruction and following microcode instructions of the fetch quantum from being written to the queue. Local branch instructions are resolved by the instruction translator rather than the execution pipeline.
    Type: Application
    Filed: October 24, 2016
    Publication date: April 5, 2018
    Inventors: LONGFEI BAI, ZHENHUA HUANG, MENGMENG YAN
  • Publication number: 20170326148
    Abstract: The present invention relates to the use of a compound of formula (I), a pharmaceutically acceptable salt thereof, a solvate thereof, or a pharmaceutical composition containing the same in reducing uric acid level, preventing or reducing inflammations, and preventing or treating uratic or gouty diseases. In particular, the present invention relates to the use of a compound of formula (I), a pharmaceutically acceptable salt thereof, a solvate thereof, or a pharmaceutical composition containing the same in the manufacture of a medicament for the treatment or prevention of hyperuricemia, gout, gouty inflammations, pain and uric acid nephropathy. R1 represents hydrogen, C1-4alkyl or the like. R2 represents C1-10alkyl or the like. R3 represents halogen or the like.
    Type: Application
    Filed: January 28, 2016
    Publication date: November 16, 2017
    Inventors: Qian ZHANG, Zhenhua HUANG, Jinrong LIU, Shuangshuang CHI