Abstract: An approach is provided for linear feature detection of cartographic features. The approach, for example, involves receiving a plurality of linear feature detections that represent one or more linear features of a geographic environment and are detected using at least one sensor. The approach also involves clustering the plurality of linear feature detections into at least one cluster and determining that the at least one cluster forms a polygon. The approach further involves cutting the polygon at one or more cut locations to form a plurality of sub-clusters of the plurality of linear feature detections. The approach further involves extracting respective centerlines for the plurality of sub-clusters and connecting the respective centerlines at the one or more cut locations to generate a network graph of the one or more linear features.

Abstract: An approach is provided for lane width estimation from incomplete lane marking detections of a road lane. The approach, for example, involves generating one or more perpendicular lines respectively from location centers of one or more first lane marking detections. A respective lane marking detection represents at least a portion of a boundary of the road lane as a line delimited by two location data points in accordance with detections by at least one sensor device onboard at least one vehicle. The approach also involves identifying second lane marking detections that each respectively intersect one of the one or more perpendicular lines. The approach further involves selecting one or more candidate lane widths based on one or more respective distances from the location centers to the second lane marking detections. The approach further involves determining an estimated lane width of the road lane based on the one or more candidate lane widths.

Abstract: A display substrate, a display panel and a display apparatus are provided. The display substrate includes a first display region and a second display region, and a light transmittance of the first display region is greater than a light transmittance of the second display region. A plurality of sub-pixels located in the first display region includes a plurality of sub-pixel groups, each sub-pixel group includes a first sub-pixel and a second sub-pixel, the first pixel driving circuit includes a first sub-pixel driving circuit and a second sub-pixel driving circuit. The first sub-pixel driving circuit includes at least a first reset transistor, the second sub-pixel driving circuit includes at least a second reset transistor, and the first reset transistor of the first sub-pixel driving circuit and the second reset transistor of the second sub-pixel driving circuit are at least partially shared with each other.

Abstract: A pixel circuit, a display panel, and a display device. The pixel circuit includes a light-emitting element, a pre-charging circuit, a first energy storage circuit, a data writing circuit and a driving circuit; the pre-charging circuit writes a data voltage into a pre-charging node under the control of a pre-charging scanning signal; the first energy storage circuit is electrically connected to the pre-charging node for storing electric energy; the data writing circuit controls the connection or disconnection between the pre-charging node and the first terminal of the driving circuit under the control of the first scanning signal; the first terminal of the driving circuit is electrically connected to the light-emitting element for driving the light-emitting element. The present disclosure enables the threshold voltage compensation to be completed during the data writing phase without the line scan time limitation during high frequency display.

Abstract: This application relates to an optical receiver. The optical receiver includes a photodetector and a trans-impedance amplifier that includes a first differential branch circuit, a second differential branch circuit, and a differential amplifier. The first differential branch circuit includes a first capacitor and a first trans-impedance amplifying unit, where an input end of the first capacitor receives an input signal from a power supply end of the photodetector, and an output end of the first capacitor is coupled to an input end of the first trans-impedance amplifying unit. The first differential branch circuit is configured to: amplify the input signal and output a reference signal. The second differential branch circuit is configured to amplify an electrical signal from the photodetector. Signal physical parameter values of the reference signal and an interference signal included in an amplified electrical signal are the same or similar.

Abstract: A pixel driving circuit includes: a data writing circuit, a compensation control circuit, a light emission control circuit, a voltage regulation circuit, a driving transistor, the compensation control circuit is connected with the driving transistor at a first node, the compensation control circuit is connected with the data writing circuit at a second node, the compensation control circuit, the light emission control circuit, the voltage regulation circuit are connected with the driving transistor at a third node; the compensation control circuit obtains a threshold voltage of the driving transistor, writes a third voltage into the second node, and writes a light emission voltage into the first node according to a variation in a voltage at the second node and the threshold voltage; the voltage regulation circuit maintains a voltage at the third node stable during the compensation control circuit writing the light emission voltage into the first node.

Abstract: A display substrate and a display device. In the display substrate, at least one of the inter-opening region, the first opening peripheral region and the second opening peripheral region includes a first virtual sub-pixel; the first signal line extends along a first direction and includes a first portion passing through the first opening peripheral region, the inter-opening region and the second opening peripheral region; the first portion passes through the first virtual sub-pixel, and the first virtual sub-pixel includes a first compensation capacitor, a first plate of the first compensation capacitor is in a same layer as the first portion of the first signal line and electrically connected with the first portion of the first signal line, and in a same layer as the second plate of the storage capacitor; the second plate is in a different layer from, insulated from, and overlaps with the first plate.

Abstract: Disclosed are a display substrate and a display apparatus, the display substrate includes a display region and a non-display region, the display substrate includes a base substrate and a circuit structure layer disposed on the base substrate, the circuit structure layer includes multiple pixel circuits arranged in an array and located in the display region and multiple drive circuits located in the non-display region.

Abstract: The present disclosure belongs to the technical field of battery materials, and discloses a silicon/carbon composite anode material, and a preparation method and use thereof. The preparation method includes the following steps: S1. dissolving a graphite anode powder in an acid solution, and conducting solid-liquid separation (SLS) to obtain a precipitate; and washing and drying the precipitate, adding a reducing agent, and subjecting a resulting mixture to heat treatment to obtain a purified graphite material; and S2. mixing a modified silicon powder with the graphite material, adding a resulting mixture to a polyimide (PI)-containing N,N-dimethylformamide (DMF) solution, and stirring; and subjecting a resulting mixture to distillation and then to carbonization to obtain the silicon/carbon composite anode material.

Abstract: A computing system including a processor configured to receive a mesh of a three-dimensional geometry. The processor is further configured to receive a source antenna location and a destination antenna location on the mesh. The processor is further configured to compute a ray path as an estimated shortest path between the source antenna location and the destination antenna location. The ray path includes a geodesic path over the mesh and a free space path outside the mesh. The ray path is computed at least in part by computing the geodesic path at least in part by performing inferencing at a trained neural network. Computing the ray path further includes computing the free space path at least in part by performing raytracing from a launch point located at an endpoint of the geodesic path. The processor is further configured to output the ray path to an additional computing process.

Abstract: Provided are a display substrate, a preparation method thereof, and a display device. The display substrate includes a display region and a bonding region on one side of the display region. The bonding region at least includes a lead area; the display region includes a plurality of data lines and a plurality of data fanout lines, the lead area includes a plurality of lead wires, and orthographic projections of the plurality of data lines and the plurality of data fanout lines on a plane of the display substrate are at least partially overlapped. At least one lead wire is connected to the data line through the data fanout line. In the lead area, an orthographic projection of any one of the lead wires on the plane of the display substrate and orthographic projections of other lead wires on the plane of the display substrate have no overlap region.

Abstract: A display substrate and a display device. In the display substrate, at least one of the inter-opening region, the first opening peripheral region and the second opening peripheral region includes a first virtual sub-pixel; the first signal line extends along a first direction and includes a first portion passing through the first opening peripheral region, the inter-opening region and the second opening peripheral region; the first portion passes through the first virtual sub-pixel, and the first virtual sub-pixel includes a first compensation capacitor, a first plate of the first compensation capacitor is in a same layer as the first portion of the first signal line and electrically connected with the first portion of the first signal line, and in a same layer as the second plate of the storage capacitor; the second plate is in a different layer from, insulated from, and overlaps with the first plate.

Abstract: A display substrate, a display device, a method of forming a display substrate, and a method of forming a display device are provided. The display substrate includes: a first insulation structure, including a display area and a frame area, where the frame area is arranged around the display area, and at least one first groove is arranged in the first insulation structure of the display area; a first wiring layer arranged on the first insulating structure and covering a side surface and a bottom surface of the first groove; a second insulation structure arranged on the first wiring layer, where at least one first through-hole is formed in the second insulation structure of the frame area; a first conductive structure covering a part of an upper surface of the second insulating structure and at least a sidewall and a bottom surface of the first via-hole.

Abstract: A system, a method, and a computer program product for validating a road sign are provided. The method comprises determining a transition location associated with the road sign using map data. The transition location is at least one of a map region start location or a map region end location. The method further comprises determining road sign data associated with the road sign using a sensor data cluster. The method further comprises determining a validity of the road sign based on the road sign data and the transition location.

Abstract: The present disclosure provides a display substrate, a preparation method thereof and a display apparatus. The display substrate includes a display region and an edge region located around the display region; the edge region includes a composite insulating layer disposed on a substrate, a power cord disposed on the composite insulating layer and an isolation dam disposed on the power cord, wherein the isolation dam is provided with auxiliary power cords. Both an auxiliary power cord of the isolation dam adjacent to the display region and an auxiliary power cord of the isolation dam away from the display region are lapped on the power cord.

Abstract: A display panel has a first display region, a second display region, a first peripheral region and a second peripheral region. The first peripheral region is located outside the first display region, the second peripheral region is located outside the second display region, and a transmittance of the first display region is greater than a transmittance of the second display region. The display panel includes a substrate, light-emitting devices disposed on the substrate and located in the first display region, first pixel circuits disposed on the substrate and located in the first peripheral region, and a gating circuit disposed on the substrate and coupled to the light-emitting devices and the first pixel circuits. The gating circuit is configured to connect each first pixel circuit to at least two light-emitting devices in a time-division manner to drive the light-emitting devices connected to the first pixel circuit to emit light.

Abstract: A display substrate includes first and second display regions, and a base substrate. A plurality of sub-pixels are arranged on a side of the base substrate, where the-sub-pixels include a first pixel driving circuit and a first light-emitting device connected to each other in the first display region, and the first pixel driving circuit includes at least a compensation transistor, a switching transistor, and a light-emitting device initialization transistor each having an active layer. A scan signal line is provided in the first display region. An orthographic projection of the scan signal line on the base substrate overlaps with that of the active layer of each of the compensation transistor and the light-emitting device initialization transistor, or that of the active layer of each of the switching transistor and the light-emitting device initialization transistor on the base substrate.

Abstract: The present disclosure provides a display panel and a display device. First interconnect lines of the display panel are connected to second data lines corresponding to first sub-pixels and third sub-pixels, and second interconnect sections of all the first interconnect lines are arranged in the same layer as a first source-drain metal layer or a second source-drain metal layer.

Abstract: Disclosed is a display substrate including a base substrate, a plurality of first light emitting elements, a plurality of first pixel circuits, and a plurality of second pixel circuits located in a first display region, and a plurality of second light emitting elements located in a second display region. The first display region includes a first first sub-display region to an N-th first sub-display region arranged sequentially along a side away from the second display region in a first direction, wherein N is an integer greater than 1. The second display region includes at least one second sub-display region. A second light emitting element of the second sub-display region is electrically connected with a second pixel circuit of an n-th first sub-display region, and a first light emitting element of the n-th first sub-display region is electrically connected with a first pixel circuit of an (n+i)-th first sub-display region.