Patents by Inventor Zhenqiang Ma

Zhenqiang Ma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100078722
    Abstract: This invention provides methods for fabricating high speed TFTs from silicon-on-insulator and bulk single crystal semiconductor substrates, such as Si(100) and Si(110) substrates. The TFTs may be designed to have a maximum frequency of oscillation of 3 GHz, or better.
    Type: Application
    Filed: September 8, 2006
    Publication date: April 1, 2010
    Inventors: Zhenqiang Ma, Hao-Chih Yuan, Guogong Wang
  • Publication number: 20100066454
    Abstract: A common-base amplifier for a bipolar junction transistor or a heterojunction bipolar transistor employs an active current source output biasing to provide for improved power output in a power saturation region providing increased power for a given transistor area such as may be advantageous in mobile radio transmitters or the like.
    Type: Application
    Filed: September 18, 2008
    Publication date: March 18, 2010
    Inventors: Zhenqiang Ma, Guogong Wang, Guoxuan Qin
  • Publication number: 20080315253
    Abstract: This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.
    Type: Application
    Filed: March 4, 2008
    Publication date: December 25, 2008
    Inventors: Hao-Chih Yuan, Guogong Wang, Mark A. Eriksson, Paul G. Evans, Max G. Lagally, Zhenqiang Ma
  • Patent number: 7354809
    Abstract: This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.
    Type: Grant
    Filed: February 13, 2006
    Date of Patent: April 8, 2008
    Assignee: Wisconsin Alumi Research Foundation
    Inventors: Hao-Chih Yuan, Guogong Wang, Mark A. Eriksson, Paul G. Evans, Max G. Lagally, Zhenqiang Ma
  • Publication number: 20070284688
    Abstract: The present invention provides high-speed, high-efficiency PIN diodes for use in photodetector and CMOS imagers. The PIN diodes include a layer of intrinsic semiconducting material, such as intrinsic Ge or intrinsic GeSi, disposed between two tunneling barrier layers of silicon oxide. The two tunneling barrier layers are themselves disposed between a layer of n-type silicon and a layer of p-type silicon.
    Type: Application
    Filed: June 13, 2006
    Publication date: December 13, 2007
    Inventors: Max G. Lagally, Zhenqiang Ma
  • Publication number: 20070187719
    Abstract: This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.
    Type: Application
    Filed: February 13, 2006
    Publication date: August 16, 2007
    Inventors: Hao-Chih Yuan, Guogong Wang, Mark Eriksson, Paul Evans, Max Lagally, Zhenqiang Ma
  • Publication number: 20070007626
    Abstract: Improved radio frequency gain in a silicon-based bipolar transistor may be provided by adoption of a common-base configuration, preferably together with excess doping of the base to provide extremely low base resistances boosting performance over similar common-emitter designs.
    Type: Application
    Filed: July 11, 2005
    Publication date: January 11, 2007
    Inventors: Zhenqiang Ma, Ningyue Jiang
  • Publication number: 20060267148
    Abstract: A high-power solid-state transistor structure comprised of a plurality of emitter or gate fingers arranged in a uniform or non-uniform manner to provide improved high power performance is disclosed. Each of the fingers is associated with a corresponding one of a plurality of sub-cells. In an exemplary embodiment, the fingers may be arranged in a 1-D or 2-D form having a “hollow-center” layout where one or more elongated emitter fingers or subcells are left out during design or disconnected during manufacture. In another exemplary embodiment, the fingers may be arranged in a 1-D or 2-D form having one or more “arc-shaped” rows that includes one or more elongated emitter fingers or subcells. The structure can be practically implemented and the absolute thermal stability can be maintained for very high power transistors with reduced adverse effects due to random variation in the manufacturing and design process.
    Type: Application
    Filed: August 2, 2006
    Publication date: November 30, 2006
    Inventors: Zhenqiang Ma, Ningyue Jiang
  • Publication number: 20050151159
    Abstract: A high-power solid-state transistor structure comprised of a plurality of emitter or gate fingers in a uniform or non-uniform manner to provide improved high power performance is disclosed. Preferably, each of the fingers is associated with a corresponding one of a plurality of sub-cells, the sub-cells being arranged in at least one row. The advantage of the invention is that the structure can be practically implemented and the absolute thermal stability can be maintained for very high power transistors with reduced adverse effects resulting from random variation in the manufacturing and design process.
    Type: Application
    Filed: November 19, 2004
    Publication date: July 14, 2005
    Inventors: Zhenqiang Ma, Ningyue Jiang
  • Publication number: 20030017700
    Abstract: This invention produces a film which is resistant to hillocking without compromising the electrical conductivity of the interconnects, the circuit architecture or any other function affecting the operation of the integrated circuit. The invention works on the principle that hillocking is caused by the squeezing or extrusion of certain grains (crystals) in the film due to a compressive residual stress state that arises from annealing (heating) treatments applied to the film following the deposition of the film. These grains are in a “weak” crystallographic orientation relative to the great majority of the grains. The coordinated orientation of this great majority of grains is known as the texture and aluminum films are deposited with a strong (111) texture, where (111) refers to specific crystallographic planes and <111>. Refers to the direction normal to the (111) plane.
    Type: Application
    Filed: July 23, 2001
    Publication date: January 23, 2003
    Inventors: Gary S. Was, David Srolovitz, Zhenqiang Ma, Liang Dong