Abstract: A shift register unit and a driving method thereof, a gate driving circuit, and a display device. The shift register unit includes: an input circuit, a first capacitor circuit, an output circuit, an output pull-down circuit, a coupling circuit, and an inverter circuit. The inverter circuit is coupled to an input control terminal, a first node, a second node, and a first level signal input terminal, and a second level signal input terminal; and used to control to connect or disconnect the second node and the first level signal input under the control of the input control terminal and the first level signal input terminal; also used to control to connect or disconnect the second node and the second level signal input terminal under the control of the first node and the second level signal input terminal.

Abstract: A display region includes a plurality of pixel driving circuitry setting regions arranged sequentially in a first direction, and each pixel driving circuitry setting region extends in a second direction intersecting the first direction. Each display circuitry includes a plurality of subpixels in one-to-one correspondence with the pixel driving circuitry setting regions, each subpixel includes a subpixel driving circuitry and a light-emitting element coupled to each other, the subpixel driving circuitry is located in a corresponding pixel driving circuitry setting region, the light-emitting element is located at a side of the subpixel driving circuitry away from the substrate, a width of the light-emitting element is greater than a width of the corresponding pixel driving circuitry setting region in the first direction, and a length of the light-emitting element is smaller than a length of the corresponding pixel driving circuitry setting region in the second direction.

Abstract: A display substrate, a display panel and a method of manufacturing a display substrate are provided. The display substrate includes: a substrate; a plurality of pixel units including at least a first pixel unit including a first light-emitting region and a first non-light-emitting region; a first light-emitting element arranged in the first light-emitting region, including a first electrode, a light-emitting layer and a second electrode; a scan driving circuit arranged in the first non-light-emitting region; and a first auxiliary electrode located in a first partial region in the first non-light-emitting region, wherein the scan driving circuit includes a plurality of scan driving sub-circuits located in a second partial region in the first non-light-emitting region; an orthographic projection of the first partial region on the substrate overlaps an orthographic projection of the second partial region on the substrate, and the first auxiliary electrode is electrically connected to the second electrode.

Abstract: Provided is a display substrate. The display substrate includes two pixels arranged along a first direction and adjacent to each other on a base substrate, and a pixel circuit in each of the two pixels includes a drive transistor, a first reset transistor, and a second reset transistor. A display device is also provided.

Abstract: Methods and systems are disclosed for managing performance states of a data fabric of a system on chip (SoC). Techniques disclosed include determining a performance state of the data fabric based on data fabric bandwidth utilizations of respective components of the SoC. A metric, characteristic of a workload centric to cores of the SoC, is derived from hardware counters, and, based on the metric, it is determined whether to alter the performance state.

Abstract: A technique for varying firmware for different virtual functions in a virtualized device is provided. The virtualized device includes a hardware accelerator and a microcontroller that executes firmware. The virtualized device is virtualized in that the virtualized device performs work for different virtual functions (with different virtual functions associated with different virtual machines), each function getting a “time-slice” during which work is performed for that function. To vary the firmware, each time the virtualized device switches from performing work for a current virtual function to work for a subsequent virtual function, one or more microcontrollers of the virtualized device examines memory storing addresses for firmware for the subsequent virtual function and begins executing the firmware for that subsequent virtual function. The addresses for the firmware are provided by a corresponding virtual machine at configuration time.

Abstract: A technique for varying firmware for different virtual functions in a virtualized device is provided. The virtualized device includes a hardware accelerator and a microcontroller that executes firmware. The virtualized device is virtualized in that the virtualized device performs work for different virtual functions (with different virtual functions associated with different virtual machines), each function getting a “time-slice” during which work is performed for that function. To vary the firmware, each time the virtualized device switches from performing work for a current virtual function to work for a subsequent virtual function, one or more microcontrollers of the virtualized device examines memory storing addresses for firmware for the subsequent virtual function and begins executing the firmware for that subsequent virtual function. The addresses for the firmware are provided by a corresponding virtual machine at configuration time.

Abstract: A technique for varying firmware for different virtual functions in a virtualized device is provided. The virtualized device includes a hardware accelerator and a microcontroller that executes firmware. The virtualized device is virtualized in that the virtualized device performs work for different virtual functions (with different virtual functions associated with different virtual machines), each function getting a “time-slice” during which work is performed for that function. To vary the firmware, each time the virtualized device switches from performing work for a current virtual function to work for a subsequent virtual function, one or more microcontrollers of the virtualized device examines memory storing addresses for firmware for the subsequent virtual function and begins executing the firmware for that subsequent virtual function. The addresses for the firmware are provided by a corresponding virtual machine at configuration time.

Abstract: A technique for varying firmware for different virtual functions in a virtualized device is provided. The virtualized device includes a hardware accelerator and a microcontroller that executes firmware. The virtualized device is virtualized in that the virtualized device performs work for different virtual functions (with different virtual functions associated with different virtual machines), each function getting a “time-slice” during which work is performed for that function. To vary the firmware, each time the virtualized device switches from performing work for a current virtual function to work for a subsequent virtual function, one or more microcontrollers of the virtualized device examines memory storing addresses for firmware for the subsequent virtual function and begins executing the firmware for that subsequent virtual function. The addresses for the firmware are provided by a corresponding virtual machine at configuration time.

Abstract: A technique for varying firmware for different virtual functions in a virtualized device is provided. The virtualized device includes a hardware accelerator and a microcontroller that executes firmware. The virtualized device is virtualized in that the virtualized device performs work for different virtual functions (with different virtual functions associated with different virtual machines), each function getting a “time-slice” during which work is performed for that function. To vary the firmware, each time the virtualized device switches from performing work for a current virtual function to work for a subsequent virtual function, one or more microcontrollers of the virtualized device examines memory storing addresses for firmware for the subsequent virtual function and begins executing the firmware for that subsequent virtual function. The addresses for the firmware are provided by a corresponding virtual machine at configuration time.

Abstract: The present disclosure provides methods and compositions for diagnosis and for providing a prognosis of a cancer patient by assessing CK2 alpha 1 pseudogene (CSNK2A1P) status. The present disclosure also provides polypeptide, polynucleotide, host cell, and transgenic animal compositions associated with CSNK2A1P.

Abstract: This invention provides compositions and methods for the diagnosis and treatment of cancers that exhibit decreased SOCS-3 expression.

Abstract: The present disclosure provides methods and compositions for diagnosis and for providing a prognosis of a cancer patient by assessing CK2 alpha 1 pseudogene (CSNK2A1P) status. The present disclosure also provides polypeptide, polynucleotide, host cell, and transgenic animal compositions associated with CSNK2A1P.

Abstract: This invention provides compositions and methods for the diagnosis and treatment of cancers that exhibit decreased SOCS-3 expression.

Abstract: The present disclosure provides compositions, pharmaceutical preparations, kits and methods for inhibiting cell proliferation by contacting a cell expressing Fzd8 with a truncated Wnt2 polypeptide which acts as a dominant negative inhibitor of Fzd8 signaling. The present disclosure provides compositions, kits and methods for the detection of cancer by determining the level of Fzd8 and/or Wnt2 expression in a cell.

Abstract: This invention relates to methods of inhibiting the growth of cells, in particular cancer cells, that overexpress Wnt2. The methods comprise contacting the cell with an agent that binds to Wnt2 mRNA or Wnt2 protein, interferes with Wnt2 signaling or inhibits binding of the Wnt2 protein to another protein, such as a Frizzled receptor.

Abstract: This invention provides compositions and methods for the diagnosis and treatment of cancers that exhibit decreased SOCS-3 expression.

Abstract: This invention provides compositions, methods and kits for the diagnosis and treatment of cancers expressing a GLI polypeptide, and in particular a GLI1, GLI2 or GLI3 polypeptide. The invention provides small molecule compounds mimicking the transcriptional activation domain of a GLI polypeptide. The small molecule inhibitors of the invention specifically block the activator function of a GLI polypeptide, but not the repressor function of GLI3.

Abstract: This invention relates to methods of inhibiting the growth of cancer cells that overexpress a Wnt protein. The methods comprise contacting the cell with an agent that inhibits binding of the Wnt protein to a Frizzled receptor.

Abstract: This invention provides compositions, methods and kits for the diagnosis and treatment of cancers wherein Wnt Inhibitory Factor-1 (WIF-1) is underexpressed.