Abstract: A shift register circuit, a driving method, a gate driving circuit, and a display device are provided. The shift register circuit includes a clock signal adjustment circuit and a self-control conduction circuit; the clock signal adjustment circuit includes a first clock signal input terminal, a second clock signal input terminal, and a clock signal adjustment output terminal; the clock signal adjusting circuit is configured to, in the case that the first clock signal and the second clock signal are both at a second level, output a first level via a clock signal adjustment output terminal; the self-control conduction circuit is configured to, in the case that the pull-up node is at the first level, control the clock signal adjustment output terminal connect with a pull-up node, or in the case that the pull-up node is at a second level, disconnect the clock signal adjustment output terminal from the pull-up node.

Abstract: A shift register, a driving method, a gate driving circuit and a display device are provided. The shift register includes: a reset circuit, a latch circuit, an output control circuit, and an output circuit which are series connected in sequence. The reset circuit is configured to provide an input signal from the input signal end for the pull-up node under the control of a reset signal from the reset signal end; the latch circuit is respectively connected to the input signal end and the pull-up node, and is configured to control the potential of the pull-up node; the output control circuit is respectively connected to the pull-up node, a dock signal end, and a control node, and is configured to control the potential of the control node; and the output circuit is respectively connected to the control node and an output end, and is configured to control the potential of the output end.

Abstract: The present disclosure relates to a substrate for a display panel, a display panel and a display device. The substrate according to the present disclosure comprises a base doped with upconverting ions capable of converting an infrared light beam into a visible light beam, the base is made of microcrystalline glass, and the microcrystalline glass comprises at least one of matrix materials NaYF4 and NaGdF4. The substrate according to the present disclosure may be used for any of a color filter substrate, an array substrate and a coverplate of the display panel.

Abstract: A shift register, a gate drive circuit, a display panel, and a driving method. The shift register includes: an input circuit, which is connected to a pull-up node and an input signal terminal respectively; an output circuit, which is connected to the pull-up node, a clock signal terminal, a direct current signal terminal and an input terminal respectively, wherein the clock signal terminal provides a clock signal, the direct current signal terminal provides a direct current signal, and the output circuit outputs a scanning signal from the output terminal; and an output pull-down circuit, which is connected to the output circuit. The output circuit is configured to output a scanning signal from the output terminal as one from among the direct current signal and the clock signal when a first output condition is satisfied.

Abstract: A shift register circuit, a driving method, a gate driving circuit, and a display device are provided. The shift register circuit includes a clock signal adjustment circuit and a self-control conduction circuit; the clock signal adjustment circuit includes a first clock signal input terminal, a second clock signal input terminal, and a clock signal adjustment output terminal; the clock signal adjusting circuit is configured to, in the case that the first clock signal and the second clock signal are both at a second level, output a first level via a clock signal adjustment output terminal; the self-control conduction circuit is configured to, in the case that the pull-up node is at the first level, control the clock signal adjustment output terminal connect with a pull-up node, or in the case that the pull-up node is at a second level, disconnect the clock signal adjustment output terminal from the pull-up node.

Abstract: The disclosure relates to a shift register unit, a driving method of shift register units, a gate driving circuit and a display panel. The shift register unit includes: an input module, a pull-up module, a storage capacitor, an output module configured to transmit a first voltage signal to a signal output terminal under the control of the first voltage signal; and an output control module configured to transmit the first voltage signal or a second power signal to the signal output terminal under the control of the voltage signal of the pull-up node and a first selection signal, and to transmit the first voltage signal or the second power signal to the signal output terminal under the control of the voltage signal of the pull-up node and a second selection signal.

Abstract: A shift register circuit includes an input terminal, a reset terminal, a first scan voltage terminal, a second scan voltage terminal, a first reference voltage terminal, a second reference voltage terminal, a clock terminal, an output terminal, an input circuit, a first control circuit, a second control circuit, and an output circuit. The first control circuit is configured to supply a second reference voltage applied at the second reference voltage terminal to a first node and bring the second reference voltage terminal into conduction with the output terminal in response to a second node being at an active potential. The second control circuit is configured to supply a first reference voltage applied at the first reference voltage terminal to the first node and bring the first reference voltage terminal into conduction with the output terminal in response to a third node being at an active potential.

Abstract: A shift register, a driving method, a gate driving circuit and a display device are provided. The shift register includes: a reset circuit, a latch circuit, an output control circuit, and an output circuit which are series connected in sequence. The reset circuit is configured to provide an input signal from the input signal end for the pull-up node under the control of a reset signal from the reset signal end; the latch circuit is respectively connected to the input signal end and the pull-up node, and is configured to control the potential of the pull-up node; the output control circuit is respectively connected to the pull-up node, a dock signal end, and a control node, and is configured to control the potential of the control node; and the output circuit is respectively connected to the control node and an output end, and is configured to control the potential of the output end.

Abstract: The disclosure provides an array substrate, a display panel, a display device and a display method. The array substrate comprises a display region provided with a plurality of data lines therein and a wiring region around the display region and provided with a plurality of leading wires therein. The plurality of leading wires are connected with the plurality of data lines respectively in a one-to-one correspondence way. The plurality of leading wires comprise a plurality of first leading wires and a plurality of second leading wires insulatively arranged in different layers. The plurality of first leading wires and the plurality of second leading wires comprise at least one pair of overlapped first and second leading wires to which data signals having the same polarity are input.

Abstract: The present disclosure provides a self-capacitance touch structure, a touch panel and a display device. The self-capacitance touch structure comprising a plurality of self-capacitance touch electrodes arranged in an array, the self-capacitance touch electrode comprising a main body portion and a side wing portion protruding from at least one side of the main body portion, wherein at least one recess is formed between the side wing portion and the main body portion, the side wing portion of at least one self-capacitance touch electrode in at least one row extends into the recess of a self-capacitance touch electrode, adjacent to the at least one self-capacitance touch electrode, in another row.

Abstract: The present disclosure relates to a substrate for a display panel, a display panel and a display device. The substrate according to the present disclosure comprises a base doped with upconverting ions capable of converting an infrared light beam into a visible light beam, the base is made of microcrystalline glass, and the microcrystalline glass comprises at least one of matrix materials NaYF4 and NaGdF4. The substrate according to the present disclosure may be used for any of a color filter substrate, an array substrate and a coverplate of the display panel.

Abstract: According to one aspect of this disclosure, a scanning trigger unit includes a clock signal terminal, a first signal input terminal, a fixed level signal terminal, a first input sub-circuit, an output sub-circuit, a first holding sub-circuit, and a signal output terminal. The first input sub-circuit is connected to the first signal input terminal and a control node, and is configured to provide a first valid signal to the control node; the output sub-circuit is connected to the fixed level signal terminal, the clock signal terminal, and the control node, and is configured to provide a second valid signal to the signal output terminal; and the first holding sub-circuit is connected to the fixed level signal terminal and the signal output terminal, and is configured to hold the second valid signal at the signal output terminal for a predetermined time.

Abstract: Embodiments of the present invention provide an array substrate assembly and a display apparatus including the array substrate assembly. The array substrate assembly includes a display region and a non-display region around the display region. A static electricity leading layer electrically insulated from the display region is disposed in the non-display region.

Abstract: The present disclosure provides a shift register, comprising: a first input module, a second input module, an energy storage module, an output module and a reset module; and two shift signal input terminals, a reset control signal input terminal, a second electrical level input terminal and a first electrical level input terminal; a control terminal and an input terminal of the first input module being connected with the first shift signal input terminal, a control terminal and an input terminal of the second input module being connected with the second shift signal input terminal; output terminals of the first input module and the second input module as well as a first terminal of the energy storage module all being connected with a first node; the first input module and the second input module being configured to be turned on when the first or second shift signal input terminal accesses a first electrical level, and set the voltage of the first node to the first electrical level.

Abstract: A shift register includes an input circuit, a first reset circuit, an output circuit, a second reset circuit and a first pull-down control circuit. The input circuit may control a voltage of the first node according to a reset signal from a reset signal terminal. The first reset circuit may reset the voltage of the first node according to the reset signal from the reset signal terminal. The output circuit may control an output signal of a signal output terminal according to the voltage of the first node. The second reset circuit may reset the voltage of the first node and the output signal according to a voltage of a second node. The first pull-down control circuit may control the voltage of the second node according to the voltage of the first node based on a first auxiliary voltage signal and a second auxiliary voltage signal, wherein a phase of the first auxiliary voltage signal is opposite to a phase of the second auxiliary voltage signal, and each duty cycles is 50%.

Abstract: The embodiments of the present disclosure provide an array substrate, display panel and display apparatus. The array substrate comprises a plurality of gate lines extending in a row direction; a plurality of data lines extending in a column direction; and an array comprising a plurality of pixels. Each column of pixels of the plurality of pixels are coupled to two data lines of the plurality of data lines, the two data lines are configured to provide same data signal for displaying an image to the column of pixels, a first data line of the two data lines and a second data line of the two data lines are arranged at both sides of the column of pixels along the row direction, respectively. The array substrate, display panel and display apparatus according to the embodiments of the present disclosure can greatly reduce coupling capacitance between a pixel electrode and a data line, thereby an effect of reducing crosstalk can be achieved.

Abstract: A shift register includes an input circuit, a first reset circuit, an output circuit, a second reset circuit and a first pull-down control circuit. The input circuit may control a voltage of the first node according to a reset signal from a reset signal terminal. The first reset circuit may reset the voltage of the first node according to the reset signal from the reset signal terminal. The output circuit may control an output signal of a signal output terminal according to the voltage of the first node. The second reset circuit may reset the voltage of the first node and the output signal according to a voltage of a second node. The first pull-down control circuit may control the voltage of the second node according to the voltage of the first node based on a first auxiliary voltage signal and a second auxiliary voltage signal, wherein a phase of the first auxiliary voltage signal is opposite to a phase of the second auxiliary voltage signal, and each duty cycles is 50%.

Abstract: The disclosure provides an array substrate, a display panel, a display device and a display method. The array substrate comprises a display region provided with a plurality of data lines therein and a wiring region around the display region and provided with a plurality of leading wires therein. The plurality of leading wires are connected with the plurality of data lines respectively in a one-to-one correspondence way. The plurality of leading wires comprise a plurality of first leading wires and a plurality of second leading wires insulatively arranged in different layers. The plurality of first leading wires and the plurality of second leading wires comprise at least one pair of overlapped first and second leading wires to which data signals having the same polarity are input.

Abstract: The present invention relates to the field of display technology, and discloses an array substrate, a manufacturing method thereof and a display device, for reducing the light leakage of a display device. The array substrate comprises a plurality of pixel regions arranged in arrays on a base substrate, two adjacent ones of the pixel regions having a signal line arranged therebetween, and the pixel regions and the signal line having a gap therebetween, wherein the array substrate further comprises at least one light-leakage-proof electrode arranged to be insulated from the pixel regions and the signal line, and the vertical projection of the light-leakage-proof electrode on the base substrate at least covers a portion of the vertical projection of the gap on the base substrate. The present invention is applicable in the field of display technology.

Abstract: The present disclosure provides a self-capacitance touch structure, a touch panel and a display device. The self-capacitance touch structure comprising a plurality of self-capacitance touch electrodes arranged in an array, the self-capacitance touch electrode comprising a main body portion and a side wing portion protruding from at least one side of the main body portion, wherein at least one recess is formed between the side wing portion and the main body portion, the side wing portion of at least one self-capacitance touch electrode in at least one row extends into the recess of a self-capacitance touch electrode, adjacent to the at least one self-capacitance touch electrode, in another row.