Abstract: A shift register unit includes input, output, restoration, reset, reset reinforce, reset reinforce control, and energy storage modules. The input, output, restoration and energy storage modules are connected to a first node. The output module is adapted to output a shift signal at a first electrical level when the voltage at the first node is at the first electrical level. The reset module is connected to the output module, and the reset module is adapted to set the voltage at the output module to a second electrical level. Both the reset reinforce and reset reinforce control modules are connected to a second node, and the reset reinforce control module includes a first and a second transistor. A channel width to length ratio of the first transistor is greater than that of the second transistor. Switch states of the first and second transistors control the voltage at the second node.

Abstract: Embodiments of the present invention provide an array substrate assembly and a display apparatus including the array substrate assembly. The array substrate assembly includes a display region and a non-display region around the display region. A static electricity leading layer electrically insulated from the display region is disposed in the non-display region.

Abstract: A thin film transistor and its manufacturing method are provided. The thin film transistor comprises an active layer on a substrate, and further comprises an ultraviolet light blocking layer positioned on a side of the active layer away from the substrate, and the active layer has a projection on the substrate which is within a projection of the ultraviolet light blocking layer on the substrate. The active layer is completely covered by the ultraviolet light blocking layer, and during the photo-alignment process, the ultraviolet light blocking layer can effectively eliminate the influence of the ultraviolet light on the active layer of the thin film transistor and ensure that the performance of the thin film transistor will not be affected by irradiation of the ultraviolet light.

Abstract: The present invention relates to the field of display technology, and discloses an array substrate, a manufacturing method thereof and a display device, for reducing the light leakage of a display device. The array substrate comprises a plurality of pixel regions arranged in arrays on a base substrate, two adjacent ones of the pixel regions having a signal line arranged therebetween, and the pixel regions and the signal line having a gap therebetween, wherein the array substrate further comprises at least one light-leakage-proof electrode arranged to be insulated from the pixel regions and the signal line, and the vertical projection of the light-leakage-proof electrode on the base substrate at least covers a portion of the vertical projection of the gap on the base substrate. The present invention is applicable in the field of display technology.

Abstract: A shift register unit includes input, output, restoration, reset, reset reinforce, reset reinforce control, and energy storage modules. The input, output, restoration and energy storage modules are connected to a first node. The output module is adapted to output a shift signal at a first electrical level when the voltage at the first node is at the first electrical level. The reset module is connected to the output module, and the reset module is adapted to set the voltage at the output module to a second electrical level. Both the reset reinforce and reset reinforce control modules are connected to a second node, and the reset reinforce control module includes a first and a second transistor. A channel width to length ratio of the first transistor is greater than that of the second transistor. Switch states of the first and second transistors control the voltage at the second node.

Abstract: The present invention provides a display panel and a display device. The display panel comprises an array substrate and a color filter substrate assembled in an aligned manner, the array substrate comprises a display area and a lead wire area provided on the periphery of at least one side of the display area, a first boundary line of the color filter substrate close to one side of the lead wire area has an orthographic projection on the array substrate and the orthographic projection falls into a boundary area of the lead wire area adjacent to the display area, a protective layer is provided on one side of the boundary area facing the color filter substrate, and the protective layer covers parts of the boundary area corresponding to the orthographic projection of the first boundary line on the array substrate and lead wires surrounding the parts.

Abstract: The present disclosure provides a shift register, comprising: a first input module, a second input module, an energy storage module, an output module and a reset module; and two shift signal input terminals, a reset control signal input terminal, a second electrical level input terminal and a first electrical level input terminal; a control terminal and an input terminal of the first input module being connected with the first shift signal input terminal, a control terminal and an input terminal of the second input module being connected with the second shift signal input terminal; output terminals of the first input module and the second input module as well as a first terminal of the energy storage module all being connected with a first node; the first input module and the second input module being configured to be turned on when the first or second shift signal input terminal accesses a first electrical level, and set the voltage of the first node to the first electrical level.

Abstract: The present invention provides a display panel and a display device. The display panel comprises an array substrate and a color filter substrate assembled in an aligned manner, the array substrate comprises a display area and a lead wire area provided on the periphery of at least one side of the display area, a first boundary line of the color filter substrate close to one side of the lead wire area has an orthographic projection on the array substrate and the orthographic projection falls into a boundary area of the lead wire area adjacent to the display area, a protective layer is provided on one side of the boundary area facing the color filter substrate, and the protective layer covers parts of the boundary area corresponding to the orthographic projection of the first boundary line on the array substrate and lead wires surrounding the parts.

Abstract: This disclosure relates to an array substrate and fabricating method thereof as well as a display device, the array substrate comprising: a plurality of scanning lines and a plurality of signal lines, the plurality of scanning lines and plurality of signal lines defining a plurality of pixel regions; and a shielding electrode line arranged above the signal line between adjacent pixel regions, for shielding signal interference between pixel electrodes in the adjacent pixel regions. By means of the technical solution of this disclosure, the shielding electrode line arranged between adjacent pixels can shield crosstalk between the pixel electrodes of adjacent pixels, and can form a transverse storage capacitance with the pixel electrode in the pixel, thereby increasing the total storage capacitance, and maintaining voltage difference between the pixel electrode and a common electrode, so as to diminish the influence of the leakage current and prevent image flicker effectively.

Abstract: The present disclosure discloses a gate driving circuit including multi-stage shift registers, and an output side switch element which is controlled by the second clock signal to be turned on or off. The output side switch element is located between an input terminal and an output terminal of each stage shift register. An output terminal of the (N+2)-th stage shift register is coupled to a reset terminal of the N-th stage shift register.

Abstract: A shift register unit includes an input end, a gate driving signal output end, a resetting end, a pull-up transistor, a pull-down transistor, a pull-down node control module, a pull-up node control module and an output noise reduction transistor. The pull-down node control module is configured to pull up a potential of a pull-down node to a high potential at a first noise reduction stage, so as to turn on the pull-down transistor and enable the gate driving signal output end to output a low level. The pull-up node control module is configured to pull down a potential of the pull-up node to a low potential at a resetting stage, and maintain the potential of the pull-up node to be at a low potential at the first noise reduction stage and a second noise reduction stage, so as to turn off the pull-up transistor.

Abstract: The present disclosure discloses a gate driving circuit including multi-stage shift registers, and an output side switch element which is controlled by the second clock signal to be turned on or off. The output side switch element is located between an input terminal and an output terminal of each stage shift register. An output terminal of the (N+2)-th stage shift register is coupled to a reset terminal of the N-th stage shift register.