Abstract: A solution of a first set of equations of the time-varying electrical response of a circuit is determined between pairs of adjacent time points ti and ti+1 based on predicted electrical responses of the devices at time point ti+1 and as a function of the initial temperatures of the circuit devices at time point ti. A solution of a second set of equations of the time-varying temperature responses of devices of the circuit is determined (1) after each iteration of the first set of equations and as a function thereof or (2) at each time point ti+1 and as a function of the solution of the first set of equations at the time point to determine the corresponding temperature response of the circuit. The solutions of the first and second sets of equations at one or more of the points in time are displayed.

Abstract: The present invention includes a method for detecting model stamping errors during circuit simulation without the need for golden data. The method checks for model stamping errors by determining whether entries in model stamping matrices interrelate according to a plurality of preset rules before circuit equations are solved.

Abstract: The present invention presents methods for modeling the high frequency and noise characterization of MOSFETs. The models may be readily implemented as part of a SPICE or other simulation in a design flow. In particular, this invention is capable of providing a sub-circuit representation of a MOSFET that can accurately predicate a MOSFET's low frequency, high frequency, and noise characterizations. An interface is described through which a user may simultaneously optimize all of these characterizations. Further, methods are presented for building models that can predicate the variations in MOSFETs due to manufacturing processes and generate a corresponding corner model.

Abstract: The present invention includes a method for modeling devices having different geometries, in which a range of interest for device geometrical variations is divided into a plurality of subregions each corresponding to a subrange of device geometrical variations. The plurality of subregions include a first type of subregions and a second type of subregions. The first or second type of subregions include one or more subregions. A regional global model is generated for each of the first type of subregions and a binning model is generated for each of the second type of subregions. The regional global model for a subregion uses one set of model parameters to comprehend the subrange of device geometrical variations corresponding to the G-type subregion. The binning model for a subregion includes binning parameters to provide continuity of the model parameters when device geometry varies across two different subregions.

Abstract: The present invention presents methods for modeling the high frequency and noise characterization of MOSFETs. The models may be readily implemented as part of a SPICE or other simulation in a design flow. In particular, this invention is capable of providing a sub-circuit representation of a MOSFET that can accurately predicate a MOSFET's low frequency, high frequency, and noise characterizations. An interface is described through which a user may simultaneously optimize all of these characterizations. Further, methods are presented for building models that can predicate the variations in MOSFETs due to manufacturing processes and generate a corresponding corner model.

Abstract: An exemplary system for measuring noise in a device comprises a CPU, a memory coupled to the CPU, an interface coupled to the CPU for providing instructions processed by the CPU, a control unit coupled to the interface for receiving the instructions, a preamplifier circuit coupled to the control unit for implementing the instructions, a power supply unit controlled by the control unit for providing power to the preamplifier circuit, and a device holder selectively attached to the preamplifier circuit. In an exemplary embodiment, the preamplifier circuit further comprises a plurality of filters, an amplifier circuit, a plurality of switches for switching the amplifier circuit between a voltage amplifier mode and a current amplifier mode, and a variable loading resistor.

Abstract: The present invention presents methods for modeling the high frequency and noise characterization of MOSFETs. The models may be readily implemented as part of a SPICE or other simulation in a design flow. In particular, this invention is capable of providing a sub-circuit representation of a MOSFET that can accurately predicate a MOSFET's low frequency, high frequency, and noise characterizations. An interface is described through which a user may simultaneously optimize all of these characterizations. Further, methods are presented for building models that can predicate the variations in MOSFETs due to manufacturing processes and generate a corresponding corner model.

Abstract: The present invention presents methods for modeling the high frequency and noise characterization of MOSFETs. The models may be readily implemented as part of a SPICE or other simulation in a design flow. In particular, this invention is capable of providing a sub-circuit representation of a MOSFET that can accurately predicate a MOSFET's low frequency, high frequency, and noise characterizations. An interface is described through which a user may simultaneously optimize all of these characterizations. Further, methods are presented for building models that can predicate the variations in MOSFETs due to manufacturing processes and generate a corresponding corner model.

Abstract: An exemplary method for simulating the effect of mismatch in design flows comprises receiving measured data, receiving an original model, extracting a mismatch model based on the measured data and the original model, attaching the mismatch model to the netlist to obtain a modified netlist, and simulating an effect of mismatch based on the modified netlist. In one embodiment, the extracting of a mismatch model includes selecting a set of model parameters, generating a distribution of mismatch values for each of the model parameters, extracting a set of linking coefficients based on said mismatch values, and extracting said mismatch model based on said set of linking coefficients.

Abstract: The present invention is directed to a number of improvements in methods for reliability simulations in aged circuits whose operation has been degraded through hot-carrier or other effects. A plurality of different circuit stress times can be simulated within a single run. Different aging criteria may be used for different circuit blocks, circuit block types, devices, device models and device types. The user may specify the degradation of selected circuit blocks, circuit block types, devices, device models and device types independently of the simulation. Device degradation can be characterized in tables. Continuous degradation levels can be quantized. Techniques are also described for representing the aged device in the netlist as the fresh device augmented with a plurality of independent current sources connected between its terminals to mimic the effects of aging in the device. The use of device model cards with age parameters is also described.

Abstract: An approach for simulating hot carrier effects in an integrated circuit (IC) at the circuit level includes generating a hot carrier library of delay data for each cell in the IC, using the hot carrier library data to generate a set of scaled timing data for the IC and using the scaled timing data with a IC performance simulator to simulate the IC operation. The scaled timing data is based upon the cell delay data and time-based switching activity of each cell in the IC.

Abstract: A system and method of simulating operation of an integrated circuit. First, circuit characteristics of circuit components are measured, and a set of circuit simulation model parameters are generated for each measured circuit component. Then, the operation of predefined circuit primitives is simulated using each of the generated sets of circuit simulation model parameters. The circuit primitives include the measured circuit components. The simulated operations are then analyzed to select ones of the simulated operations that are worst, best and nominal with respect to a specified circuit performance parameter and to extract model parameters corresponding to the worst case, best case and nominal case sets of circuit simulation model parameters from the generated sets of circuit simulation model parameters. Each extracted set of circuit simulation model parameters comprises one of the generated sets of circuit simulation model parameters.