Abstract: There provides an information processing method and a terminal apparatus, and the information processing method is applied in the terminal apparatus, and the terminal apparatus is able to be connected with a remote server. The information processing method includes obtaining a first operation for a first operating environment of a specific user of the terminal apparatus in the first operating environment; responding to the first operation by the first operating environment; transmitting first parameter information of the first operation and second parameter information of the first operating environment in response to the first operation to the remote server; receiving customized configuration information or customized prompt information related to the specific user from the remote server; configuring the first operating environment to provide optimized customized configuration or customized prompt to the specific user based on the customized configuration information or the customized prompt information.

Abstract: Among other things, a semiconductor device comprising an aligned gate and a method for forming the semiconductor device are provided. The semiconductor device comprises a gate formed according to a multi-gate structure, such as a gate-all-around structure. A first gate portion of the gate is formed above a first channel of the semiconductor device. A second gate portion of the gate is formed below the first channel, and is aligned with the first gate portion. In an example of forming the gate, a cavity is etched within a semiconductor layer formed above a substrate. A dielectric layer is formed around at least some of the cavity to define a region of the cavity within which the second gate portion is to be formed in a self-aligned manner with the first gate portion. In this way, the semiconductor device comprises a first gate portion aligned with a second gate portion.

Abstract: A Fin Field-Effect Transistor (FinFET) includes a semiconductor layer over a substrate, wherein the semiconductor layer forms a channel of the FinFET. A first silicon germanium oxide layer is over the substrate, wherein the first silicon germanium oxide layer has a first germanium percentage. A second silicon germanium oxide layer is over the first silicon germanium oxide layer. The second silicon germanium oxide layer has a second germanium percentage greater than the first germanium percentage. A gate dielectric is on sidewalls and a top surface of the semiconductor layer. A gate electrode is over the gate dielectric.

Abstract: A stacking structure in which a stacked body (21) including a first conductive layer (13), a semiconductor layer (17), and a second conductive layer (18) and an interlayer insulating film (16) are alternately stacked in parallel to a substrate, a plurality of columnar electrodes (12) arranged so as to penetrated through the stacking structure in a stacking direction, a variable resistance layer (14) which is disposed between the columnar electrode (12) and the first conductive layer (13) and which has a resistance value that reversibly changes according to an application of an electric signal are included. The variable resistance layer (14) is formed by oxidizing part of the first conductive layer (13). The variable resistance layer (14) and an insulating film for electrically separating the semiconductor layer (17) and the second conductive layer (18) from the columnar electrode (12) are simultaneously formed in a single oxidation process.

Abstract: The disclosure relates to a fin field effect transistor (FinFET). An exemplary FinFET comprises a substrate comprising a major surface; a fin structure protruding from the major surface comprising a lower portion comprising a first semiconductor material having a first lattice constant; an upper portion comprising the first semiconductor material having the first lattice constant; a middle portion between the lower portion and upper portion, wherein the middle portion comprises a second semiconductor material having a second lattice constant different from the first lattice constant; and a pair of notches extending into opposite sides of the middle portion; and an isolation structure surrounding the fin structure, wherein a top surface of the isolation structure is higher than a top surface of the pair of notches.

Abstract: A data output method and apparatus according to the present invention, which are applicable in a data processing device comprising an output unit, a computer system and an embedded system, generate a control command for enabling an establishment of a channel for outputting data when it is determined that the computer system stays in a non-operating state, establish a data transmission channel between the embedded system and the output unit based on the control command, determine data to be outputted, and transfer the data to be outputted from the embedded system to the output unit through the data transmission channel. In this way, the method and apparatus according to the present invention can ensure that a user need not wait a long time for the computer's start-up, and can carry out an operation on local data for the computer in time, which improves the user satisfaction.

Abstract: A variable resistance element including: a first electrode; a second electrode; and a variable resistance layer having a resistance value which reversibly changes according to electrical signals applied, wherein the variable resistance layer includes a first variable resistance layer comprising a first oxygen-deficient transition metal oxide, and a second variable resistance layer comprising a second transition metal oxide having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first oxygen-deficient transition metal oxide, the second electrode has a single needle-shaped part at an interface with the second variable resistance layer, and the second variable resistance layer is interposed between the first variable resistance layer and the second electrode, is in contact with the first variable resistance layer and the second electrode, and covers the single needle-shaped part.

Abstract: A semiconductor device includes a channel having a first linear surface and a first non-linear surface. The first non-linear surface defines a first external angle of about 80 degrees to about 100 degrees and a second external angle of about 80 degrees to about 100 degrees. The semiconductor device includes a dielectric region covering the channel between a source region and a drain region. The semiconductor device includes a gate electrode covering the dielectric region between the source region and the drain region.

Abstract: A semiconductor device includes a first channel having a first linear surface and a first non-linear surface. The semiconductor device includes a first dielectric region surrounding the first channel. The semiconductor device includes a second channel having a third linear surface and a third non-linear surface. The semiconductor device includes a second dielectric region surrounding the second channel. The semiconductor device includes a gate electrode surrounding the first dielectric region and the second dielectric region.

Abstract: The invention relates to a gasifier comprising a syngas generation section, a coal methanation section and a syngas methanation section in the order from bottom to top. The invention also relates to a process for preparing methane by catalytically gasifying coal using such a gasifier. Optionally, the gasifier is additionally provided with a coal pyrolysis section above the syngas methanation section.

Abstract: A MOSFET disposed between shallow trench isolation (STI) structures includes an epitaxial silicon layer formed over a substrate surface and extending over inwardly extending ledges of the STI structures. The gate width of the MOSFET is therefore the width of the epitaxial silicon layer and greater than the width of the original substrate surface between the STI structures. The epitaxial silicon layer is formed over the previously doped channel and is undoped upon deposition. A thermal activation operation may be used to drive dopant impurities into the transistor channel region occupied by the epitaxial silicon layer but the dopant concentration at the channel location where the epitaxial silicon layer intersects with the gate dielectric, is minimized.

Abstract: An electronic device, an electronic system, and a wireless charging method are provided. The electronic device may comprise a housing, including an operating surface on which a display unit or an input device is provided and a first end surface adjoining the operating surface at a first edge, wherein the operating surface has an area greater than that of the first end surface; and a coil for electromagnetic induction, provided in a first side portion of the housing close to the first end surface, and formed in a columnar shape with an axis substantially parallel to the first edge.

Abstract: A method includes forming a semiconductor fin, forming a dummy gate on a top surface and sidewalls of the semiconductor fin, and removing the dummy gate to form a recess. The semiconductor fin is exposed to the recess. After the dummy gate is removed, an oxidation is performed on the semiconductor fin to form a condensed germanium-containing fin in the recess, and a silicon oxide layer on a top surface and sidewalls of the condensed germanium-containing fin. The method further includes forming a gate dielectric over the condensed germanium-containing fin, and forming a gate electrode over the gate dielectric.

Abstract: Provided is a transistor and a method for forming a transistor in a semiconductor device. The method includes performing at least one implantation operation in the transistor channel area, then forming a silicon carbide/silicon composite film over the implanted area prior to introducing further dopant impurities. A halo implantation operation with a very low tilt angle is used to form areas of high dopant concentration at edges of the transistor channel to alleviate short channel effects. The transistor structure so-formed includes a reduced dopant impurity concentration at the substrate interface with the gate dielectric and a peak concentration about 10-50 nm below the surface. The dopant profile also includes the transistor channel having high dopant impurity concentration areas at opposed ends of the transistor channel.

Abstract: Provided is an air interface security method. In the process of protocol transmission, the method executes: 1) a short-range coupling device sending a security parameter request message to a short-range card; 2) after receiving the security parameter request message, the short-range card conduct security parameter feedback on the short-range coupling device; and 3) the short-range coupling device and the short-range card establish a security link according to a security parameter. Provided are a short-range coupling device, a short-range card, etc. for achieving the method. By introducing a security mechanism, the present invention provides a security protection capability for an air interface, can provide identity authentication for a short-range coupling device and a short-range card to ensure the validity and authenticity of the identities of both sides in the communications, and at the same time, will not bring additional hardware overhead to the short-range coupling device and the short-range card.

Abstract: A glass panel is provided having a glass structure with an exterior surface and an interior surface, the glass structure having at least one glass sheet with a thickness ranging from about 0.5 mm to about 2.0 mm and a backing frame positioned adjacent the glass structure and situated along the perimeter of the interior surface of the glass structure. The glass panel further includes a polymer layer positioned on the interior surface and intermediate the glass structure and backing frame to adhere the glass structure together with the backing frame an array of acoustic exciters positioned on the glass structure, the array of acoustic exciters providing excitation energy to or receiving excitation energy from the glass structure where frequency response of the panel can be a function of the geometry of the glass structure and the position of the acoustic exciters.

Abstract: A raman spectrum measuring method for drug inspection is provided, comprising: measuring raman spectrum of a sample to be inspected to acquire an original raman spectrum curve of the sample; determining whether the original raman spectrum curve has a characterizing portion, and if not, measuring a mixture of the sample and an enhancing agent to acquire an enhanced raman spectrum curve of the sample; and if the original raman spectrum curve of the sample to be inspected has a characterizing portion, comparing the original raman spectrum curve of the sample with data in an original raman spectrum database of a drug to determine whether the sample contains the drug, otherwise, comparing the enhanced raman spectrum curve of the sample with data in an enhanced raman spectrum database of the drug to determine whether the sample to be inspected contains the drug.

Abstract: A straight trajectory CT device can be used in radiation imaging. The device includes: a ray-generating unit that generates a ray within a specific range of field angle; a channel for an object to be inspected though which the object to be inspected passes; a first collimator; and a ray receiving unit provided on both sides of the channel for the object to be inspected. The ray beam is received by the ray receiving unit after penetrating the first collimator and the object to be inspected in order. The ray generating unit is static and the first collimator moves in the same direction as the ray receiving unit. This direction is parallel to the channel for the object to be inspected. The device can complete computed tomography with a minimum of one ray receiving unit, thereby simplifying the structure of the device and reducing its cost.

Abstract: A multi-gate semiconductor device is formed including a semiconductor substrate. The multi-gate semiconductor device also includes a first transistor including a first fin portion extending above the semiconductor substrate. The first transistor has a first channel region formed therein. The first channel region includes a first channel region portion doped at a first concentration of a first dopant type and a second channel region portion doped at a second concentration of the first dopant type. The second concentration is higher than the first concentration. The first transistor further includes a first gate electrode layer formed over the first channel region. The first gate electrode layer may be of a second dopant type. The first dopant type may be N-type and the second dopant type may be P-type. The second channel region portion may be formed over the first channel region portion.

Abstract: A substrate-less composite power semiconductor device may include a thin substrate and a top metal layer located on a top surface of the substrate. A total thickness of the substrate and the epitaxial layer may be less than 25 microns. Solder bumps are formed on top of the top metal layer and molding compound surrounds the solder bumps and leaves the solder bumps at least partly exposed.