Patents by Inventor Zhiqiang Ma

Zhiqiang Ma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12282232
    Abstract: A display panel and a display device are provided, and relate to the field of displaying. The display panel includes a display area and a peripheral area located at a periphery of the display area. The peripheral area includes a package region and an UDC region located between the display area and the package region. The display panel further includes a transition area surrounding the UDC region, and an opposite substrate and an array substrate arranged opposite to each other. In the UDC region, the opposite substrate and the array substrate are both light-transmissible areas; in the transition area, at least one spacer ring surrounding the UDC region is arranged on the opposite substrate, and each spacer ring includes a plurality of spacers that are spaced apart from each other. The technical solutions of the present disclosure can implement UDCs for the medium-sized display product and the large-sized display product.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: April 22, 2025
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jiliang Zhang, Zhiqiang Ma, Xiaona Liu, Zhitao Li, Yu Ma, Weitao Chen
  • Patent number: 12282233
    Abstract: An array substrate includes: a base substrate, a light shielding layer on a first surface of the base substrate, and a plurality of pixel units and a first common electrode bus on a second surface of the base substrate. The base substrate includes a display region, first and second peripheral regions. Orthographic projections of the pixel units on the base substrate are arranged in an array in the display region. At least part of an orthographic projection of the light shielding layer and at least part of an orthographic projection of the first common electrode bus on the base substrate are in the second peripheral region, and the first common electrode bus is electrically connected to the common electrode included in at least one pixel unit. A distribution density of the first common electrode bus in the first peripheral region is smaller than that in the second peripheral region.
    Type: Grant
    Filed: November 29, 2022
    Date of Patent: April 22, 2025
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE Technology Group Co., Ltd.
    Inventors: Tingting Wang, Xu Wang, Qi Wang, Yan Yan, Yu Ma, Xiaofeng Yin, Zhiqiang Ma, Tao Gong, Haoyan Ren
  • Publication number: 20250126891
    Abstract: The present disclosure relates to an array substrate, a display panel, and an electronic device. The array substrate includes a plurality of sub-pixel regions, a gate line layer, and a common electrode layer. Each sub-pixel region of the sub-pixel regions has two sub-pixel units disposed in a same row and two thin film transistors connected to the two sub-pixel units respectively. The gate line layer has gate lines and gate electrodes. Control electrodes of two thin film transistors of each sub-pixel region are respectively connected to two gate lines located on two ends of the sub-pixel region through corresponding gate electrodes.
    Type: Application
    Filed: December 26, 2022
    Publication date: April 17, 2025
    Inventors: Xiaoying LI, Zhixiao YAO, Weitao CHEN, Yu MA, Yan YAN, Xiaopeng CUI, Xiaoyi ZHENG, Xiao WANG, Zhiqiang MA, Bo LI
  • Publication number: 20240272489
    Abstract: A display panel and a display device are provided, and relate to the field of displaying. The display panel includes a display area and a peripheral area located at a periphery of the display area. The peripheral area includes a package region and an UDC region located between the display area and the package region. The display panel further includes a transition area surrounding the UDC region, and an opposite substrate and an array substrate arranged opposite to each other. In the UDC region, the opposite substrate and the array substrate are both light-transmissible areas; in the transition area, at least one spacer ring surrounding the UDC region is arranged on the opposite substrate, and each spacer ring includes a plurality of spacers that are spaced apart from each other. The technical solutions of the present disclosure can implement UDCs for the medium-sized display product and the large-sized display product.
    Type: Application
    Filed: April 26, 2022
    Publication date: August 15, 2024
    Applicants: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE Technology Group Co., Ltd.
    Inventors: Jiliang Zhang, Zhiqiang Ma, Xiaona Liu, Zhitao Li, Yu Ma, Weitao Chen
  • Publication number: 20240210766
    Abstract: An array substrate includes: a base substrate, a light shielding layer on a first surface of the base substrate, and a plurality of pixel units and a first common electrode bus on a second surface of the base substrate. The base substrate includes a display region, first and second peripheral regions. Orthographic projections of the pixel units on the base substrate are arranged in an array in the display region. At least part of an orthographic projection of the light shielding layer and at least part of an orthographic projection of the first common electrode bus on the base substrate are in the second peripheral region, and the first common electrode bus is electrically connected to the common electrode included in at least one pixel unit. A distribution density of the first common electrode bus in the first peripheral region is smaller than that in the second peripheral region.
    Type: Application
    Filed: November 29, 2022
    Publication date: June 27, 2024
    Inventors: Tingting Wang, Xu Wang, Qi Wang, Yan Yan, Yu Ma, Xiaofeng Yin, Zhiqiang Ma, Tao Gong, Haoyan Ren
  • Patent number: 11922469
    Abstract: A framework for an automated news recommendation system for financial analysis. The system includes the automated ingestion, relevancy, clustering, and ranking of news events for financial analysts in the capital markets. The framework is adaptable to any form of input news data and can seamlessly integrate with other data used for analysis like financial data.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: March 5, 2024
    Assignee: S&P Global Inc.
    Inventors: Lisa Kim, Zhiqiang Ma, Grace Bang, Chong Wang, Himani Singh, Russell Kociuba, Steven Pomerville, Xiaomo Liu
  • Patent number: 11876102
    Abstract: The present disclosure provides a display substrate, a display panel and a display apparatus, belonging to the field of display technology. The display substrate includes a base, a plurality of common electrodes and a plurality of common electrode lines, the common electrodes are distributed on the base in an array, the common electrode lines extend along a row direction, and each common electrode line is connected to a corresponding row of common electrodes. The common electrode line is connected to the common electrode through a conductive connection portion, and the conductive connection portion includes conductive structures stacked on top of one another in a plurality of layers. The display substrate can reduce the resistance between the common electrode and the common electrode line, thereby reducing the voltage difference between the common electrodes in the display substrate and improving the uniformity of the common voltage therein.
    Type: Grant
    Filed: January 19, 2023
    Date of Patent: January 16, 2024
    Assignees: Beijing BOE Display Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xue Wang, Xiao Wang, Yan Yan, Tingting Wang, Yaya Qi, Xiaoying Li, Zhiqiang Ma
  • Publication number: 20240015939
    Abstract: The present disclosure provides a display substrate, including: a display area and a bonding area positioned on a side of the display area, the bonding area includes a plurality of bonding sub-areas arranged at intervals, the bonding sub-areas are arranged along a direction in which an edge of the display area extends and configured for bonding a chip-on-film, where a first antistatic layer is further arranged on the bonding area, at least a part of the first antistatic layer is positioned between adjacent ones of the bonding sub-areas, and the first antistatic layer is electrically coupled to a reference signal terminal. The present disclosure further provides a display device.
    Type: Application
    Filed: September 25, 2023
    Publication date: January 11, 2024
    Inventors: Yaya QI, Dianzheng DONG, Yan YAN, Xiao WANG, Xue WANG, Tingting WANG, Xiaoying LI, Zhiqiang MA
  • Patent number: 11862060
    Abstract: A shift register, a gate drive circuit and a display device. During forward scanning, the first input circuit supplies a signal of a first reference signal terminal to a first node in response to a signal of a first input signal terminal at an input phase, and the second input circuit supplies a signal of a second reference signal terminal to the first node in response to a signal of a second input signal terminal at a reset phase; and during reverse scanning, the second input circuit supplies the signal of the second reference signal terminal to the first node in response to the signal of the second input signal terminal at the input phase, and the first input circuit supplies the signal of the first reference signal terminal to the first node in response to the signal of the first input signal terminal at the reset phase.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: January 2, 2024
    Assignees: Beijing BOE Display Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Yan Yan, Xu Wang, Weitao Chen, Yu Ma, Zhiqiang Ma, Shunsha Lu
  • Patent number: 11805630
    Abstract: The present disclosure provides a display substrate, including: a display area and a bonding area positioned on a side of the display area, the bonding area includes a plurality of bonding sub-areas arranged at intervals, the bonding sub-areas are arranged along a direction in which an edge of the display area extends and configured for bonding a chip-on-film, where a first antistatic layer is further arranged on the bonding area, at least a part of the first antistatic layer is positioned between adjacent ones of the bonding sub-areas, and the first antistatic layer is electrically coupled to a reference signal terminal. The present disclosure further provides a display device.
    Type: Grant
    Filed: February 7, 2021
    Date of Patent: October 31, 2023
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yaya Qi, Dianzheng Dong, Yan Yan, Xiao Wang, Xue Wang, Tingting Wang, Xiaoying Li, Zhiqiang Ma
  • Publication number: 20230325852
    Abstract: A method and a system for automating a due diligence process are provided. The method includes: receiving identification information that relates to a customer; selecting, from a global set of due diligence questions based on the received identification information, a group of due diligence questions to be applied to the customer; determining a document source via which documents containing relevant information about the customer are accessible; retrieving, from the document source, a set of documents that relate to the potential customer; extracting, from the retrieved documents, information that is relevant to the selected group of due diligence questions with respect to the customer; and outputting the extracted information. Each of the determination of the document source, the retrieval of the set of documents, and the extraction of the relevant information is performed automatically by executing artificial intelligence algorithms that implement machine learning techniques.
    Type: Application
    Filed: April 7, 2022
    Publication date: October 12, 2023
    Applicant: JPMorgan Chase Bank, N.A.
    Inventors: Zhiqiang MA, Nacho NAVARRO, Charese SMILEY, Natraj RAMAN, Petr BABKIN, William WATSON, Elham Ghazizadeh AHSAEI, Suchetha SIDDAGANGAPPA, Russell KOCIUBA, Steven POMERVILLE, Robert D. MARTIN, Lawrence YONG, Andrea STEFANUCCI, Armineh NOURBAKHSH, Sameena SHAH
  • Publication number: 20230251918
    Abstract: The present invention relates to a system (100) and method with a fast distributed data processing engine (105) for fast and scalable data-intensive computation comprising a data model (110) defining an addressable collection of a message space, addressing a message space constellation (115) and the message space with one or more coordinates, updating the message space and the program state with the message following a consistency model, defining an attribute for an area within the message space and running a task in the message space constellation (115). In particular, each task accesses a part of the message space in a subset of the message space constellation (115).
    Type: Application
    Filed: February 10, 2022
    Publication date: August 10, 2023
    Inventors: Lin Gu, Zhiqiang Ma
  • Publication number: 20230245609
    Abstract: A shift register, a gate drive circuit and a display device. During forward scanning, the first input circuit supplies a signal of a first reference signal terminal to a first node in response to a signal of a first input signal terminal at an input phase, and the second input circuit supplies a signal of a second reference signal terminal to the first node in response to a signal of a second input signal terminal at a reset phase; and during reverse scanning, the second input circuit supplies the signal of the second reference signal terminal to the first node in response to the signal of the second input signal terminal at the input phase, and the first input circuit supplies the signal of the first reference signal terminal to the first node in response to the signal of the first input signal terminal at the reset phase.
    Type: Application
    Filed: March 18, 2021
    Publication date: August 3, 2023
    Inventors: Yan YAN, Xu WANG, Weitao CHEN, Yu MA, Zhiqiang MA, Shunsha LU
  • Patent number: 11699709
    Abstract: The present disclosure provides an array substrate, a display panel, and a display device. The array substrate includes: a substrate; and a first conductive structure, an interlayer insulation layer, and a second conductive structure sequentially disposed on the substrate. The first conductive structure has a first connection portion, the second conductive structure has a second connection portion, and the first connection portion is electrically coupled to the second connection portion through a via penetrating through the interlayer insulation layer. At least one of the first connection portion and the second connection portion is provided with an opening, and an orthographic projection of the opening on the substrate does not overlap an orthographic projection of the via on the substrate.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: July 11, 2023
    Assignees: Beijing BOE Display Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhiqiang Ma, Tingting Wang
  • Patent number: 11694041
    Abstract: A discourse-level text translation method and device, the method comprising: acquiring a text to be translated, the text to be translated being a unit text in a discourse-level text to be translated (S101); acquiring an associated text of the text to be translated, the associated text including at least one of a preceding source text, a following source text, and a preceding target text (S102); and translating, according to the associated text, the text to be translated (S103).
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: July 4, 2023
    Assignee: IFLYTEK CO., LTD.
    Inventors: Zhiqiang Ma, Junhua Liu, Si Wei, Guoping Hu
  • Publication number: 20230190768
    Abstract: A combination comprising a tricycle compound and use thereof in the preparation of a medicament for treating HBV. The combination is a combination of a compound of formula (I) or a pharmaceutically acceptable salt thereof and any one drug in the following groups a-c: a. a hepatitis B surface antigen inhibitor, b. a reverse transcriptase inhibitor, and c. a hepatitis B surface antigen inhibitor and a reverse transcriptase inhibitor.
    Type: Application
    Filed: May 14, 2021
    Publication date: June 22, 2023
    Inventors: Wenqiang WU, Dong ZHANG, Zhiqiang MA, Yixin ZHOU, John MAO, Zhigan JIANG, Jing WANG, Haiying HE
  • Publication number: 20230172537
    Abstract: A vascular graft includes a flexible substrate that can assume an unrolled configuration, in which the substrate extends along a main extension plane, and a rolled-up configuration, in which a first side of the substrate is facing radially inward and a second sideof the substrate is facing radially outward. At least one pressure sensing device is arranged on the first side of the substrate and includes a first electrode, a second electrode, and a piezoelectric element arranged between the two electrodes. At least one velocity sensing device is arranged on the first side of the substrate and a first electrode, a second electrode, and a piezoelectric element arranged between the electrodes. The graft can be used in a vascular graft system.
    Type: Application
    Filed: December 3, 2021
    Publication date: June 8, 2023
    Inventors: Bee Luan KHOO, Zhiqiang MA
  • Publication number: 20230154935
    Abstract: The present disclosure provides a display substrate, a display panel and a display apparatus, belonging to the field of display technology. The display substrate includes a base, a plurality of common electrodes and a plurality of common electrode lines, the common electrodes are distributed on the base in an array, the common electrode lines extend along a row direction, and each common electrode line is connected to a corresponding row of common electrodes. The common electrode line is connected to the common electrode through a conductive connection portion, and the conductive connection portion includes conductive structures stacked on top of one another in a plurality of layers. The display substrate can reduce the resistance between the common electrode and the common electrode line, thereby reducing the voltage difference between the common electrodes in the display substrate and improving the uniformity of the common voltage therein.
    Type: Application
    Filed: January 19, 2023
    Publication date: May 18, 2023
    Inventors: Xue WANG, Xiao WANG, Yan YAN, Tingting WANG, Yaya QI, Xiaoying LI, Zhiqiang MA
  • Patent number: 11586088
    Abstract: The present disclosure provides a display substrate, a display panel and a display apparatus, belonging to the field of display technology. The display substrate includes a base, a plurality of common electrodes and a plurality of common electrode lines, the common electrodes are distributed on the base in an array, the common electrode lines extend along a row direction, and each common electrode line is connected to a corresponding row of common electrodes. The common electrode line is connected to the common electrode through a conductive connection portion, and the conductive connection portion includes conductive structures stacked on top of one another in a plurality of layers. The display substrate can reduce the resistance between the common electrode and the common electrode line, thereby reducing the voltage difference between the common electrodes in the display substrate and improving the uniformity of the common voltage therein.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: February 21, 2023
    Assignees: Beijing BOE Display Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xue Wang, Xiao Wang, Yan Yan, Tingting Wang, Yaya Qi, Xiaoying Li, Zhiqiang Ma
  • Patent number: 11570005
    Abstract: The present disclosure provides systems, methods, and computer-readable storage media having functionality to prove immutability of blockchains without accessing user data. A user may submit data for storage to a data management server and the data management server may generate one or more data records corresponding to the data at a database and one or more blocks at a blockchain, each block corresponding to of the data records. Block information associated with the generated blocks may be transmitted to a remote computing device for storage at a database. Prior to storing the block information, the remote computing device may sign the data using a private key or other cryptographic technique. To validate a block, raw block information may be retrieved from the blockchain and compared to the signed block information. If the signed block information matches the raw block information, the block may be determined to be valid (e.g., unchanged).
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: January 31, 2023
    Assignee: Eternal Paradise Limited
    Inventors: Ian Yuan Yuan Huang, Zhiqiang Ma