Patents by Inventor Zhiqiang Ma

Zhiqiang Ma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200201896
    Abstract: Predicting the impact of controversial events on an entity, such as a company, can indicate the entity's ability to operate successfully in the future and optimize long-term value. This specification describes systems and methods to detect controversial events, identify the context of an event, measure the scope of the event, measure its current impact on the entity's performance, and predict the event's future impact on the entity's performance.
    Type: Application
    Filed: December 21, 2018
    Publication date: June 25, 2020
    Inventors: Grace Bang, Xiaomo Lu, Zhiqiang MA, Azadeh Nematzadeh
  • Publication number: 20200202885
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for voice and graphical user interfaces. One of the methods includes receiving an audio input, analyzing the audio input to determine a requested task, determining response data in response to the requested task, determining at least a first part of the response data to be presented as an audio output and at least a second part of the response data to be presented as a visual output, forwarding the first part of the response data to an audio output for presentation to a user, forwarding the second part of the response data to a visual output for presentation to a user; and forwarding to at least one of the audio output and the visual output data describing sources and/or assumptions used to construct the response data.
    Type: Application
    Filed: December 21, 2018
    Publication date: June 25, 2020
    Inventors: Grace Bang, Azadeh Nematzadeh, Zhiqiang Ma, Xiaomo Liu
  • Patent number: 10540254
    Abstract: Technologies for analyzing persistent memory programs include a computing device having persistent memory. The computing device executes a persistent memory program that includes one or more store operations to the persistent memory. The computing device records persistent memory store events of the persistent memory program and constructs a load dependency graph of the persistent memory program. The persistent memory store events may include persistent memory stores, cache flush events, memory fence events, and persistent memory commit events. The computing device replays the persistent memory store events and analyzes the load dependency graph. The computing device may identify persistency programming errors in the persistent memory program. The computing device may identify persistent memory commit points of the persistent memory program. The computing device may identify groups of persistent memory store operations to persist atomically. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: January 21, 2020
    Assignee: Intel Corporation
    Inventors: Zhiqiang Ma, Paul M. Petersen
  • Patent number: 10475741
    Abstract: The present embodiments provides a chip, including a carrier, a redistribution structure, and multiple packaging function modules, where the multiple packaging function modules each have at least a part wrapped by a colloid, and are fastened to the redistribution structure side by side; the redistribution structure is fastened to the carrier, and the redistribution structure includes one or more redistribution metal layers; the redistribution metal layer communicatively connects the multiple packaging function modules and the carrier. The redistribution structure further includes one or more interconnect metal layers, and the interconnect metal layer is communicatively connected to at least two packaging function modules so as to provide a signal path between the at least two packaging function modules. In the chip, two packaging function modules are placed on the carrier side by side, and a signal path is established between the two packaging function modules by using the redistribution structure.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: November 12, 2019
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: HuiLi Fu, Xiaodong Zhang, Jyh Rong Lin, Zhiqiang Ma
  • Patent number: 10118175
    Abstract: In accordance with one embodiment, a method for automatically coordinating droplets, beads, nanostructures, and/or biological objects for optically controlled microfluidic systems, comprising using light to move one or a plurality of droplets or the like simultaneously, applying an algorithm to coordinate droplet and/or other motions and avoid undesired droplet and/or other collisions, and moving droplets and/or others to a layout of droplets and/or others. In another embodiment, a system for automatically coordinating droplets and/or others for optically controlled microfluidic systems, comprising using a light source to move one or a plurality of droplets and/or others simultaneously, using an algorithm to coordinate droplet and/or other motions and avoid undesired droplet and/or other collisions, and using a microfluidic device to move droplets and/or others to a layout of droplets and/or others.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: November 6, 2018
    Inventors: Srinivas Akella, Zhiqiang Ma
  • Publication number: 20180280979
    Abstract: In accordance with one embodiment, a method for automatically coordinating droplets, beads, nanostructures, and/or biological objects for optically controlled microfluidic systems, comprising using light to move one or a plurality of droplets or the like simultaneously, applying an algorithm to coordinate droplet and/or other motions and avoid undesired droplet and/or other collisions, and moving droplets and/or others to a layout of droplets and/or others. In another embodiment, a system for automatically coordinating droplets and/or others for optically controlled microfluidic systems, comprising using a light source to move one or a plurality of droplets and/or others simultaneously, using an algorithm to coordinate droplet and/or other motions and avoid undesired droplet and/or other collisions, and using a microfluidic device to move droplets and/or others to a layout of droplets and/or others.
    Type: Application
    Filed: October 6, 2017
    Publication date: October 4, 2018
    Inventors: Srinivas Akella, Zhiqiang Ma
  • Patent number: 10089696
    Abstract: Embodiments of techniques and systems for slowdown-budget-aware event information collection are described. In various embodiments, a system may be configured to control collection of information for events associated with execution of a program during execution of the program based on a slowdown cost budget. In various embodiments, the slowdown cost budget may be set in order to help keep slowdown experienced due to associated event information collection within a range around the budget. In embodiments, this may provide a user with greater control over the effects of the associated event information collection and instrumentation than would be available due to simple sampling rate control. Other embodiments may be described and claimed.
    Type: Grant
    Filed: May 9, 2012
    Date of Patent: October 2, 2018
    Assignee: Intel Corporation
    Inventors: Zhiqiang Ma, Paul M. Petersen
  • Patent number: 10019341
    Abstract: Systems and methods may provide for conducting an object trace of an allocation status of one or more objects in a computing system and using one or more hardware performance counters to conduct a hardware based address profiling of the computing system. Additionally, one or more stale objects in the system may be automatically identified based on the object trace and the hardware based address profiling. In one example, the object trace is initiated prior to a start of a task on the computing system and the hardware based address profiling is initiated in response to an end of the task on the computing system.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: July 10, 2018
    Assignee: Intel Corporation
    Inventor: Zhiqiang Ma
  • Patent number: 9996401
    Abstract: A task processing method and virtual machine are disclosed. The method includes selecting an idle resource for a task; creating a global variable snapshot for a global variable; executing the task, in private memory space in the selected idle resource; after the execution of the task is complete, acquiring a new global variable snapshot corresponding to the global variable, and acquiring an updated global variable according to a local global variable snapshot and the new global variable snapshot; and determining whether a synchronization variable of a to-be-executed task in a task synchronization waiting queue includes the current updated global variable, and if the synchronization variable of the to-be-executed task in the task synchronization waiting queue includes the current updated global variable, putting the task into a task execution waiting queue.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: June 12, 2018
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Lin Gu, Zhiqiang Ma, Zhonghua Sheng, Liufei Wen
  • Publication number: 20180157526
    Abstract: A quasi-automatic method is provided to parallelize user programs with little or no changes in their original design, implementation or compiled binary code. The users issues a simple indication to inform a runtime system about the intent to run the programs in a parallel or distributed manner, and the runtime system executes a plurality of programs based on the original program to conduct the same computation with parallelization. The semantics of the original program is reused, and task instances are created based on the semantics and executed in parallel or distributedly. The method provides an easy yet reliable method for accelerating computation by distributing the original program processes on multiple computers. Through a semantics-aware I/O control and coordination, the runtime system improves the consistency between the logical result data generated by the parallel computation and the expected result data from the original program should it be executed on one computer.
    Type: Application
    Filed: January 31, 2017
    Publication date: June 7, 2018
    Inventors: Lin Gu, Zhiqiang Ma, Xinjie Yu, Zhaohua Li
  • Publication number: 20180025973
    Abstract: The present embodiments provides a chip, including a carrier, a redistribution structure, and multiple packaging function modules, where the multiple packaging function modules each have at least a part wrapped by a colloid, and are fastened to the redistribution structure side by side; the redistribution structure is fastened to the carrier, and the redistribution structure includes one or more redistribution metal layers; the redistribution metal layer communicatively connects the multiple packaging function modules and the carrier. The redistribution structure further includes one or more interconnect metal layers, and the interconnect metal layer is communicatively connected to at least two packaging function modules so as to provide a signal path between the at least two packaging function modules. In the chip, two packaging function modules are placed on the carrier side by side, and a signal path is established between the two packaging function modules by using the redistribution structure.
    Type: Application
    Filed: September 26, 2017
    Publication date: January 25, 2018
    Inventors: HuiLi Fu, Xiaodong Zhang, Jyh Rong Lin, Zhiqiang Ma
  • Patent number: 9782775
    Abstract: In accordance with one embodiment, a method for automatically coordinating droplets for optically controlled microfluidic systems, comprising using light to move one or a plurality of droplets simultaneously, applying an algorithm to coordinate droplet motions and avoid droplet collisions, and moving droplets to a layout of droplets. In another embodiment, a system for automatically coordinating droplets for optically controlled microfluidic systems, comprising using a light source to move one or a plurality of droplets simultaneously, using an algorithm to coordinate droplet motions and avoid droplet collisions, and using a microfluidic device to move droplets to a layout of droplets.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: October 10, 2017
    Inventors: Srinivas Akella, Zhiqiang Ma
  • Publication number: 20170152200
    Abstract: A method for converting lignin to a phenol product, the method comprising contacting a zeolite catalyst with a lignin under reaction conditions sufficient to produce the phenol product at a yield of equal to or greater than about 50%. A method for converting lignin to a mixed phenol product, the method comprising contacting a large-pore zeolite catalyst with a Kraft lignin under reaction conditions comprising a reaction temperature of from about 550° C. to about 850° C. to produce the mixed phenol product at a yield of equal to or greater than about 50%.
    Type: Application
    Filed: October 25, 2016
    Publication date: June 1, 2017
    Inventors: Zhiqiang MA, Ashim Kumar GHOSH, Jeroen VAN BOKHOVEN
  • Publication number: 20170132094
    Abstract: Technologies for analyzing persistent memory programs include a computing device having persistent memory. The computing device executes a persistent memory program that includes one or more store operations to the persistent memory. The computing device records persistent memory store events of the persistent memory program and constructs a load dependency graph of the persistent memory program. The persistent memory store events may include persistent memory stores, cache flush events, memory fence events, and persistent memory commit events. The computing device replays the persistent memory store events and analyzes the load dependency graph. The computing device may identify persistency programming errors in the persistent memory program. The computing device may identify persistent memory commit points of the persistent memory program. The computing device may identify groups of persistent memory store operations to persist atomically. Other embodiments are described and claimed.
    Type: Application
    Filed: March 29, 2016
    Publication date: May 11, 2017
    Inventors: Zhiqiang Ma, Paul M. Petersen
  • Patent number: 9489246
    Abstract: A method and device for determining parallelism of tasks of a program comprises generating a task data structure to track the tasks and assigning a node of the task data structure to each executing task. Each node includes a task identification number and a wait number. The task identification number uniquely identifies the corresponding task from other currently executing tasks and the wait number corresponds to the task identification number of a node corresponding to the last descendant task of the corresponding task that was executed prior to a wait command. The parallelism of the tasks is determined by comparing the relationship between the tasks.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: November 8, 2016
    Assignee: Intel Corporation
    Inventors: Jeffrey V. Olivier, Zhiqiang Ma, Paul M Petersen
  • Publication number: 20160092341
    Abstract: Systems and methods may provide for conducting an object trace of an allocation status of one or more objects in a computing system and using one or more hardware performance counters to conduct a hardware based address profiling of the computing system. Additionally, one or more stale objects in the system may be automatically identified based on the object trace and the hardware based address profiling. In one example, the object trace is initiated prior to a start of a task on the computing system and the hardware based address profiling is initiated in response to an end of the task on the computing system.
    Type: Application
    Filed: September 25, 2014
    Publication date: March 31, 2016
    Inventor: ZHIQIANG MA
  • Patent number: 9235497
    Abstract: The existence of errors and bugs in device drivers and other software operating in kernel space may be difficult to find and eliminate. A system and method for debugging computer programs may involve the use of several different modules. Running in the kernel space is an event monitor. Running in the user space is an event collector, an event player, and a concurrency error detector. This setup allows one to debug device driver software and other software that executes in kernel space using existing user space error detectors.
    Type: Grant
    Filed: March 27, 2013
    Date of Patent: January 12, 2016
    Assignee: Intel Corporation
    Inventor: Zhiqiang Ma
  • Patent number: 9201691
    Abstract: A task coordination apparatus in a computing system having a distributed shared memory (DSM) coordinates the execution of two related tasks, wherein the second task has an execution variable which is modified by the first task. The task coordination apparatus creates a snapshot of a memory space in the distributed shared memory assigned to the first task and a cooperation watching area of the second task. The cooperation watching area contains a memory address pointing to a location where the execution variable of the second task is stored in the memory space assigned to the first task. The first task is allocated to a first computing node for execution, and the memory space assigned to it is updated according to the execution result. After updating the memory space, the second task is allocated to a second computing node for execution using the execution variable updated by the first task.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: December 1, 2015
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Lin Gu, Zhiqiang Ma, Yulong Zeng
  • Publication number: 20150277993
    Abstract: A task processing method and virtual machine are disclosed. The method includes selecting an idle resource for a task; creating a global variable snapshot for a global variable; executing the task, in private memory space in the selected idle resource; after the execution of the task is complete, acquiring a new global variable snapshot corresponding to the global variable, and acquiring an updated global variable according to a local global variable snapshot and the new global variable snapshot; and determining whether a synchronization variable of a to-be-executed task in a task synchronization waiting queue includes the current updated global variable, and if the synchronization variable of the to-be-executed task in the task synchronization waiting queue includes the current updated global variable, putting the task into a task execution waiting queue.
    Type: Application
    Filed: June 12, 2015
    Publication date: October 1, 2015
    Inventors: Lin Gu, Zhiqiang Ma, Zhonghua Sheng, Liufei Wen
  • Patent number: 9081628
    Abstract: In one embodiment, a method includes maintaining thread analysis metadata for a multi-threaded application. The metadata may include a thread vector clock for threads of the application and a synchronization vector clock for synchronization objects of the application. In addition, an initialization log and an access log can be generated and maintained for memory accesses occurring during execution of the application. From this metadata, it may be determined if an access to a memory element by a thread is a potential invalid access for a different scheduling of the application. Other embodiments are described and claimed.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: July 14, 2015
    Assignee: Intel Corporation
    Inventor: Zhiqiang Ma