Patents by Inventor Zhiyi Yu

Zhiyi Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5945718
    Abstract: A self-aligned enhancement mode metal-oxide-compound semiconductor FET (10) includes a stoichiometric Ga.sub.2 O.sub.3 gate oxide layer (14) positioned on upper surface (16) of a compound semiconductor wafer structure (13). The stoichiometric Ga.sub.2 O.sub.3 layer forms an atomically abrupt interface with the compound semiconductor wafer structure. A refractory metal gate electrode (17) is positioned on upper surface (18) of the stoichiometric Ga.sub.2 O.sub.3 gate oxide layer (14). The refractory metal is stable on the stoichiometric Ga.sub.2 O.sub.3 gate oxide layer at elevated temperature. Self-aligned source and drain areas, and source and drain contacts (19, 20) are positioned on the source and drain areas (21, 22).
    Type: Grant
    Filed: February 12, 1998
    Date of Patent: August 31, 1999
    Assignee: Motorola Inc.
    Inventors: Matthias Passlack, Jonathan Kwadwo Abrokwah, Zhiyi Yu