Patents by Inventor Zhiyong Ma

Zhiyong Ma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6740427
    Abstract: The invention relates to a ball limiting metallurgy stack for an electrical device that contains a tin diffusion barrier and thermo-mechanical buffer layer disposed upon a refractory metal first layer. The multi-diffusion barrier layer stack resists tin migration toward the upper metallization of the device.
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: May 25, 2004
    Assignee: Intel Corporation
    Inventors: Madhav Datta, Dave Emory, Tzeun-luh Huang, Subhash M. Joshi, Christine A. King, Zhiyong Ma, Thomas Marieb, Michael Mckeag, Doowon Suh, Simon Yang
  • Publication number: 20040060970
    Abstract: The present invention describes a method including providing a component, the component having a bond pad; forming a passivation layer over the component; forming a via in the passivation layer to uncover the bond pad; and forming an under bump metallurgy (UBM) over the passivation layer, in the via, and over the bond pad, in which the UBM includes an alloy of Aluminum and Magnesium.
    Type: Application
    Filed: June 26, 2003
    Publication date: April 1, 2004
    Inventors: Peter K. Moon, Zhiyong Ma, Madhav Datta
  • Patent number: 6703069
    Abstract: The present invention describes a method including providing a component, the component having a bond pad; forming a passivation layer over the component; forming a via in the passivation layer to uncover the bond pad; and forming an under bump metallurgy (UBM) over the passivation layer, in the via, and over the bond pad, in which the UBM includes an alloy of Aluminum and Magnesium. The present invention also describes an under bump metallurgy (UBM) that includes a lower layer, the lower layer including an alloy of Aluminum and Magnesium; and an upper layer located over the lower layer.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: March 9, 2004
    Assignee: Intel Corporation
    Inventors: Peter K. Moon, Zhiyong Ma, Madhav Datta
  • Publication number: 20030059644
    Abstract: The invention relates to a ball limiting metallurgy stack for an electrical device that contains a tin diffusion barrier and thermo-mechanical buffer layer disposed upon a refractory metal first layer. The multi-diffusion barrier layer stack resists tin migration toward the upper metallization of the device.
    Type: Application
    Filed: September 21, 2001
    Publication date: March 27, 2003
    Applicant: Intel Corporation
    Inventors: Madhav Datta, Dave Emory, Tzeun-luh Huang, Subhash M. Joshi, Christine A. King, Zhiyong Ma, Thomas Marieb, Michael Mckeag, Doowon Suh, Simon Yang