Abstract: A storage device includes a first semiconducting layer having a p-dopant and a second semiconducting layer having an n-dopant, disposed on the first semiconducting layer forming a junction between the first and the second semiconducting layers. The storage device also includes a charge trapping structure disposed on the second semiconducting layer and a conductive gate, wherein the conductive gate and the charge trapping structure move relative to the other, wherein an electric field applied across the second semiconducting layer and the conductive gate traps charge in the charge trapping structure.

Abstract: A method of manufacturing a getter structure, including forming a support structure having a support perimeter, where the support structure is disposed over a substrate. In addition, the method includes forming a non-evaporable getter layer having an exposed surface area, where the non-evaporable getter layer is disposed over the support structure, and includes forming a vacuum gap between the substrate and the non-evaporable getter layer. The non-evaporable getter layer extends beyond the support perimeter of the support structure increasing the exposed surface area.

Abstract: A method of singulating electronic devices, including aligning a saw blade over a lid street disposed on a lid substrate that is disposed over a device substrate. An electronic device that includes a bond pad is disposed on the device substrate, wherein the lid street is disposed over the bond pad. In addition, the method also includes sawing partially through the lid street to form a trench in the lid street. The trench includes a trench bottom in the lid substrate.

Abstract: This invention relates to a semiconductor having protruding contacts comprising, a first semiconductor substrate having at least one interconnect located substantially within the first substrate, and a second semiconductor substrate having at least one protruding contact point that substantially contacts at least one interconnect.

Abstract: An electrical memory component is provided, comprising read/write probes and a chalcogenide storage media. Each read/write probe is adapted for selective electrical connection to a memory portion of the chalcogenide storage media and for performing read and write operations upon the memory portion. The chalcogenide storage media has a second plurality of memory portions, and is movably mounted relative to the first plurality of read/write probes for selective electrical connection of the read/write probes to a subset of the memory portions.

Abstract: A semiconductor storage device including a tip electrode, a media electrode and a storage media. The storage media has a storage area configurable to be in one of a plurality of structural states to represent information stored at the storage area, by passing a current through the storage area between the tip electrode and media electrode.

Abstract: This disclosure relates to systems and methods for reducing feature sizes. One of these methods enables formation of an original feature having a size in a length or width dimension of between about 100 and about 1000 nanometers with a system capable of patterning features to a minimum size of less than or about the size of the original feature and reduction of the size of the original feature below that of the minimum size of the system using an alignment-independent technique.

Abstract: A method of manufacturing a getter structure, including forming a support structure having a support perimeter, where the support structure is disposed over a substrate. In addition, the method includes forming a non-evaporable getter layer having an exposed surface area, where the non-evaporable getter layer is disposed over the support structure, and includes forming a vacuum gap between the substrate and the non-evaporable getter layer. The non-evaporable getter layer extends beyond the support perimeter of the support structure increasing the exposed surface area.

Abstract: A storage device includes a first semiconducting layer having a p-dopant and a second semiconducting layer having an n-dopant, disposed on the first semiconducting layer forming a junction between the first and the second semiconducting layers. The storage device also includes a charge trapping structure disposed on the second semiconducting layer and a conductive gate, wherein the conductive gate and the charge trapping structure move relative to the other, wherein an electric field applied across the second semiconducting layer and the conductive gate traps charge in the charge trapping structure.

Abstract: A semiconductor storage device including a tip electrode, a media electrode and a storage media. The storage media has a storage area configurable to be in one of a plurality of structural states to represent information stored at the storage area, by passing a current through the storage area between the tip electrode and media electrode.

Abstract: An emitter includes an electron supply and a tunneling layer disposed on the electron supply. A cathode layer is disposed on the tunneling layer. A conductive electrode has multiple layers of conductive material. The multiple layers include a protective layer disposed on the cathode layer. The conductive electrode has been etched to define an opening thereby exposing a portion of the cathode layer.

Abstract: An emitter has an electron supply and a porous cathode layer having nanohole openings. The emitter also has a tunneling layer disposed between the electron supply and the cathode layer.

Abstract: A light device includes an electron supply defining an emitter surface. A dielectric tunneling layer is disposed between the electron supply and a cathode layer. The cathode layer has at least partial photon transparency that is substantially uniform across the emitter surface.

Abstract: An emitter has an electron supply layer and a silicon-based dielectric layer formed on the electron supply layer. The silicon-based dielectric layer is preferably less than about 500 Angstroms. Optionally, an insulator layer is formed on the electron supply layer and has openings defined within which the silicon-based dielectric layer is formed. A cathode layer is formed on the silicon-based dielectric layer to provide a surface for energy emissions of electrons and/or photons. Preferably, the emitter is subjected to an annealing process thereby increasing the supply of electrons tunneled from the electron supply layer to the cathode layer.

Abstract: An emitter has an electron supply and a porous cathode layer having nanohole openings. The emitter also has a tunneling layer disposed between the electron supply and the cathode layer.

Abstract: A storage device includes a first semiconducting layer having a p-dopant and a second semiconducting layer having an n-dopant, disposed on the first semiconducting layer forming a junction between the first and the second semiconducting layers. The storage device also includes a charge trapping structure disposed on the second semiconducting layer and a conductive gate, wherein the conductive gate and the charge trapping structure move relative to the other, wherein an electric field applied across the second semiconducting layer and the conductive gate traps charge in the charge trapping structure.

Abstract: A light device includes an electron supply defining an emitter surface. A dielectric tunneling layer is disposed between the electron supply and a cathode layer. The cathode layer has at least partial photon transparency that is substantially uniform across the emitter surface.

Abstract: A method for emitting electrons includes the steps of applying a voltage to an electron source to cause hot electrons to be generated with the source, and applying an electric field to cause at least a portion of the hot electrons to be emitted from the electron source.

Abstract: A method for creating an electron lens includes the steps of applying a polymer layer on an emitter surface of an electron emitter and then curing the polymer layer to reduce volatile content.

Abstract: A light modulator has one or more gratings and one or more MEMS actuators operable to move the gratings for selectively modulating light from an input light source. Certain embodiments have a plurality of blazed gratings arranged parallel to a plane and movable linearly parallel to the plane by MEMS actuators. Each of the gratings is individually blazed for light of a selected color such as red, green or blue. Associated with the gratings may be portions providing black and/or white outputs. An aperture spaced apart from the plane allows color(s) selected from an input white-light source to be directed to an output. An array of MEMS-actuated modulation devices provides a color spatial light modulator. Other embodiments have a grating adapted to be tilted by a MEMS actuator, either continuously through a range of angles or to a selected angle of a set of predetermined discrete angles, to direct selected wavelengths diffracted by the grating toward collection optics for a modulated light output.