Patents by Inventor Zhongli He

Zhongli He has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080240252
    Abstract: A method of simplifying deblock filtering of video blocks of an enhanced layer of scalable video information is disclosed which includes selecting an adjacent pair of video blocks, determining whether boundary strength of the video blocks is a first value, evaluating first conditions using component values of a first component line if the boundary strength is not the first value, and bypassing deblock filtering between the video blocks if the boundary strength is the first value or if any of the first conditions is false. The method may include bypassing evaluating conditions and deblock filtering associated with the maximum boundary strength. The method may include bypassing evaluating second conditions and bypassing corresponding deblock filtering if the intermediate edge is a horizontal edge. The method may include bypassing less efficient memory reads associated with component values used for evaluating the second conditions.
    Type: Application
    Filed: March 27, 2007
    Publication date: October 2, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventor: Zhongli He
  • Publication number: 20080137753
    Abstract: A method of generating a video sequence including setting a state of a deblocking control flag in a frame header of a frame to indicate that a deblocking parameter is presented for some but not all layers. A method of processing a received video sequence including determining a state of a deblocking control flag of a frame header and retrieving a deblocking parameter for some but not all layers. A scalable video system including a deblocking control circuit which sets a state of a deblocking control flag in a frame header to indicate that a deblocking parameter is presented for some but not all layers. A scalable video system including a deblocking control circuit which determines the state of a deblocking control flag in a frame header of a received video sequence and which retrieves a deblocking parameter for some but not all layers of the frame.
    Type: Application
    Filed: December 8, 2006
    Publication date: June 12, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventor: Zhongli He
  • Publication number: 20080137752
    Abstract: A method of adaptively disabling deblock filtering of video information including determining a content characteristic of the video information, and adaptively disabling deblock filtering of the video information based on the content characteristic. The content characteristic may be a content complexity, such as an average of minimum sums of absolute differences of pixel values determined during motion estimation, or the mean square error of the video information, or the number of bits used for coding the video content. The content characteristic may be other than complexity, such as motion vector information. A video information processing system including a video processing circuit which processes video information and which determines a content characteristic of the video information, and a deblocking filter circuit which adaptively disables deblock filtering of the video information based on the content characteristic.
    Type: Application
    Filed: December 8, 2006
    Publication date: June 12, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventor: Zhongli He
  • Publication number: 20080084491
    Abstract: A method of scaling complexity of a video processing system including determining a power saving factor based on an operating parameter and adjusting processing of video information based on the power saving factor to reduce computation complexity. The operating parameter may include available power and/or available processing capacity. A method of complexity scalability for a video processing system using prioritized layered coding including determining a power saving factor based on one or more metrics, such as power capacity and/or available processing capacity, and reducing processing complexity of multiple prioritized coding functions in a predetermined order of priority based on the level of the power saving factor. A video processing system including a power management circuit which determines the power saving factor and a video encoder system which correspondingly adjusts computation complexity.
    Type: Application
    Filed: October 6, 2006
    Publication date: April 10, 2008
    Applicant: FREESCALE SEMICONDUCTOR INC.
    Inventors: Zhongli He, Yong Yan
  • Publication number: 20080069469
    Abstract: A localized content adaptive filter system including a tile buffer having an output providing first image information, a frequency analyzer providing a frequency information signal based on frequency content of the first image information, and an adaptive filter which is adjusted based on the frequency information signal. The frequency analyzer may include a wavelet transform filter and a frequency content analyzer. The adaptive filter may include filter select logic which receives the frequency information signal and second image information associated with the first image information, and which provides filtered image information. The filter select logic determines a filter based on the frequency information signal and the determined filter filters the second image information to provide the filtered image information.
    Type: Application
    Filed: September 15, 2006
    Publication date: March 20, 2008
    Applicant: FREESCALE SEMICONDUCTOR INC.
    Inventors: Yong Yan, Zhongli He, Yolanda Prieto
  • Publication number: 20080069247
    Abstract: A video information processing system including a processing circuit and a deblocking filter. The processing circuit provides video information including a chroma component and a luma component. The deblocking filter has an input receiving the video information and an output providing filtered video information, and is configured to selectively disable chroma deblock filtering while luma deblock filtering is enabled. The processing circuit may include a video encoder or a video decoder. The processing circuit may further include control logic providing a control signal to disable chroma deblock filtering within either or both the encoder and decoder. The video encoder may incorporate control information in the output bitstream to control deblock filtering in the downstream decoder to maintain consistency between the encoder and the decoder.
    Type: Application
    Filed: September 15, 2006
    Publication date: March 20, 2008
    Applicant: FREESCALE SEMICONDUCTOR INC.
    Inventor: Zhongli He
  • Publication number: 20070291127
    Abstract: A motion stabilization system including a filter bank and motion stabilization logic. The filter bank receives a video signal and provides at least one high frequency sub-band signal which includes edge information of the video signal. The motion stabilization logic receives the high frequency sub-band signal, a reference image, and the video signal and provides a stabilized image. The reference image is generated from image stabilization information developed during motion processing. The motion stabilization system may include an edge detector which receives and binarizes the high frequency sub-band signal. Binarization significantly reduces the amount of information to be processes by the motion stabilization logic. The motion stabilization system may further include a tile buffer which stores a portion of the video signal and which provides a video signal portion to the filter bank. The filter bank may be implemented as a discrete wavelet transformation filter.
    Type: Application
    Filed: June 15, 2006
    Publication date: December 20, 2007
    Applicant: FREESCALE SEMICONDUCTOR INC.
    Inventors: Yolanda Prieto, Zhongli He
  • Publication number: 20070280349
    Abstract: A rate control system for a video encoder including rate control logic which determines a first QP corresponding to a selected encoding layer of multiple encoding layers, and scaling logic configured to scale the first QP to a second QP corresponding to any other encoding layer based on at least one encoding layer parameter. A template of stored QP values may be used to reduce computational complexity, such as a QP value for each frame interval or a QP value for each of multiple rate control interval complexity values. The QP values in the template may be predetermined or programmed and updated during periodic training sessions. Several encoding layer parameters are contemplated, such as any combination of bit rate, frame rate and frame resolution. The scaling logic may be configured to scale from any one encoding layer to another and vice-versa for bi-directional scaling.
    Type: Application
    Filed: May 30, 2006
    Publication date: December 6, 2007
    Applicant: FREESCALE SEMICONDUCTOR INC.
    Inventors: Yolanda Prieto, Zhongli He
  • Publication number: 20070274385
    Abstract: A system and method for on-the-fly detection of scene changes within a video stream through statistical analysis of a portion of the macroblocks comprising each video frame as they are processed using inter-frame coding. If the statistical analysis of the selected macroblocks of the current frame differs from the previous frame by exceeding predetermined thresholds, the current video frame is assumed to be a scene change. Once a scene change is detected, the remainder of the video frame is encoded as an intra-frame, intra-macroblocks, or intra slices, through implementation of one or more predetermined or adaptively adjusted quantization parameters to reduce computational complexity, decrease power consumption, and increase the resulting video image quality. As decoding is the inverse of encoding, these improvements are similarly recognized by a decoder as it decodes a resulting encoded video stream.
    Type: Application
    Filed: May 26, 2006
    Publication date: November 29, 2007
    Inventor: Zhongli He
  • Publication number: 20070263720
    Abstract: A method of adaptively adjusting a QP of a video encoder to control output bit rate including estimating the QP based on a complexity of a previous frame and encoding bit rate information of a current frame to provide an estimated QP, determining a threshold value based on a video quality factor, a target bit rate and a complexity of a previous interval of the current frame or the same interval of the previous frame, and if the estimated QP is greater than the threshold value, adaptively adjusting the estimated QP using the threshold value, the target bit rate and the complexity of the previous interval. The method may include adaptively limiting a change of the QP between frame intervals based on a difference between the QP and the threshold value. Complexity information may be based on an average of minimum SAD values.
    Type: Application
    Filed: May 12, 2006
    Publication date: November 15, 2007
    Applicant: Freescale Semiconductor Inc.
    Inventor: Zhongli He
  • Publication number: 20070201559
    Abstract: A video encoder including a processing block and an external memory storing a current frame and a reference frame. The processing block includes a memory interface, a local memory and a processor. The processor encodes the current frame in raster scan macroblock order for FMO using information from the reference frame, converts encoded information into compressed information, and organizes the compressed information according to a predetermined FMO. The processor organizes the compressed information according to any suitable FMO organization such as scattered, interleaved, etc. The processor stores the compressed information into multiple slice groups into the local memory or into the external memory, where the slice groups are organized according to the FMO. The processor loads a search window macroblock into the local memory if not already stored in the local memory. The processor may generate unfiltered reconstructed information and store the unfiltered reconstructed information into the local memory.
    Type: Application
    Filed: February 24, 2006
    Publication date: August 30, 2007
    Applicant: Freescale Semiconductor Inc.
    Inventor: Zhongli He
  • Publication number: 20040190625
    Abstract: A programmable video encoding accelerator having a substantially hardware-based transform coder that has at least a first video input and a second video input. In a preferred embodiment, the first video input is operably coupleable to an integral native difference computer and the second video input is operably coupleable to an external video feed that does not pass through the native difference computer.
    Type: Application
    Filed: March 13, 2003
    Publication date: September 30, 2004
    Applicant: Motorola, Inc.
    Inventors: Zhongli He, Chandrasekhar Lakshmanan, Kathy Moseler, Gopala Krishnan Srinivasan, Raghavan Subramaniyan
  • Publication number: 20040181503
    Abstract: Multi-dimensional information is stored as a plurality of predetermined shares of data, wherein at least some of the predetermined shares of data each comprises a plurality of data elements with each one of the plurality of data elements being associated with a different distinct memory bank. Data parsed and arrayed in this way can then be selectively recalled to readily and easily accommodate a variety of data processing needs without an attendant need for complex addressing schemes and the like.
    Type: Application
    Filed: March 13, 2003
    Publication date: September 16, 2004
    Applicant: Motorola, Inc.
    Inventors: Kathy Moseler, Zhongli He, Chandrasekhar Lakshmanan