Patents by Inventor Zigmund Ramirez Camacho

Zigmund Ramirez Camacho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7545032
    Abstract: An integrated circuit package system is provided including forming a mounting structure having an external interconnect, a paddle, and a tie bar; mounting an integrated circuit die on the paddle; soldering a stiffener structure; having an opening; on the mounting structure; connecting the stiffener structure to a ground; and molding the integrated circuit die and partially the stiffener structure through the opening.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: June 9, 2009
    Assignee: Stats Chippac Ltd.
    Inventors: Henry D. Bathan, Antonio B. Dimaano, Jr., Jeffrey D. Punzalan, Zigmund Ramirez Camacho
  • Publication number: 20090140394
    Abstract: A semiconductor wafer contains a plurality of semiconductor die. The semiconductor wafer is diced to separate the semiconductor die. The semiconductor die are transferred onto a carrier. A die extension region is formed around a periphery of the semiconductor die on the carrier. The carrier is removed. A plurality of through hole vias (THV) is formed in first and second offset rows in the die extension region. A conductive material is deposited in the THVs. A first RDL is formed between contact pads on the semiconductor die and the THVs. A second RDL is formed on a backside of the semiconductor die in electrical contact with the THVs. An under bump metallization is formed in electrical contact with the second RDL. Solder bumps are formed on the under bump metallization. The die extension region is singulated to separate the semiconductor die.
    Type: Application
    Filed: November 29, 2007
    Publication date: June 4, 2009
    Applicant: STATS ChipPAC, Ltd.
    Inventors: Henry Descalzo Bathan, Zigmund Ramirez Camacho, Lionel Chien Hui Tay, Arnel Senosa Trasporto
  • Patent number: 7541221
    Abstract: An integrated circuit package system including forming a leadframe having a lead with a leadfinger support of a predetermined height, and attaching an integrated circuit die with an electrical interconnect at a predetermined collapse height determined by the predetermined height of the leadfinger support.
    Type: Grant
    Filed: February 4, 2006
    Date of Patent: June 2, 2009
    Assignee: Stats Chippac Ltd.
    Inventors: Henry D. Bathan, Zigmund Ramirez Camacho, Arnel Trasporto, Jeffrey D. Punzalan
  • Publication number: 20090121335
    Abstract: An integrated circuit package system comprising: providing a substrate having a cavity; sealing a package over the cavity of the substrate; and forming an encapsulant over the package and a portion of the substrate substantially preventing the encapsulant from forming in the cavity.
    Type: Application
    Filed: November 12, 2007
    Publication date: May 14, 2009
    Inventors: Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Abelardo Jr. Advincula, Lionel Chien Hui Tay
  • Publication number: 20090115032
    Abstract: An integrated circuit package system includes: forming a lead having a both top contact portion and a bottom contact portion; connecting an integrated circuit die and the lead; and forming a package encapsulation, having a top side and a bottom side, over the integrated circuit die. The forming the package encapsulation includes partially exposing the top contact portion at the top side, and partially exposing the bottom contact portion along the bottom side with the bottom contact portion extending beyond a nonhorizontal portion of the package encapsulation.
    Type: Application
    Filed: November 7, 2007
    Publication date: May 7, 2009
    Inventors: Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Jose Alvin Caparas, Lionel Chien Hui Tay
  • Publication number: 20090115040
    Abstract: An integrated circuit package system includes: forming an array of external interconnects with an intersecting region between the external interconnects; removing the intersecting region for forming an isolation hole between the external interconnects; mounting an integrated circuit die over the external interconnects; connecting an internal interconnect between the integrated circuit die and the external interconnects; and forming a package encapsulation over the integrated circuit die with the external interconnects partially exposed.
    Type: Application
    Filed: November 7, 2007
    Publication date: May 7, 2009
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Abelardo Jr. Advincula, Lionel Chien Hui Tay
  • Publication number: 20090085178
    Abstract: An integrated circuit packaging system including: forming a base structure, having an opening; mounting a base structure device in the opening; attaching an integrated circuit device over the base structure device; and molding an encapsulant on the base structure, the base structure device, and the integrated circuit device.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 2, 2009
    Inventors: Jong-Woo Ha, Koo Hong Lee, Soo Won Lee, JuHyun Park, Zigmund Ramirez Camacho, Jeffrey D. Punzalan, Lionel Chien Hui Tay, Jairus Legaspi Pisigan
  • Publication number: 20090085181
    Abstract: An integrated circuit package system includes providing die; forming leads adjacent the die; forming a die paddle adjacent the leads with the die thereover; and forming a cavity for isolating one of the die and a die attach segment of the die paddle.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 2, 2009
    Inventors: Abelardo Hadap Advincula, JR., Zigmund Ramirez Camacho, Henry Descalzo Bathan, Jairus Legaspi Pisigan
  • Publication number: 20090085177
    Abstract: An integrated circuit package system includes providing an integrated circuit die; attaching the integrated circuit die over a lead grid having lead blocks; and connecting a die interconnect to the integrated circuit die and the lead blocks.
    Type: Application
    Filed: September 27, 2007
    Publication date: April 2, 2009
    Inventors: Jairus Legaspi Pisigan, Jeffrey D. Punzalan, Lionel Chien Hui Tay, Zigmund Ramirez Camacho
  • Publication number: 20090079096
    Abstract: An integrated circuit package system comprising forming a first device unit, having a first external interconnect, and a second device unit, having a second external interconnect, in an array configuration; mounting an integrated circuit die over the first device unit; connecting the integrated circuit die and the first external interconnect; and encapsulating the integrated circuit die, the first device unit, and the second device unit with both the first external interconnect and the second external interconnect partially exposed.
    Type: Application
    Filed: September 20, 2007
    Publication date: March 26, 2009
    Inventors: Lionel Chien Tay, Zigmund Ramirez Camacho, Jeffrey D. Punzalan, Arnel Trasporto
  • Publication number: 20090072363
    Abstract: An integrated circuit package-in-package system includes: forming an integrated circuit package system including: connecting a first integrated circuit die and a lead, and forming an inner encapsulation covering the first integrated circuit die and a portion of the lead; mounting a second integrated circuit die to the integrated circuit package system; connecting the second integrated circuit die and the lead; and forming a package encapsulation covering the integrated circuit package system and the second integrated circuit die with the lead exposed.
    Type: Application
    Filed: September 13, 2007
    Publication date: March 19, 2009
    Inventors: Zigmund Ramirez Camacho, Arnel Trasporto, Jeffrey D. Punzalan, Abelardo Jr Advincula
  • Publication number: 20090072412
    Abstract: An integrated circuit package system includes: forming an external interconnect; connecting an integrated circuit die and the external interconnect; forming a package encapsulation, having a recess, covering the integrated circuit die with a portion of the external interconnect exposed by the recess; and connecting an integrated circuit device and the external interconnect in the recess.
    Type: Application
    Filed: September 13, 2007
    Publication date: March 19, 2009
    Inventors: Zigmund Ramirez Camacho, Jeffrey D. Punzalan, Jairus Legaspi Pisigan, Abelardo Jr Advincula
  • Publication number: 20090072364
    Abstract: An integrated circuit package system is provided including forming a leadframe having a frame and a die paddle having leads thereon. The leads are held with respect to the die paddle. The leads are separated from the die paddle, and a die is attached to the die paddle. Bond wires are bonded between the leads and the die. The die and bond wires are encapsulated. The leadframe is singulated to separate the frame and the die paddle.
    Type: Application
    Filed: September 13, 2007
    Publication date: March 19, 2009
    Inventors: Jeffrey D. Punzalan, Jairus Legaspi Pisigan, Lionel Chien Hui Tay, Zigmund Ramirez Camacho
  • Publication number: 20090072365
    Abstract: An integrated circuit package system includes: connecting an integrated circuit die and external interconnects; forming an encapsulation over the integrated circuit die and a portion of the external interconnects; and forming an isolation hole between the external interconnects and into a side of the encapsulation exposing the external interconnects.
    Type: Application
    Filed: September 18, 2007
    Publication date: March 19, 2009
    Inventors: Lionel Chien Hui Tay, Zigmund Ramirez Camacho, Abelardo Hadap Advincula, JR.
  • Publication number: 20090072366
    Abstract: An integrated circuit package system includes: forming a die-attach paddle, a terminal pad, and an external interconnect with the external interconnect below the terminal pad; connecting an integrated circuit die with the terminal pad and the external interconnect; and forming an encapsulation, having a first side and a second side at an opposing side to the first side, surrounding the integrated circuit die with the terminal pad exposed at the first side and the external interconnect extending below the second side.
    Type: Application
    Filed: September 18, 2007
    Publication date: March 19, 2009
    Inventors: Guruprasad Badakere Govindaiah, Zigmund Ramirez Camacho, Jeffrey D. Punzalan, Henry Descalzo Bathan, Lionel Chien Hui Tay
  • Publication number: 20090032918
    Abstract: An integrated circuit package system includes: forming a die-attach paddle, an outer interconnect, and an inner interconnect toward the die-attach paddle beyond the outer interconnect; mounting an integrated circuit device over the die-attach paddle; connecting the integrated circuit device to the inner interconnect and the outer interconnect; encapsulating the integrated circuit device over the die-attach paddle; attaching an external interconnect under the outer interconnect; and attaching a circuit device under the die-attach paddle and extended laterally beyond opposite sides of the die-attach paddle.
    Type: Application
    Filed: August 3, 2007
    Publication date: February 5, 2009
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Abelardo Jr Advincula, Lionel Chien Hui Tay
  • Patent number: 7479409
    Abstract: An integrated circuit package system includes an elevated edge leadframe array, isolating leadframes of the elevated edge leadframe array, validating integrated circuit die attached to the leadframes, and forming integrated circuit packages including the integrated circuit die.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: January 20, 2009
    Assignee: Stats Chippac LTD.
    Inventors: Zigmund Ramirez Camacho, Henry D. Bathan, Jose Alvin Caparas, Jeffrey D. Punzalan
  • Publication number: 20090014849
    Abstract: An integrated circuit package system is provided forming a lead from a padless lead frame, and encapsulating the lead for supporting an integrated circuit die with a first molding compound for encapsulation with a second molding compound.
    Type: Application
    Filed: September 24, 2008
    Publication date: January 15, 2009
    Inventors: Zigmund Ramirez Camacho, Jose Alvin Caparas, Arnel Trasporto, Jeffrey D. Punzalan
  • Publication number: 20090001539
    Abstract: An integrated circuit package system includes a die pad with leads; attaching an integrated circuit over the die pad; attaching a connector to the integrated circuit and the leads; and forming an encapsulant, over the integrated circuit, having a connection cavity over the leads leaving an exposed portion of the leads.
    Type: Application
    Filed: June 26, 2007
    Publication date: January 1, 2009
    Inventors: Lionel Chien Hui Tay, Henry Descalzo Bathan, Zigmund Ramirez Camacho
  • Publication number: 20090001563
    Abstract: An integrated circuit package in package system includes a package in package lead with a package in package lead surface substantially planar, attaching a first integrated circuit package having a first encapsulant surface substantially coplanar with the package in package lead surface, attaching a second integrated circuit near the first integrated circuit package, and forming a package in package encapsulant over the first integrated circuit package and the second integrated circuit.
    Type: Application
    Filed: June 27, 2007
    Publication date: January 1, 2009
    Inventors: Henry Descalzo Bathan, Zigmund Ramirez Camacho, Lionel Chien Hui Tay, Jeffrey D. Punzalan