Patents by Inventor Zigmund Ramirez Camacho

Zigmund Ramirez Camacho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit package system with lead structures including a dummy tie bar
    Patent number: 7936053
    Abstract: An integrated circuit package system includes forming lead structures including a dummy tie bar having an intersection with an outer edge of the integrated circuit package system, and connecting an integrated circuit die to the lead structures.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: May 3, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Jeffrey D. Punzalan, Henry D. Bathan, Il Kwon Shim, Zigmund Ramirez Camacho
  • Method for forming an etched recess package on package system
    Patent number: 7932130
    Abstract: An integrated circuit package system includes: providing a die attach paddle with interconnection pads connected to a bottom surface of the die attach paddle; connecting a first device to the interconnection pads with a bond wire; connecting a lead to the interconnection pad or to the first device; encapsulating the first device and the die attach paddle with an encapsulation having a top surface; and etching the die attach paddle leaving a recess in the top surface of the encapsulation.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: April 26, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Lionel Chien Hui Tay, Jairus Legaspi Pisigan
  • INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PROTECTIVE COATING AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20110079888
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a lead-frame having a die attach paddle and a contact pad connected by a link; mounting an integrated circuit die over the die attach paddle; molding a package body on the lead-frame and the integrated circuit die including leaving portions of the die attach paddle, the contact pad, and the link exposed from the package body; forming an exposed edge by etching away the link between the contact pad, and the die attach paddle; and depositing a solder-resistant layer on the exposed edge.
    Type: Application
    Filed: September 24, 2010
    Publication date: April 7, 2011
    Inventors: Henry Descalzo Bathan, Zigmund Ramirez Camacho, Emmanuel Espiritu, Jeffrey D. Punzalan
  • INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SHAPED LEAD AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20110079885
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a package lead having a retention structure around a perimeter of the package lead with a first concave surface, a ridge, and a second concave surface; forming a die attach paddle adjacent the package lead and having an another retention structure around a perimeter of the die attach paddle with an another first concave surface, an another ridge, and an another second concave surface; attaching an integrated circuit die to the die attach paddle; connecting a conductive connector to the integrated circuit die and the package lead; and applying an encapsulation over the integrated circuit die, the encapsulation conformed to the retention structure and exposing a portion of the package lead.
    Type: Application
    Filed: August 13, 2010
    Publication date: April 7, 2011
    Inventors: Zigmund Ramirez Camacho, Emmanuel Espiritu, Henry Descalzo Bathan
  • INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20110079886
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a package paddle; forming a pad extension having a spacing to the package paddle; forming a lead adjacent the pad extension, the pad extension between the package paddle and the lead; forming a conductive layer directly on and between the package paddle and the pad extension; and connecting an integrated circuit to the pad extension and the lead, the integrated circuit over the package paddle.
    Type: Application
    Filed: August 18, 2010
    Publication date: April 7, 2011
    Inventors: Henry Descalzo Bathan, Flynn Carson, Zigmund Ramirez Camacho, Emmanuel Espiritu
  • Integrated circuit package system with multiple devices
    Patent number: 7919848
    Abstract: An integrated circuit package system includes: forming a die-attach paddle, an outer interconnect, and an inner interconnect toward the die-attach paddle beyond the outer interconnect; mounting an integrated circuit device over the die-attach paddle; connecting the integrated circuit device to the inner interconnect and the outer interconnect; encapsulating the integrated circuit device over the die-attach paddle; attaching an external interconnect under the outer interconnect; and attaching a circuit device under the die-attach paddle and extended laterally beyond opposite sides of the die-attach paddle.
    Type: Grant
    Filed: August 3, 2007
    Date of Patent: April 5, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Abelardo Jr Hadap Advincula, Lionel Chien Hui Tay
  • Integrated circuit packaging system with exposed terminal interconnects and method of manufacturing thereof
    Patent number: 7919850
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a lead; mounting an inner package so that the lead is peripheral to the inner package, and the inner package having a connection pad; forming an exposed terminal interconnect on the connection pad; and encapsulating the inner package, and partially encapsulating the exposed terminal interconnect with an encapsulation.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: April 5, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Arnel Senosa Trasporto, Lionel Chien Hui Tay, Zigmund Ramirez Camacho, Abelardo Hadap Advincula, Jr.
  • Integrated circuit packaging system with circuitry stacking and method of manufacture thereof
    Patent number: 7919360
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a lead to include a first tip at one end, a second tip on the end opposite from the first tip with a connect area between each end located above the first tip, and a first tier section or a second tier section located between the connect area and the second tip; connecting a bottom component assembly to the first tier section or the second tier section; connecting a top component assembly over the connect area; and applying an encapsulant over and under the connect area with the first tip exposed.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: April 5, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Jose Alvin Caparas, Arnel Senosa Trasporto
  • Integrated circuit package system with leadframe array
    Patent number: 7915716
    Abstract: An integrated circuit package system includes providing an integrated circuit die; attaching the integrated circuit die over a lead grid having lead blocks; and connecting a die interconnect to the integrated circuit die and the lead blocks.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: March 29, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Jairus Legaspi Pisigan, Jeffrey D. Punzalan, Lionel Chien Hui Tay, Zigmund Ramirez Camacho
  • Integrated circuit packaging system with base structure device
    Patent number: 7915724
    Abstract: An integrated circuit packaging system including: forming a base structure, having an opening; mounting a base structure device in the opening; attaching an integrated circuit device over the base structure device; and molding an encapsulant on the base structure, the base structure device, and the integrated circuit device.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: March 29, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Jong-Woo Ha, Koo Hong Lee, Soo Won Lee, JuHyun Park, Zigmund Ramirez Camacho, Jeffrey D. Punzalan, Lionel Chien Hui Tay, Jairus Legaspi Pisigan
  • INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CIRCUITRY STACKING AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20110068447
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a lead to include a first tip at one end, a second tip on the end opposite from the first tip with a connect area between each end located above the first tip, and a first tier section or a second tier section located between the connect area and the second tip; connecting a bottom component assembly to the first tier section or the second tier section; connecting a top component assembly over the connect area; and applying an encapsulant over and under the connect area with the first tip exposed.
    Type: Application
    Filed: September 18, 2009
    Publication date: March 24, 2011
    Inventors: Zigmund Ramirez Camacho, Jose Alvin Caparas, Arnel Senosa Trasporto
  • INTEGRATED CIRCUIT PACKAGING SYSTEM WITH QUAD FLAT NO-LEAD PACKAGE AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20110068463
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a base array having terminals and an open region; attaching a coverlay layer directly on the base array; placing a component in the open region and directly on the coverlay layer; forming an encapsulation over the base array and the component; removing the coverlay layer to leave a plane of the terminals and a plane of the component partially exposed and substantially coplanar; and removing a portion of the base array between the terminals, the terminals electrically isolated.
    Type: Application
    Filed: September 18, 2009
    Publication date: March 24, 2011
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Emmanuel Espiritu
  • INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CAP LAYER AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20110068448
    Abstract: A method of manufacture of an integrated circuit packaging system includes: attaching a semiconductor die to a die pad of a leadframe; forming a cap layer on top of the semiconductor die for acting as a ground plane or a power plane; and connecting the semiconductor die to the cap layer through a cap bonding wire.
    Type: Application
    Filed: September 22, 2009
    Publication date: March 24, 2011
    Inventors: Zigmund Ramirez Camacho, Lionel Chien Hui Tay, Henry Descalzo Bathan, Guruprasad Badakere Govindaiah
  • INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A LEADED PACKAGE AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20110068458
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a first device having a first exposed side and a first inward side; connecting a second device having a second exposed side and a second inward side facing the first inward side to the first device, the second device having planar dimensions less than planar dimensions of the first device; connecting a system connector to a perimeter of the first inward side, the system connector having an exposed leg partially vertical and an exposed foot partially horizontal; and applying an encapsulant exposing the first exposed side, the second exposed side, the exposed leg, and the exposed foot, the exposed leg offset from the encapsulant, the exposed foot on an end of the system connector opposite the first device.
    Type: Application
    Filed: September 23, 2009
    Publication date: March 24, 2011
    Inventors: Zigmund Ramirez Camacho, Arnel Senosa Trasporto, Lionel Chien Hui Tay, Henry Descalzo Bathan
  • Integrated circuit package with improved connections
    Patent number: 7911040
    Abstract: An integrated circuit package system comprising: providing an integrated circuit die; forming a top paddle over the integrated circuit die wherein the top paddle has planar dimensions smaller than planar dimensions of the integrated circuit die; forming leads adjacent the top paddle; attaching first connectors to the integrated circuit die and the top paddle; attaching second connectors to the integrated circuit die and the leads; and forming an encapsulant over the first connectors, the second connectors, the integrated circuit die, and the top paddle.
    Type: Grant
    Filed: December 27, 2007
    Date of Patent: March 22, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Lionel Chien Hui Tay, Henry Descalzo Bathan, Zigmund Ramirez Camacho
  • Semiconductor package system with die support pad
    Patent number: 7911067
    Abstract: A semiconductor package system includes: providing a lead frame with a lead; making a die support pad separately from the lead frame; attaching a semiconductor die to the die support pad through a die attach adhesive, the semiconductor die being spaced from the lead; and connecting a bonding pad on the semiconductor die to the lead using a bonding wire.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: March 22, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Dioscoro A. Merilo, Lionel Chien Hui Tay
  • Integrated circuit package system with interconnection support and method of manufacture thereof
    Patent number: 7901996
    Abstract: An integrated circuit package system with interconnect support is provided including providing an integrated circuit, forming an electrical interconnect on the integrated circuit, forming a contact pad having a chip support, and coupling the integrated circuit to the contact pad by the electrical interconnect, with the integrated circuit on the chip support.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: March 8, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Henry Descalzo Bathan, Il Kwon Shim, Jeffrey D. Punzalan, Zigmund Ramirez Camacho
  • Integrated circuit package system with multiple molding
    Patent number: 7871863
    Abstract: An integrated circuit package system is provided forming a lead from a padless lead frame, and encapsulating the lead for supporting an integrated circuit die with a first molding compound for encapsulation with a second molding compound.
    Type: Grant
    Filed: September 24, 2008
    Date of Patent: January 18, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Jose Alvin Caparas, Arnel Senosa Trasporto, Jeffrey D. Punzalan
  • Integrated circuit package-in-package system with leads
    Patent number: 7868471
    Abstract: An integrated circuit package-in-package system includes: forming an integrated circuit package system including: connecting a first integrated circuit die and a lead, and forming an inner encapsulation covering the first integrated circuit die and a portion of the lead; mounting a second integrated circuit die to the integrated circuit package system; connecting the second integrated circuit die and the lead; and forming a package encapsulation covering the integrated circuit package system and the second integrated circuit die with the lead exposed.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: January 11, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Arnel Trasporto, Jeffrey D. Punzalan, Abelardo Hadap Advincula, Jr.
  • INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A DUAL SUBSTRATE PACKAGE AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20100320583
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a base substrate having a base conductive material on opposite sides of the base substrate; connecting an internal interconnect having a substantially spherical shape on the base substrate; forming a top substrate having a top conductive material on opposite sides of the top substrate with an upper component thereon facing the base substrate; and attaching the top substrate on the internal interconnect.
    Type: Application
    Filed: June 20, 2009
    Publication date: December 23, 2010
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Jairus Legaspi Pisigan