Vacuum mount wafer polishing methods and apparatus

- Wafer Solutions, Inc.

The present invention provides exemplary methods, systems and apparatus that provide improved substrate characteristics. The present invention may be used in conjunction with or after grinding operations prior to circuit device formation, or alternatively in conjunction with CMP operations on a device wafer between device process steps. In one embodiment, an apparatus (100) for processing a substrate (118) includes a rotatable first spindle (110) having a grind pattern coupled thereto for grinding the substrate. The first spindle is further adapted to receive a polishing pad (200). The apparatus includes a second spindle (116) adapted to hold the substrate, and a gimbal device (150) coupled to the first spindle and adapted to provide three axis movement thereof. In this manner, the same apparatus may be used for both grinding and polishing of a wafer.

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Description
CROSS-REFERENCES TO RELATED APPLICATIONS

[0001] This application claims priority from U.S. Provisional Application No. 60/206,382 (Attorney Docket No. 20468-001100), filed on May 23, 2000, the complete disclosure of which is incorporated herein by reference.

[0002] This application further incorporates herein by reference the following applications which are also assigned to the assignee of the present invention:

[0003] U.S. patent application Ser. No. 09/808,790, entitled “Cluster Tool Systems and Methods for Processing Wafers,” (Attorney Docket No. 20468-000110), filed on Mar. 15, 2001;

[0004] U.S. patent application Ser. No. ______, entitled “Eccentric Abrasive Wheel for Wafer Processing,” (Attorney Docket No. 20468-002110), filed on Apr. 30, 2001; and

[0005] U.S. application Ser. No. ______ (Attorney Docket No. 20468-002410), entitled “Post DSP Substrate Restraining Methods and Apparatus,” filed ______.

BACKGROUND OF THE INVENTION

[0006] The present invention is directed to the processing of wafers, substrates or disks, such as silicon wafers, and more specifically to cluster tool systems, equipment and methods for processing wafers, including for performing polishing and chemical mechanical polishing procedures.

[0007] Wafers or substrates with exemplary characteristics must first be formed prior to the formation of circuit devices. In determining the quality of the semiconductor wafer, the flatness of the wafer is a critical parameter to customers since wafer flatness has a direct impact on the subsequent use and quality of semiconductor chips diced from the wafer. Hence, it is desirable to produce wafers having as near a planar surface as possible.

[0008] In a current practice, cylindrical boules of single-crystal silicon are formed, such as by Czochralski (CZ) growth process. The boules typically range from 100 to 300 millimeters in diameter. These boules are cut with an internal diameter (ID) saw or a wire saw into disc-shaped wafers approximately one millimeter (mm) thick. The wire saw reduces the kerf loss and permits many wafers to be cut simultaneously. However, the use of these saws results in undesirable waviness of the surfaces of the wafer. For example, the topography of the front surface of a wafer may vary by as much as 1-2 microns (&mgr;) as a result of the natural distortions or warpage of the wafer as well as the variations in the thickness of the wafer across its surface. It is not unusual for the amplitude of the waves in each surface of a wafer to exceed fifteen (15) micrometers. The surfaces need to be made more planar (planarized) before they can be polished, coated or subjected to other processes.

[0009] Planarizing processes include lapping or grinding, followed by polishing steps. A lapping process, for example, may be performed to control thickness and remove bow and warp of the silicon wafer. The wafer is simultaneously lapped on both sides with an abrasive slurry in a lapping machine. The lapping process may involve one or more lapping steps with increasingly finer polishing grit. The lapping process, however, is slow and must be followed by careful cleaning and etching steps to relieve stresses before the wafer is polished. These additional steps cause the conventional method to be expensive and time-consuming. Also, the etching process employed after lapping is undesirable from an environmental standpoint, because the large amount of strong acids used must be disposed of in an acceptable way. In another method, a grinding process replaces the lapping procedure. A first surface of the wafer is drawn or pushed against a hard flat holder while the second surface of the wafer is ground flat.

[0010] Subsequent to wafer lapping or grinding, the wafer must be polished to remove wafer stresses and further smooth the wafer surface. Current polishing technology involves complex methods and specialized polishing apparatus. For example, free mount polishing of wafers may involve a CMP carrier which presses the wafer into an underlying polishing pad. The down force applied causes geometric distortions in the pad that leads to undesirable edge effects on the wafer, degrading flatness. For these and other reasons, the above techniques are undesirable.

[0011] Additional deficiencies in the current art, and improvements in the present invention, are described below and will be recognized by those skilled in the art.

SUMMARY OF THE INVENTION

[0012] The present invention provides exemplary methods, systems and apparatus that result in improved substrate characteristics. The present invention may be used in conjunction with or after grinding operations prior to circuit device formation. In another embodiment, methods and apparatus of the present invention will find use in conjunction with CMP operations on a device wafer between device process steps.

[0013] In one embodiment of the present invention, an apparatus for processing a substrate includes a rotatable first spindle having a grind pattern coupled thereto for grinding the substrate. The first spindle is further adapted to receive a polishing pad. The apparatus includes a second spindle adapted to hold the substrate to be ground, and a gimbal device coupled to the first spindle and adapted to provide three axis movement thereof. In this manner, the same apparatus may be used for both grinding and polishing of a wafer.

[0014] In one aspect, the first spindle includes a removable grind ring having the grind pattern, with the first spindle adapted to receive the polishing pad after the grind ring is removed. In another aspect, the processing apparatus includes a vacuum mount apparatus coupled to the second spindle and adapted to hold the substrate to the second spindle with a vacuum. In one aspect, a rotation device is coupled to the second spindle for rotating the second spindle, and hence rotating the mounted substrate.

[0015] In one aspect, the apparatus further includes a cleaner adapted to clean the wafer while the wafer is mounted to the second spindle. In another aspect, a wafer monitor is included for in situ monitoring of, for example, wafer thickness during wafer grinding and polishing operations.

[0016] The present invention further provides exemplary methods of processing a substrate. In one embodiment, a method includes mounting a substrate to a grinder, with the grinder having a substrate platen to which the substrate is mounted and a grind platen. The substrate surface is ground with the grind platen. The method includes mounting a polishing pad to the grind platen while the substrate remains mounted to the substrate platen, and polishing the substrate surface with the polishing pad. In this manner, a single processing apparatus may be used for both grinding and polishing operations.

[0017] In one aspect, the substrate is vacuum mounted to the substrate platen. In a particular aspect, the vacuum is maintained during substrate grinding, during mounting of the polishing pad, and during substrate polishing. In this manner, stresses induced in the substrate during grinding are subsequently polished out of the substrate. Prior art methods that release the vacuum between substrate grinding and polishing, such as is required to transfer the wafer from a grinder to a separate polisher, may not recreate the same stresses in the wafer prior to polishing. Hence, the prior art polishing techniques may not remove all of the grinding-induced stresses in the wafer.

[0018] In one aspect, the polishing pad comprises an annular ring polishing pad. In another aspect, the grind platen further includes a removable annular grind ring, which is removed before mounting of the polishing pad. In still another aspect, the polishing pad includes an annular ring polishing pad, with the polishing pad having a greater pad surface area than a grind area of the annular grind ring.

[0019] In one aspect, the polishing pad comprises a plurality of polishing segments disposed on an annular ring. The annular ring further includes a plurality of spaced apart slurry ports adapted to deliver slurry to the substrate surface, and wherein at least some of the slurry ports are disposed between at least some of the polishing segments.

[0020] In another aspect, substrate polishing is accomplished by providing relative rotation between the substrate and polishing pad, while contacting the substrate surface with the polishing pad with sufficient force to decrease a thickness of the wafer by between about one (1) micron and about three (3) microns per minute. In one aspect, the polishing includes rotating the grind platen at between about 1,000 RPM and about 7,000 RPM. In other embodiments, the substrate platen also is rotated, either alone or in conjunction with grind platen rotation, to facilitate substrate polishing. In a particular embodiment, the substrate platen is rotated in a direction generally opposite the rotation of the grind platen.

[0021] In some embodiments of the present invention, the processing methods further include gimbaling the grind platen so that an exposed surface of the polishing pad is not parallel to the substrate surface. In one aspect, the gimbaling includes gimbaling the grind platen subsequent to substrate grinding and prior to substrate polishing. In another aspect, substrate polishing removes a high point on the substrate surface. In some aspects, the polishing includes introducing a slurry having a pH between about 8.5 and about 13.

[0022] Other objects, features and advantages of the present invention will become more fully apparent from the following detailed description, the appended claims and the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0023] FIG. 1 is a simplified schematic of an apparatus and system according to the present invention;

[0024] FIGS. 2A-2B are simplified top views of polishing platens and pads according to the present invention;

[0025] FIG. 3 is a simplified schematic of another apparatus and system according to the present invention;

[0026] FIG. 4 is a simplified flow diagram of a method of grinding and polishing according to the present invention;

[0027] FIG. 5 is a simplified flow diagram of a wafer processing method according to the present invention; and

[0028] FIGS. 6A-C depict grind damage cluster tools according to the present invention.

DESCRIPTION OF THE SPECIFIC EMBODIMENTS

[0029] Turning now to FIGS. 1-3, embodiments of the present invention will be described. In the embodiment shown in FIG. 1, a grinding apparatus 100 includes a first spindle or work chuck 110 having a plate 114 mounted to a surface thereof. Plate 114 has an abrasive matrix or grind segments 112 disposed on or near a surface of plate 114. Abrasive matrix 112 may comprise a diamond matrix, diamond or other grind segments in glass or resin, and the like. In one embodiment, abrasive matrix 112 comprises a plurality of spaced grind segments that are about {fraction (3/16)} inch by {fraction (3/16)} inch by 1 inch in size. It will be appreciated by those skilled in the art that different grind segment sizes may be used within the scope of the present invention.

[0030] Spindle 110 is positioned such that abrasive matrix 112 is adapted to contact a substrate or wafer 118 coupled to a second spindle 116. Substrate 118 may be coupled to second spindle 116 by a variety of methods, including temporary adhesives such as putty or wax, and the like. In a particular embodiment, wafer 118 is held to spindle 116 by vacuum chucking. Additional details on one possible vacuum mount system are described in conjunction with U.S. application Ser. No. ______ (Attorney Docket No. 20468-002410), entitled “Post DSP Substrate Restraining Methods and Apparatus,” filed ______, previously incorporated herein by reference. Substrate 118 has a surface 136 to be ground, with surface 136 having a center 134.

[0031] First spindle 110 is adapted to rotate about an axis of rotation 120 as indicated by arrow 122. Similarly, in another embodiment, second spindle 116 is adapted to rotate about an axis of rotation 124 as indicated by arrow 126. In still another embodiment, both spindles rotate through a continuous 360 degree rotation. In a particular embodiment, rotation speeds range from about 1,800 revolutions per minute (rpm) to about 3,200 rpm for wafer grinding processes, although rotation speeds need not be within this range. In one embodiment, the two axii of rotation 120 and 124 are separated by an offset distance 128. In a particular embodiment, offset distance 128 is about equal to one-half of a diameter of the substrate 118 to be ground, plus or minus about one-half (0.5) inch to about two (2) inches.

[0032] In alternative embodiments, first spindle 110 and/or second spindle 1 16 is translated to prevent abrasive matrix 112 from continuously being in contact with center 134. As shown in FIG. 1, in one embodiment first spindle 110 is translated in a back and forth, forward to back, side-to-side, or the like motion as depicted by arrows 140. In a similar manner, second spindle 116 may be translated as indicated by arrows 142. In one embodiment only first spindle 110 is translated, while first spindle rotates about axis 120 and second spindle 116 rotates about axis 124. Alternatively, first spindle 110 rotates about axis 120 without being translated, while second spindle 116 is translated as depicted by arrows 142 and rotated about axis 124. In still another embodiment, both the first and second spindles are rotated about their respective axii 120, 124 and are translated as shown by arrows 140 and 142. In each case, abrasive matrix 112 passes through center 134 of exposed surface 136 for only a portion of the time during the grinding processes. Additional combinations of spindle rotation and translation are within the scope of the present invention. Hence, the resident time wafer center 134 is under the grinding matrix is reduced and wafer damage is reduced.

[0033] As shown in FIG. 1, rotation of first spindle 10 may be accomplished by a rotation device 130, and rotation of second spindle 116 may be accomplished using a rotation device 132 coupled to the respective spindles 110, 116. In an alternative embodiment, rotation devices 130 and 132 are a single device. Rotation devices 130, 132 may be coupled together, and/or to spindles 11 0, 116 using gears, pulleys, cables and the like. In one embodiment, translation as shown by arrows 140 and 142 is accomplished using a translator (not depicted) coupled to one or both spindles. Grinding apparatus 100 may be controlled by a controller (not shown) coupled to spindles 110, 116, rotation devices 130,132, and/or the translator(s).

[0034] In one embodiment, after grinding substrate 118, a polishing pad, such as pad 200 (FIG. 2A) or pad 250 (FIG. 2B), is mounted to first spindle 110. In one embodiment, polishing pads 200 or 250 are mounted to first spindle 110 over plate 114. In another embodiment, plate 114, and hence abrasive matrix 112, are removed from first spindle 110 before polishing pad 200 or 250 is mounted to first spindle 110. In a particular embodiment, substrate 118 remains coupled to second spindle 116 during the grinding process, as well as during the time in which polishing pad 200, 250 is applied to first spindle 110. For example, in a particular embodiment, substrate 118 is held to second spindle 116 by a vacuum created by holes (not shown) within second spindle 116. This vacuum is maintained while the polishing pad 200, 250 is positioned.

[0035] Once polishing pad 200 or 250 is positioned on apparatus 100, a wafer polishing procedure occurs. In a particular embodiment, first spindle 110 is rotated at speeds ranging between about 1,000 RPM to about 7,000 RPM to polish substrate surface 136. Further, in a particular embodiment, a polishing slurry is introduced to substrate 118 during the polishing process. For example, the slurry may be introduced through a series of slurry ports disposed in the polishing pad 200, 250 and first spindle 110, as further described below. In a particular embodiment, the slurry comprises a silica slurry. In another embodiment, the slurry has a pH range of about 8.5 to about 13. In still another embodiment, the slurry contains particles ranging from about 200 to about 400 nanometers (nm).

[0036] Turning now to FIGS. 2A-2B, exemplary polishing pads 200, 250 will be further described. Polishing pad 200 comprises an annular ring having a series of slurry ports 210 disposed therethrough. Slurry ports 210 are designed to permit the transfer of slurry or other fluids, such as deionized water, from first spindle 110, through pad 200 and on to substrate surface 136.

[0037] In a particular embodiment, polishing pad 200 has an overall width 220. Width 220 may be a variety of sizes according to the present invention. For example, width 220 may correspond generally to a width of substrate 118 being polished. Width 220 is about 200 to about 300 mm in a one embodiment. In another embodiment, width 220 is about 10 inches, although it is not limited to such size.

[0038] In one embodiment, polishing pad 200 comprises an annular ring having inner 25 and outer radii which together define a ring width 222. In a particular embodiment, ring width 222 ranges from about 1.0 inch to about 3.0 inches. In another embodiment, ring width 222 ranges from about 1.5 inches to about 2.0 inches. Ring widths 222 of such size provide sufficient overlap of the material removal path in each cycle of rotation. In contrast, abrasive matrix 112 may have a much smaller radial thickness, such as 0.25 to 0.50 inches in one particular embodiment.

[0039] The embodiment shown in FIG. 2A generally comprises a solid polishing pad having ports 210 disposed therethrough. In contrast, polishing pad 250 comprises a plurality of slurry ports 210, with at least some ports 210 disposed between polishing segments 230.

[0040] While FIG. 2B shows a pad configuration with alternating slurry ports 210 and polishing segments 230, additional combinations and patterns of ports 210 and segments 230 may be used within the scope of the present invention. For example, slurry ports 210 may be disposed between only some of the polishing segments 230.

[0041] In a particular embodiment, polishing pads 200, 250 comprise polishing felts and/or an externally activated abrasive cloth. In another embodiment, polishing pads 200, 250, including pad segments 230, comprise plastic, polyurethane, PVC or the like.

[0042] In a particular embodiment, the rotation of first spindle 110 is performed at higher rotational speeds for polishing than for grinding. In a particular embodiment, first spindle 110 is rotated between about 1,000 RPM and about 7,000 RPM during polishing procedures. In one polishing procedure of the present invention, a slurry containing loose abrasives is introduced through ports 210. In a particular embodiment, the polishing slurry includes particles within the range of about 200 to 400 nanometers (nm). The abrasive slurry heats up the raised portions of wafer surface 136 as known to those skilled in the art. The locally heated portions of wafer surface 136 are then chemically attacked by the abrasive slurry resulting in an increased polishing of the raised portions of surface 136. In contrast, grinding generally involves a ploughing or similar process in which the abrasive matrix 112 contacts substrate surface 136 to effectuate grinding.

[0043] As a result, the present invention results in exemplary polishing of substrates 118, in part by having a reduced downforce compared to prior art polishing procedures, with high linear velocities to insure sufficient removal rates. In one embodiment, about 1.0 to about 4.0 microns per minute are removed. In another embodiment, removal rates range from about 2.0 to about 3.0 microns per minute. The present invention reduces or eliminates undesirable edge effects at the outer wafer edge due, in part, to the geometry and lower down forces used which reduce polishing pad distortions.

[0044] One of the many advantages of the present invention involves the use of a single apparatus for both substrate grinding and polishing. One advantage involves the maintenance of the vacuum or mechanism holding substrate 118 during both procedures, as well as between the two procedures. In this manner, stresses imparted on substrate 118 during the grinding process are held within substrate 118, and then subsequently removed by the polishing procedures. In contrast, prior art applications of grinding and polishing using two different apparatus inherently requires the removal of the vacuum or other mounting force on substrate 118, thereby altering the stress patterns within substrate 118. The remounting of the substrate to the polishing apparatus may result in different stresses being applied to the substrate during polishing procedures. As a result, some residual stress patterns can remain within substrate 118.

[0045] Turning now to FIG. 3, an alternative embodiment of the present invention will be described. The apparatus 100 shown in FIG. 3 is similar to apparatus 100 shown in FIG. 1, thus the reliance on like reference numerals. The apparatus shown in FIG. 3 further includes, however, a gimbaling device 150 coupled to first spindle 1 10. In this manner, gimbaling device 150 facilitates a three axis movement of first spindle 1 10 for exemplary polishing procedures. For example, gimbaling device 150 permits the movement of first spindle 110 in both the X and Y directions, as well as a tilting of first spindle 110 as shown in FIG. 3. The gimbaling or tilting of first spindle 110 in conjunction with polishing procedures according to the present invention may be used to help remove stresses and/or unwanted high points on substrate surface 136. For example, first spindle 110 can be positioned such that the polishing forces are greater at one edge, such as the leading edge of substrate 118 or middle 134 of substrate surface 136. For example, the polishing forces may remain strong from the leading edge through the middle 134 of substrate 118, and lessen as the polishing pad 200, 250 approaches the trailing edge of substrate 118. It will be appreciated by those skilled in the art that a variety of angular relationships between first spindle 110 and substrate 118 may be used within the scope of the present invention. In a particular embodiment, the gimbaling of first spindle 110 results in an angular displacement between the polishing pad 200, 250 surface and substrate surface 136. In a particular embodiment, the gimbal angle is between about 0.5° and about 2°.

[0046] Apparatus 100 as shown in FIG. 3, in one embodiment, further includes a vacuum system 160 used to provide a vacuum to mount substrate 118 on second spindle 1 16. Additionally, in one embodiment apparatus 100 includes a monitoring device or detector 140 for detecting wafer characteristics during grinding and/or polishing procedures. For example, detector 140 may monitor in situ film or wafer thickness, wafer flatness, and other wafer parametrics such as roughness, haze due to light scattering, and the like. In this manner, wafer processing includes real time monitoring of wafer characteristics.

[0047] In a particular embodiment, apparatus according to the present invention are used in conjunction with CMP processes associated with device wafers. In this manner, a device wafer may be subjected to polishing according to the present invention after, for example, the deposition of a dielectric or conductive layer over the surface of the wafer. In this manner, the polishing of the wafer surface may be used prior to further device process steps such as etching, photolithography, additional deposition steps, and the like.

[0048] In a particular embodiment, a cleaner is further incorporated within apparatus 100 shown in FIGS. 1 or 3. In this manner, exposed surfaces of substrate 118 may be cleaned while substrate 118 remains on spindle 116. In a particular embodiment, second spindle 116 is backflushed with water, such as deionized water, to remove trace slurry contamination that may exist.

[0049] Turning now to FIG. 4, an exemplary method according to the present invention will be described. Method 400 includes mounting a substrate to a platen (410). Once mounted, the method includes grinding a substrate surface with a grind platen (420). Once the substrate has been ground, the method includes mounting a polishing pad to the grind platen (430), and polishing the substrate surface (440). In this manner, a single device may be used for both substrate grinding and polishing. Method 400 then includes an optional substrate cleaning process (450) in which the substrate is cleaned while maintained on the platen. Cleaning may include a spray on clean, brush or cloth clean, a megasonic nozzle clean, or other processes.

[0050] Cluster Tool Systems and Methods

[0051] Apparatus and methods described in conjunction with FIGS. 1-4 will find use in the cluster tool systems and methods described in conjunction with FIGS. 5 and 6A-6C.

[0052] FIG. 5 depicts an exemplary method 200 of the present invention. Method 200 includes a slice process 210, using a wire saw, inner diameter saw or the like, to create a generally disc-shaped wafer or substrate. In one embodiment, the wafer is a silicon wafer. Alternatively, the wafer may comprise polysilicon, germanium, glass, quartz, or other materials. Further, the wafer may have an initial diameter of about 200 mm, about 300 mm, or other sizes, including diameters larger than 300 mm.

[0053] The wafer is cleaned and inspected (Step 212) and then may, or may not, be laser-marked (Step 214). Laser marking involves creating an alphanumeric identification mark on the wafer. The ID mark may identify the wafer manufacturer, flatness, conductivity type, wafer number and the like. The laser marking preferably is performed to a sufficient depth so that the ID mark remains even after portions of the wafer have been removed by subsequent process steps such as grinding, etching, polishing, and the like.

[0054] Thereafter, the wafer is processed through a first module (Step 216), with details of embodiments of the first module described below in conjunction with FIGS. 6A-6C. First module processing (Step 216) includes a grinding process, an etching process, a cleaning process, metrology testing of the wafer, or some combination thereof. In this module, the use of a grinding process in lieu of lapping helps to remove wafer bow and warpage. The grinding process of the present invention also is beneficial in removing wafer surface waves caused by the wafer slicing in Step 210. Benefits of grinding in lieu of lapping include reduced kerf loss, better thickness tolerance, improved wafer shape for polishing and better laser mark dot depth tolerance, and reduced damage, among others.

[0055] The etching process within the first module is a more benign process than prior art etch steps. For example, typical prior art etching may involve the bulk removal of forty (40) or more microns of wafer thickness. In contrast, the etch process of the present invention preferably removes ten (10) microns or less from the wafer thickness. In one embodiment, the first module etch process removes between about two (2) microns to about five (5) microns of wafer material per side, or a total of about four (4) to about ten (10) microns. In another embodiment, the first module etch process removes between about three (3) microns and about four (4) microns of wafer material per side for a total of about six (6) to about (8) microns.

[0056] After first module processing, the wafer is subjected to a donor anneal (Step 218) and thereafter inspected (Step 220). The donor anneal removes unstable oxygen impurities within the wafer. As a result, the original wafer resistivity may be fixed. In an alternative embodiment, donor anneal is not performed.

[0057] The wafer then is processed through a second module (Step 222) in which an edge process is performed. The edge process includes both an edge profile and an edge polish procedure. Edge profiling may include removing chips from the wafer edge, controlling the diameter of the wafer and/or the creation of a beveled edge. Edge profiling also may involve notching the wafer to create primary and secondary flat edges. The flats facilitate wafer alignment in subsequent processing steps and/or provide desired wafer information (e.g., conductivity type). In one embodiment, one or both flats are formed near the ID mark previously created in the wafer surface. One advantage of the present invention involves performing the edge profiling after wafer grinding. In this manner, chips or other defects to the wafer edge, which may arise during grinding or lapping, are more likely to be removed. Prior art edge profiling occurs before lapping, and edge polishing subsequent to the lapping step may not sufficiently remove edge defects.

[0058] The wafer is then processed through a third module (Step 224). A third module process includes a double side polish, a cleaning process and wafer metrology. Wafer polishing is designed to remove stress within the wafer and smooth any remaining roughness. The polishing also helps eliminate haze and light point defects (LPD) within the wafer, and produces a flatter, smoother finish wafer. As shown by the arrow in FIG. 5, wafer metrology may be used to adjust the double side polishing process within the third module. In other words, wafer metrology may be feed back to the double side polisher and used to adjust the DSP device in the event the processed wafer needs to have different or improved characteristics, such as flatness, or to further polish out scratches.

[0059] Thereafter, the wafer is subjected to a finish polish, a cleaning process and metrology testing, all within a fourth process module (226). The wafer is cleaned (Step 228), inspected (Step 230) and delivered (Step 232).

[0060] The reduced number of clean and inspection steps, particularly near the end of the process flow, are due in part to the exemplary metrology processing of the wafer during prior process steps. Wafer metrology testing may test a number of wafer characteristics, including wafer flatness, haze, LPD, scratches and the like. Wafer flatness may be determined by a number of measuring methods known to those skilled in the art. For example, “taper” is a measurement of the lack of parallelism between the unpolished back surface and a selected focal plane of the wafer. Site Total Indicated Reading (STIR) is the difference between the highest point above the selected focal plane and the lowest point below the focal plane for a selected portion (e.g., 1 square cm) of the wafer, and is always a positive number. Site Focal Plane Deviation (SFPD) is the highest point above, or the lowest point below, the chosen focal plane for a selected portion (e.g., 1 square cm) of the wafer and may be a positive or negative number. Total thickness variation (TTV) is the difference between the highest and lowest elevation of the polished front surface of the wafer.

[0061] Further, metrology information, in one embodiment, is fed back and used to modify process parameters. For example, in one embodiment metrology testing in the first module occurs after wafer grinding and may be used to modify the grinding process for subsequent wafers. In one embodiment, wafers are processed through the first module in series. More specifically, each station within the first module processes a single wafer at a time. In this manner, metrology information may be fed back to improve the grinding or other process after only about one (1) to five (5) wafers have been processed. As a result, a potential problem can be corrected before a larger number of wafers have been processed through the problem area, thus lowering costs.

[0062] Further, the present invention produces standard process times for each wafer. More specifically, each wafer is subjected to approximately the same duration of grinding, cleaning, etching, etc. The delay between each process also is the same or nearly the same for each wafer. As a result, it is easy to troubleshoot within the present invention methods and systems.

[0063] In contrast, prior art methods typically uses a batch process mode for a number of process steps. For example, a batch containing a large number of wafers (say, twenty (20)) may be lapped one to a few at a time (say, one (1) to four (4) at a time). After all twenty have been lapped, the batch of twenty wafers then are cleaned together as a group (Step 24), and etched together as a group (Step 26). As a result, the wafers that were lapped first sit around for a longer period of time prior to cleaning than do the wafers lapped last. This varying delay effects wafer quality, due in part to the formation of a greater amount of haze, light point defects, and other time-dependent wafer defects. One negative outcome of irregular process times is the resultant difficulty in locating potential problems within the process system.

[0064] As with the first module, metrology information may be fed back within the second, third and fourth modules. For example, metrology information may be fed back to the double side polisher or finish polisher to adjust those processes to produce improved results. Additionally, in one embodiment, metrology information is fed back within the third and/or fourth module in real time. As a result, process steps such as the double side polishing can be modified during processing of the same wafer on which metrology testing has occurred.

[0065] With reference to FIGS. 6A-6C, additional details on grind cluster modules according to the present invention will be provided. It will be appreciated by those skilled in the art that the modules described in FIGS. 6A-C are embodiments of the present invention, from which a large number of variations for each module exist within the scope of the present invention. Further, additional process steps may be removed or added, and process steps may be rearranged within the scope of the present invention. For example, polishing processes described herein may be incorporated in first module processing. In some embodiments, grinding apparatus 100 as described in conjunction with FIGS. 1-4 are incorporated in the grind clusters of FIG. 6. Details on additional cluster modules are discussed in U.S. application Ser. No. 09/808,790, (Attorney Docket No. 20468-000110), previously incorporated herein by reference.

[0066] FIG. 6A depicts a grind damage cluster module described as first module 216 in conjunction with FIG. 5. First module 300 defines a clean room environment 310 in which a series of process steps are carried out. Wafers that have been processed through Step 214 (FIG. 5) are received in first module 300 via a portal, such as a front opening unified pod (FOUP) 312. First module 300 is shown with two FOUPs 312, although a larger or smaller number of FOUPs/portals may be used. FOUPs 312 are adapted to hold a number of wafers so that the frequency of ingress into the clean room environment 310 may be minimized. A transfer device 314, schematically depicted as a robot, operates to remove a wafer from FOUPs 312 and place the wafer on a grinder 318. If needed, transfer device 314 travels down a track 316 to properly align itself, and hence the wafer, in front of grinder 318. Grinder 318 operates to grind a first side of the wafer. In one embodiment, grinder 318 is grinder 100 as described in FIGS. 2A-4.

[0067] The wafer may be held down on grinder 318 by way of a vacuum chuck, and other methods. Once grinder 318 has ground the first side of the wafer, the wafer is cleaned in cleaner 322 and the transfer device 314 transfers the wafer back to grinder 318 for grinding the converse side of the wafer. In one embodiment, wafer grinding of both wafer sides removes about forty (40) microns to about seventy (70) microns of wafer thickness. After the second wafer side is ground, the wafer is again cleaned in cleaner 322. In one embodiment, cleaning steps occur on grinder 318 subsequent to grinding thereon. In one embodiment, cleaning and drying are accomplished by spraying a cleaning solution on the wafer held by or near the edges and spun.

[0068] In another embodiment, at least one side of the wafer is subjected to two sequential grinding steps on grinder 318. The two grinding processes preferably include a coarse grind followed by a fine grind. Grinder 318 may include, for example, two different grinding platens or pads with different grit patterns or surface roughness. In one embodiment, the wafer is cleaned on grinder 318 between the two grinding steps to the same wafer side. Alternatively, cleaning may occur after both grinding steps to the same wafer side. In still another embodiment, wafer polishing as described in conjunction with FIGS. 1-4 is performed with grinder 318 having a polishing pad 200, 250 incorporated therein.

[0069] In some embodiments, transfer device 314 transfers the wafer from cleaner 322 to a backside polisher 326. For example, this process flow may occur for 200 mm wafers. In this embodiment, the back side is polished and not ground, or both ground and polished.

[0070] As shown in FIG. 6A, a second grinder 320 and a second cleaner 324 are provided within module 300. In this manner, two wafers may be simultaneously processed therethrough. Again, in one embodiment second grinder 320 is grinder 100. Since both grinders 318, 320 have a corresponding cleaner 322, 324, wafer processing times are consistent even if two wafers are being ground simultaneously on grinders 318, 320. In one embodiment, grinders 318 and 320 are used to grind opposite sides of the same wafer. In this case, one side of the wafer is ground on grinder 318 and the other side of the same wafer is ground on grinder 320. As with grinder 318, wafers may be ground on grinder 320 and then cleaned on grinder 320 before removal, or cleaned in cleaner 324.

[0071] Once the wafers have been ground, a second transfer device 336, again a robot in one embodiment, operates to transfer the wafer to an etcher 330. Etcher 330 operates to remove material from the wafer, preferably a portion on both primary sides of the wafer. The etching process is designed to remove stresses within the silicon crystal caused by the grinding process. Such an operation, in one embodiment, removes ten (10) microns or less of total wafer thickness. In this manner, etcher 330 operates to remove less wafer material than in prior art etch processes. Further, the present invention requires less etchant solution, and hence poses fewer environmental problems related to disposal of the acids or other etchants.

[0072] Wafer metrology is then tested at a metrology station 328. In one embodiment wafer metrology is tested subsequent to grinding on grinder 318, and prior to the etching within etcher 330. Alternatively, wafer metrology is tested subsequent to etching in etcher 330. In still another embodiment, wafer metrology is tested both prior to and subsequent to the etching process. Evaluation of wafer metrology involves the testing of wafer flatness and other wafer characteristics to ensure the wafer conforms to the desired specifications. If the wafer does not meet specifications, the wafer is placed in a recycle area 342, which in one embodiment comprises a FOUP 342 (not shown in FIG. 6A). Wafers with acceptable specifications are placed in an out portal or FOUP 340 for removal from first module 300.

[0073] As shown and described in conjunction with FIG. 6A, first module 300 provides an enclosed clean room environment in which a series of process steps are performed. Wafers are processed in series through first module 300. Hence, each wafer has generally uniform or uniform process time through the module as well as generally uniform or uniform delay times between process steps. Further, by immediately cleaning and etching the wafer after grinding, the formation of haze and light point defects (LPD) within the wafer are reduced. Such a module configuration is an improvement over the prior art in which wafers are typically processed during the lapping step in batch mode. As a result, some wafers will wait longer before the cleaning or etching steps than others within the same batch. As a result, haze and other wafer defects vary from wafer to wafer, even between wafers within the same batch. Such a shortcoming of the prior art can make it difficult if not impossible to isolate problems within the wafer process flow in the event defective wafers are discovered.

[0074] An additional benefit of first module 300 is its compact size. In one embodiment, module 300 has a width 342 that is about 9 feet 3 inches and a length 344 that is about 12 feet 6 inches. In another embodiment, first module 300 has a footprint between about ninety (90) square feet (sqft) and about one hundred and fifty (150) square feet. It will be appreciated by those skilled in the art that the width and length, and hence the footprint of first module 300, may vary within the scope of the present invention. For example, additional grinders 318, 320 may be added within first module 300 to increase the footprint of module 300. In one embodiment, first module 300 is adapted to process about thirty (30) wafers per hour. In another embodiment, first module 300 is adapted to process between about twenty-nine (29) and about thirty-three (33) 300 mm wafers per hour.

[0075] FIG. 6B depicts an alternative embodiment of a grind damage cluster module according to the present invention. Again, the grind damage cluster module 350 may correspond to first module 216 described in conjunction with FIG. 5, and the grinder(s) therein may be apparatus 100 as described in FIGS. 1-4. Module 350 includes many of the same components as the embodiment depicted in FIG. 6A, and like reference numerals are used to identify like components. Module 350 receives wafers or substrates to be processed at portal 312, identified as a send FOUP 312 in FIG. 6B. Wafers are transferred by transfer device 314, shown as wet robot 314, to a preprocessing station 354. In one embodiment, transfer device 314 travels on a track, groove, raised member or other mechanism which allows transfer device 314 to reach several process stations within module 350.

[0076] At preprocessing station 354, a coating is applied to one side of the wafer. In one embodiment, a polymer coating is spun on the wafer to provide exemplary coverage. This coating then is cured using ultraviolet (UV) light to provide a low shrink, rapid cured coating on one side of the wafer. In addition to UV curing, curing of the coating may be accomplished by heating and the like. In a particular embodiment, the coating is applied to a thickness between about five (5) microns and about thirty (30) microns.

[0077] Once cured, the coating provides a completely or substantially tack free, stress free surface on one side of the wafer. In one embodiment of the present invention, transfer device 314 transfers the wafer to grinder 318, placing the polymer-coated side down on the grinder 318 platen. In one embodiment, the platen is a porous ceramic chuck which uses a vacuum to hold the wafer in place during grinding. The waves created during wafer slicing are absorbed by the coating and not reflected to the front side of the wafer when held down during the grinding process. After the first wafer side is ground on grinder 318, the wafer is flipped over and the second side is ground. As described in conjunction with FIG. 6A, an in situ clean of the wafer may occur before turning the wafer, or the wafer may be cleaned subsequent to grinding of both sides. Again, the second side grinding may occur on grinder 318 or grinder 320. Grinding of the second side removes the cured polymer, and a portion of the second wafer surface resulting in a generally smooth wafer on both sides, with little to no residual surface waves. Additional details on exemplary grinding apparatus and methods are discussed in U.S. application Ser. No. ______, (Attorney Docket No.20468-001010), filed on Mar. 15, 2001 and incorporated herein by reference.

[0078] After grinding on grinder 318 and/or 320, the wafer is transferred to a combined etch/clean station 352 for wafer etch. Again, wafer etching in station 352 removes a smaller amount of wafer material, and hence requires a smaller amount of etchant solutions, than is typically required by prior art processes.

[0079] Processing continues through module 350 ostensibly as described in FIG. 6A. The wafer metrology is tested at metrology station 328. Wafers having desired characteristics are transferred by transfer device 336, shown as a dry robot, to out portals 340, identified as receive FOUPS 340 in FIG. 6B. Wafers having some shortcoming or undesirable parameter are placed in a recycle area 342, shown as a buffer FOUP 342, for appropriate disposal.

[0080] In one embodiment, module 350 has a width 342 at its widest point of about one hundred and fourteen (114) inches, and a length at its longest point of about one hundred and forty-five inches (145), with a total footprint of about one hundred and fourteen square feet (114 sqft). As will be appreciated by those skilled in the art, the dimensions and footprint of module 350 may vary within the scope of the present invention.

[0081] Still another embodiment of a grind damage cluster module according to the present invention is shown in FIG. 6C. FIG. 6C depicts a first module 360 having similar stations and components as module 350 described in FIG. 6B. Module 350 further may incorporate, in some embodiments, grinder 100. However, module 350 is a flow through module, with wafers being received at one end or side of module 350 and exiting an opposite end or side of module 350. Module 360 has FOUPS 312, 342 and 340 grouped together. Such a configuration provides a single entry point into module 360, and hence into clean room environment 310. Transfer devices 314 and 336 again facilitate the movement of wafers from station to station within module 360. As shown in FIGS. 6B and 6C, transfer device 314 travels on mechanism 316, as discussed in conjunction with FIG. 6B. Transfer device 336 operates from a generally fixed position with arms or platens extending therefrom to translate the wafer to the desired processing station. Module 360 further includes station 354 for application of a wafer coating, such as the UV cured polymer coating described above.

[0082] The invention has now been described in detail for purposes of clarity and understanding. However, it will be appreciated that certain changes and modifications may be practiced within the scope of the appended claims. For example, the modules may have different layouts, dimensions and footprints than as described above. Further, apparatus 100 may be incorporated into any of the cluster modules described herein.

Claims

1. An apparatus for processing a substrate, said apparatus comprising:

a rotatable first spindle having a grind pattern coupled thereto for grinding said substrate, said first spindle further adapted to receive a polishing pad;
a second spindle adapted to hold said substrate to be ground; and
a gimbal device coupled to said first spindle and adapted to provide three axis movement of said first spindle.

2. The apparatus as in claim 1 wherein said first spindle comprises a removable grind ring having said grind pattern, said first spindle adapted to receive said polishing pad after said grind ring is removed.

3. The apparatus as in claim 1 further comprising a vacuum mount apparatus coupled to said second spindle and adapted to hold said substrate to said second spindle with a vacuum.

4. The apparatus as in claim 1 further comprising a rotation device coupled to said second spindle for rotating said second spindle.

5. The apparatus as in claim 1 further comprising a cleaner, said cleaner adapted to clean said wafer while said wafer is mounted to said second spindle.

6. The apparatus as in claim I further comprising a wafer thickness monitor for in situ monitoring of wafer thickness during grinding and polishing of said wafer.

7. A method of processing a substrate, said method comprising:

mounting a substrate to a grinder, said grinder having a grind platen and a substrate platen to which said substrate is mounted;
grinding a substrate surface with said grind platen;
mounting a polishing pad to said grind platen while said substrate remains mounted to said substrate platen; and
polishing said substrate surface with said polishing pad.

8. The method as in claim 7 wherein said mounting comprises mounting said substrate with a vacuum.

9. The method as in claim 8 wherein said vacuum is maintained during said grinding, said mounting said polishing pad, and said polishing.

10. The method as in claim 7 wherein said polishing pad comprises an annular ring polishing pad.

11. The method as in claim 7 wherein said grind platen further comprises a removable annular grind ring, and further comprising removing said grind ring before said mounting said polishing pad.

12. The method as in claim 11 wherein said polishing pad comprises an annular ring polishing pad, said polishing pad having a greater pad surface area than a grind area of said annular grind ring.

13. The method as in claim 7 wherein said polishing pad comprises a plurality of polishing segments disposed on an annular ring, said annular ring further comprising a plurality of spaced apart slurry ports adapted to deliver slurry to said substrate surface, and wherein at least some of said slurry ports are disposed between at least some of said polishing segments.

14. The method as in claim 7 wherein said polishing comprises providing relative rotation between said substrate and said polishing pad, while contacting said substrate surface with said polishing pad with sufficient force to decrease a thickness of said wafer by between about one (1) micron and about three (3) microns per minute.

15. The method as in claim 7 wherein said polishing comprises rotating said grind platen at between about 1,000 RPM and about 7,000 RPM.

16. The method as in claim 15 wherein said polishing further comprises rotating said substrate platen in a direction generally opposite the rotation of said grind platen.

17. The method as in claim 7 further comprising gimbaling said grind platen so that an exposed surface of said polishing pad is not parallel to said substrate surface.

18. The method as in claim 17 wherein said gimbaling comprises gimbaling said grind platen subsequent to said grinding and prior to said polishing.

19. The method as in claim 17 wherein said polishing removes a high point on said substrate surface.

20. The method as in claim 7 wherein said polishing comprises introducing a slurry having a pH between about 8.5 and about 13.

Patent History
Publication number: 20020086625
Type: Application
Filed: May 23, 2001
Publication Date: Jul 4, 2002
Applicant: Wafer Solutions, Inc. (Fremont, CA)
Inventors: Krishna Vepa (Livermore, CA), Duncan Dobson (Woodside, CA)
Application Number: 09864889
Classifications
Current U.S. Class: Combined (451/65)
International Classification: B24B007/00;