Method for enabling power-saving mode

Abstract

A method for enabling a power-saving mode for an electronic apparatus is disclosed. The electronic apparatus is electrically connected to a peripheral device via a peripheral interface device. The method includes steps of comparing a first input value with a first reference value, determining a transmission index according to a comparing result of the first input value and the first reference value, and having the peripheral interface device enter a power-saving mode when the transmission index indicates an inactive transmission state.

Description

FIELD OF THE INVENTION

[0001] The present invention relates to a method for enabling a power-saving mode, and more particularly to a method for enabling a power-saving mode of a peripheral interface device.

BACKGROUND OF THE INVENTION

[0002] With the increasing number of peripheral devices connected thereto, the power consumption of an electronic apparatus increases. Especially for a portable electronic apparatus, e.g. a portable computer or a cellular phone, a battery which has limited power capacity is generally used as the power source. Therefore, it is an important issue to prolong the standby period of the battery.

[0003] For example, a notebook computer is expandable by connecting thereto various peripheral devices via a peripheral interface device, such as IEEE 1394 interface card, with a plurality of expansion I/O ports. It is apparent that the power consumption of the notebook computer increases with the expansion functions applied thereto. Thus, the standby period of the battery decreases accordingly.

[0004] Therefore, the present invention is developed to deal with the above situations encountered in the prior art.

SUMMARY OF THE INVENTION

[0005] An object of the present invention is to provide a method for reducing the power consumption of an electronic apparatus by allowing the electronic apparatus to enter a power-saving mode at proper timing.

[0006] Another object of the present invention is to provide a method for prolonging the standby period of a portable electronic apparatus by allowing the portable electronic apparatus to enter a power-saving mode when the peripheral interface device is not under a data-tranceiving state.

[0007] According to an aspect of the present invention, there is provided a method for enabling a power-saving mode for an electronic apparatus. The electronic apparatus is electrically connected to a peripheral device via a peripheral interface device. The method includes steps of comparing a first input value with a first reference value, determining a transmission index according to a comparing result of the first input value and the first reference value, and having the peripheral interface device enter a power-saving mode when the transmission index indicates an inactive transmission state.

[0008] Preferably, the first input value is a counting value generated in response to a system clock.

[0009] Preferably, the first reference value is a constant value.

[0010] Preferably, the transmission index includes a plurality of transmission-state bits. For example, the plurality of transmission-state bits correspond to an asynchronous request transmit mode, an asynchronous response transmit mode, an asynchronous request receive mode, an asynchronous response receive mode, isochronous transmit modes or isochronous receive modes. Preferably, the inactive transmission state is determined when all of the transmission-state bits are in disable states.

[0011] Preferably, the method further includes a step of resetting the first input value when the inactive transmission state is determined and the peripheral interface device has entered the power-saving mode.

[0012] Preferably, the transmission index indicating the inactive transmission state is generated when the comparing result indicates that the first input value substantially equals to the first reference value. Preferably, The transmission index indicating an active transmission state is generated when the first input value is different from the first reference value. The first input value is preferably updated to repeat the comparing step when the transmission index indicates the active transmission state. The active transmission state is preferably determined when at least one of transmission-state bits included in the transmission index are in an enable state.

[0013] Preferably, the power-saving mode includes at least two power-saving stages.

[0014] Preferably, the method further includes steps of detecting a status of a second input value when the first input value is substantially equal to the first reference value, and prohibiting the peripheral interface device from entering the power-saving mode when the second input value is in a specified status. Preferably, the second input value is a flag and the specified status is one of a true and a false status.

[0015] Preferably, the method further includes steps of comparing a third input value with a third reference value when the first input value is different from the first reference value, and determining a port disable mode and having the peripheral interface device enter the power-saving mode in response to a comparing result indicating that the third input value is substantially equal to the third reference value. The third input value is preferably a counting value generated in response to a system clock, and the third reference value is a constant value. Preferably, the third input value is zeroed when the third input value is substantially equal to the third reference value, and accumulatively updated when the third input value is different from the third reference value.

[0016] Preferably, the port disable mode is determined according to a bias bit and a connection bit. Preferably, a port disable mode is determined when at least one of the bias bit and the connection bit are under a disable state. Another port enable mode is preferably determined when the bias bit and the connection bit are both under an enable state.

[0017] Preferably, the peripheral interface device includes a plurality of ports, and the power-saving mode is entered when all of the ports are under the port disable mode.

[0018] Preferably, the method further includes steps of detecting a status of a fourth input value when the third input value is substantially equal to the third reference value, and prohibiting the peripheral interface device from entering the power-saving mode when the fourth input value is in a specified status. Preferably, the fourth input value is a flag and the specified status is one of a true and a false status.

[0019] According to another aspect of the present invention, there is provided a method for enabling a power-saving mode for an electronic apparatus. The electronic apparatus is electrically connected to a peripheral device via a peripheral interface device with at least one port. The method includes steps of comparing a first input value with a first reference value, determining a port situation index according to a comparing result of the first input value and the first reference value, and having the peripheral interface device enter a power-saving mode when the port situation index indicates an inactive transmission state.

[0020] Preferably, the port situation index is determined according to a bias bit and a connection bit. In a case, the port situation index preferably indicates a port disable mode when at least one of the bias bit and the connection bit are under a disable state. Preferably, the power-saving mode is entered when all of the ports of the peripheral interface device are under the port disable mode. In another case, the port situation index preferably indicates a port enable mode when the bias bit and the connection bit are both under an enable state.

[0021] Preferably, the method further includes steps of detecting a status of a second input value when the first input value is substantially equal to the first reference value, and prohibiting the peripheral interface device from entering the power-saving mode when the second input value is in a specified status. The second input value is preferably a flag and the specified status is one of a true and a false status.

[0022] Preferably, the method further includes steps of comparing a third input value with a third reference value, and determining a transmission inactive mode and having the peripheral interface device enter the power-saving mode in response to a comparing result indicating that the third input value and the third reference value. Preferably, the first and third input values are counting values generated in response to a system clock, and the first and third reference values are constant values. The transmission inactive mode is preferably determined when all transmission-state bits are in a disable state. Preferably, the method further includes steps of detecting a status of a fourth input value when the third input value is substantially equal to the third reference value, and prohibiting the peripheral interface device from entering the power-saving mode when the fourth input value is in a specified status.

BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The present invention may best be understood through the following description with reference to the accompanying drawings, in which:

[0024] FIG. 1 is a functional block diagram illustrating a preferred embodiment of a method for enabling a power-saving mode of a peripheral interface device according to the present invention;

[0025] FIGS. 2A-2D are flowcharts illustrating a preferred embodiment of a method for enabling a power-saving mode of a peripheral interface device according to the present invention;

[0026] FIG. 2E is a detailed flowchart illustrating the step of P26 in FIG. 2D;

[0027] FIGS. 3A-3D are flowcharts illustrating another preferred embodiment of a method for enabling a power-saving mode of a peripheral interface device according to the present invention; and

[0028] FIG. 3E is a detail flowchart illustrating the step of E18 in FIG. 3B.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

[0029] The present invention will now be described more specifically with reference to the following embodiments. It is to be noted that the following descriptions of preferred embodiments of this invention are presented herein for purpose of illustration and description only; it is not intended to be exhaustive or to be limited to the precise form disclosed.

[0030] Please refer to FIG. 1. A system 10 includes an interface connection port L electrically connected to a peripheral interface device 20 via a connecting wire 30. The peripheral interface device 20 includes an interface controller 21 and a plurality of expansion ports (not shown) for connecting to a plurality of the peripheral devices (not shown).

[0031] For easily understanding the present invention, an exemplified embodiment is given herein. In this embodiment, the peripheral interface device 20 is an IEEE 1394 peripheral interface card and provides a plurality of transmission modes including an asynchronous request transmit mode, an asynchronous response transmit mode, an asynchronous request receive mode, an asynchronous response receive mode, isochronous transmit modes and isochronous receive modes. For each transmission mode, a context control set register is provided, disposed in the peripheral interface card 20, for storing a corresponding transmission control context. In other words, the interface controller 21 of the peripheral interface card 20 transmits the transmission control contexts Ic0˜Icn corresponding to the transmission modes, respectively, into an interface information storage region Mi of a memory M. Each of the transmission control contexts Ic0˜Icn includes a corresponding transmission-state bit. Hence, there are a plurality of transmission-state bits Bit0˜Bitn, representing the plurality of transmission modes, respectively.

[0032] Each of the transmission-state bits Bit0˜Bitn includes a disable state and an enable state. When all of the transmission-state bits Bit0˜Bitn are in the disable states, it represents that it is in an inactive transmission state. When at least one of the transmission-state bits Bit0˜Bitn is in its enable state, an active transmission state is determined.

[0033] In addition, the port situation indices Ip0˜Ipm, the bias-state bits Ib0˜Ibm and the connection-state bits It0˜Itm are stored in respective registers of the peripheral interface card 20 and used to determine whether the expansion ports are in disable or enable states.

[0034] When the bias-state bit and the connection-state bit are both under enable states, it means the bias and the connection states of the expansion port to the peripheral device is normal. Thus, the port situation index of the expansion port indicates a port enable mode. When the bias-state bit and the connection-state bit are both under disable states, it means the expansion port is not connected to any peripheral device. Thus, the port situation index of the expansion port indicates a port disable mode. When the bias-state bit is under its enable state but the connection-state bit is under its disable state, the connection of the expansion port to the peripheral device is determined to be abnormal. Thus, the port situation index of the expansion port indicates a port disable mode. When the bias-state bit is under its disable state but the connection-state bit is under its enable state, it means the expansion port has an abnormal bias. Thus, the port situation index of the expansion port indicates a port disable mode. The port is disabled in response to a command from the control unit 11, the peripheral interface device 20 or a user.

[0035] The power mode index Ips of the peripheral interface card 20 is transmitted to the interface information storage region Mi by the interface controller 21 to be realized by the control unit 11. The control unit 11 changes the power mode index Ips in the interface information storage region Mi according to the transmission-state bits Bit0˜Bitn and the port situation indices Ip0˜Ipm. The power mode index Ips indicates one of no special power-saving mode D0, a primary power-saving mode D1, an intermediate power-saving mode D2 and a highly power-saving mode D3. For example, when the transmission-state bits Bit0˜Bitn are all under disable states or when all the port situation indices Ip0˜Ipm are under disable states, the power mode index Ips indicates the highly power-saving mode D3.

[0036] For further describing the present invention, a method for enabling a power-saving mode of a peripheral interface device according to the present invention is illustrated with reference to the flowcharts of FIGS. 2A-2D. First of all, initial values of a first input value CC, a first reference value CC—CHK, a second input value Flagc, a third input value CP, a third reference value CP—CHK and a fourth input value Flagp are set up in Step P12. In this embodiment, both of the first and third input values CC and CP are counting values, and the first and third reference values CC—CHK and CP—CHK are constant values. Both the first and third input values CC and CP, however, can also be interrupt signals generated from the peripheral interface device 20, and the first and third reference values CC—CHK and CP—CHK can be the interrupt signals under specific states. The second and fourth input values Flagc and Flagp are flags. While a first state of the flag indicates a true status, a second state of the flag indicates a false status.

[0037] In response to a system clock of a system 10, counters work to generate the first and third input values CC and CP, respectively, referring to Step P13. The control unit 11 uses a timer of a basic input/output system (BIOS) of the system 10 to provide a counting clock for those counters. The counters, which can be disposed in the control unit 11, are up-counting, down-counting or cyclic counters.

[0038] In Steps P14 and P15, the first input value Cc is inputted and compared with the first reference value CC—CHK. When the first input value CC is substantially equal to the first reference value CC—CHK, go to Steps P16 and P17 to input the second input value Flagc, and determine whether the second input value Flagc is in a true status. Otherwise, go to Step P22 (see FIG. 2C) to monitor port situations. Referring back to Step P17, if the second input value Flagc is in the true status, go to Steps P18 and P19 (see FIG. 2B) to input the transmission-state bits Bit0˜Bitn from the interface information storage region Mi and determine their transmission states. If all of the transmission-state bits Bit0˜Bitn are under transmission-disable states, the control unit 11 changes the power mode index Ips in the interface information storage region Mi, and the interface controller 21 has the peripheral interface device 20 enter the highly power-saving mode D3 (Step P20, FIG. 2B). Otherwise, if the transmission-state bits Bit0˜Bitn are not all under disable states, the power mode index Ips is variously re-entered by the control unit 11 (Step P34, FIG. 2B). For example, when there are three of the transmission-state bits Bit0˜Bitn remaining in transmission-enable states, the power mode index Ips is changed to a value indicating the intermediate power-saving mode D2 of the peripheral interface device 20. Further, the peripheral interface device 20 enters a primary poser-saving mode D1 in response to the change of power mode index Ips when there is four of the transmission-state bits Bit0˜Bitn remaining in transmission-enable states. More than four transmission-state bits Bit0˜Bitn remaining in transmission-enable states correspond to another power mode index value and result in the no power-saving mode D0. After either of the power-saving modes D0, D1, D2 and D3, the first input value CC is initialized by resetting the associated counter, as indicated by Step P21.

[0039] Please go back to Step P17 in FIG. 2A again. If the second input value Flagc is not in the true status, i.e. it is in a false status, go to Steps P30 and P31 where the power index Ips in the interface information storage region Mi is inputted to determine whether the peripheral interface device 20 is in the no power-saving mode D0. If it is, the control unit 11 resets the the counter and initializes the first input value CC. On the contrary, if it is not, go to Step P33 where the control unit 11 changes the power index Ips to to force the peripheral interface device 20 to enter the no power-saving mode D0, and then resets the counting value CC. It is understood that the input value flagc allows the user to decide whether the power-saving function is to be entered or not.

[0040] After the power-saving functions in response to the data transmission states and/or the input value flagc are determined, the counting value CC is reset, and Step P22 (FIG. 2C) where another input value CP is inputted is executed. The third input value CP is compared with the third reference value CP—CHK in Step P23. If the comparing result indicates that the input value CP is different from the reference value CP—CHK, the procedure is back to Step P13 (FIG. 2A), counting up/down to generate new input values CC and CP. On the contrary, if the comparing result indicates that the input value CP is substantially equal to the reference value CP—CHK, another input value Flagp is inputted and determined whether to be in the true status. When the input value Flagp indicates a false status, go to Step P35 where the port situation indices Ip0˜Ipm are inputted and the port situations are determined. If all the port situation indices reveal disable states, the control unit 11 resets the input value CP in Step P37 and the procedure goes back to Step P13. Otherwise, all the port situation indices Ip0˜Ipm are forced to the disable states before the input value CP is reset and Step P13 is executed. On the other hand, when the input value Flagp indicates the true status in Step P25, the port situation indices Ip0˜Ipm are inputted and discriminated to be in enable states or disable states in Step P26. If the port situation indices Ip0˜Ipm are all determined to be under the disable states in Step P27, the control unit 11 changes the power mode index Ips, and the interface controller 21 has the peripheral interface device 20 enter the highly power-saving mode D3 (Step P28, FIG. 2D). Otherwise, if the port situation indices Ip0˜Ipm are not all under disable states in Step P27, the power mode index Ips is variously re-entered by the control unit 11 (Step P39, FIG. 2D). For example, when there are three of the port situation indices Ip0˜Ipm remaining in transmission-enable states, the power mode index Ips is changed to a value indicating the intermediate power-saving mode D2 of the peripheral interface device 20. Further, the peripheral interface device 20 enters a primary poser-saving mode D1 in response to the change of power mode index Ips when there is four of the port situation indices Ip0˜Ipm remaining in transmission-enable states. More than four port situation indices Ip0˜Ipm remaining in transmission-enable states correspond to another power mode index value and result in the no power-saving mode D0. After either of the power-saving modes D0, D1, D2 and D3, the input value CP is initialized by resetting the associated counter. It is understood that the input value flagp allows the user to decide whether the power-saving function is to be entered or not. After the power-saving functions in response to the port utilization states and/or the input value flagp are determined, the counting value CP is reset, and Step P13 (FIG. 2A) where new input values CC and CP are generated and inputted is executed, thereby continuousely monitoring and optimizing the power consumption of the peripheral interface device.

[0041] Preferably, the step P26 for discriminating the port situation indices Ip0˜Ipm is executed by the sub-steps P261 to P264 as shown in FIG. 2E. First of all, the port situation indices Ip0˜Ipm are inputted. Then, the bias-state bit and the connection-state bit corresponding to each of the port situation indices Ip0˜Ipm are determined to be in enable or disable states. When the bias-state bit and connection-state bit are both under enable states, which means the bias of the corresponding expansion port of the peripheral interface device 20 is in a normal state and the connection of the expansion port to the peripheral device is perfect, the port situation index associated with the expansion port is discriminated to be under the enable state. Otherwise, the port situation index is discriminated to be under the disable state.

[0042] FIGS. 3A-3D are flowcharts illustrating another method for enabling a power-saving mode of a peripheral interface device according to the present invention. In this method, the port situation is detected prior to the transmission state.

[0043] First of all, initial values of a first input value CP, a first reference value CP—CHK, a second input value Flagp, a third input value CC, a third reference value CC—CHK and a fourth input value Flagc are set up in Step E12. In this embodiment, both of the first and third input values CP and CC are counting values, and the first and third reference values CP—CHK and CC—CHK are constant values. Both the first and third input values CP and CC, however, can also be interrupt signals generated from the peripheral interface device 20, and the first and third reference values CP—CHK and CC—CHK can be the interrupt signals under specific states. The second and fourth input values Flagp and Flagc are flags. While a first state of the flag indicates a true status, a second state of the flag indicates a false status.

[0044] In response to a system clock of a system 10, counters work to generate the first and third input values CP and CC, respectively, referring to Step E13. In Steps E14 and E15, the first input value CP is inputted and compared with the first reference value CP—CHK. If the first input value CP is substantially equal to the first reference value CP—CHK, go to Steps E16 and E17 to input the second input value Flagp, and determine whether the second input value Flagp is true or not. Otherwise, go to Step E22 (see FIG. 3C) to monitor transmission states. Referring back to Step E17, if the second input value Flagp is true, go to Steps E18 and E19 (see FIG. 3B) to input the port situation indices Ip0˜Ipm from the interface information storage region Mi and determine their port states. If all of the port situation indices Ip0˜Ipm indicate disable states, the control unit 11 changes the power mode index Ips in the interface information storage region Mi, and the interface controller 21 has the peripheral interface device 20 enter the highly power-saving mode D3 (Step E20, FIG. 3B). Otherwise, the power mode index Ips is variously re-entered by the control unit 11 (Step E34, FIG. 3B). For example, when there are three of the port situation indices Ip0˜Ipm remaining in transmission-enable states, the power mode index Ips is changed to a value indicating the intermediate power-saving mode D2 of the peripheral interface device 20. Further, the peripheral interface device 20 enters a primary poser-saving mode D1 in response to the change of power mode index Ips when there is four of the port situation indices Ip0˜Ipm remaining in transmission-enable states. More than four port situation indices Ip0˜Ipm remaining in transmission-enable states correspond to another power mode index value and result in the no power-saving mode D0. After either of the power-saving modes D0, D1, D2 and D3, the first input value CP is initialized by resetting the associated counter, as indicated by Step E21.

[0045] Please go back to Step E17 in FIG. 3A again. If the second input value Flagp is not true, i.e. it is false, go to Steps E30 and E31 to monitor the port situation indices Ip0˜Ipm. If the port situation indices Ip0˜Ipm are all in disable states, the control unit 11 resets the the counter and initializes the first input value CP. On the contrary, if the port situation indices Ip0˜Ipm are not all in disable states, go to Step E33 to have the peripheral interface device enter the no power-saving mode D0, and then resets the counting value CP. It is understood that the input value flagp allows the user to decide whether the power-saving function is to be entered or not.

[0046] After the power-saving functions in response to the port situations and/or the input value flagp are determined, the counting value CP is reset, and Step E22 (FIG. 3C) where another input value CC is inputted is executed. The third input value CC is compared with the third reference value CC—CHK in Step E23. If the comparing result indicates that the input value CP is different from the reference value CP—CHK, the procedure is back to Step E13 (FIG. 3A), i.e. counting up/down to generate new input values CC and CP. On the contrary, if the comparing result indicates that the input value CC is substantially equal to the reference value CC—CHK, another input value Flagc is inputted and determined whether to be true. When the input value Flagc indicates a false status, go to Step E35 where the power index Ips in the interface information storage region Mi is inputted to determine whether the peripheral interface device 20 is in the no power-saving mode D0. If it is, the control unit 11 resets the the counter and initializes the input value CC. On the contrary, if it is not, go to Step E38 where the control unit 11 changes the power index Ips to to force the peripheral interface device 20 to enter the no power-saving mode D0, and then resets the counting value CC. On the other hand, when the input value Flagc indicates the true status in Step E25, the transmission-state bits Bit0˜Bitn are inputted and discriminated to be in enable states or disable states in Step E26. If the transmission-state bits Bit0˜Bitn are all determined to be under the disable states in Step E27, the control unit 11 changes the power mode index Ips, and the interface controller 21 has the peripheral interface device 20 enter the highly power-saving mode D3 (Step E28, FIG. 3D). Otherwise, if the transmission-state bits Bit0˜Bitn are not all under disable states in Step E27, the power mode index Ips is variously re-entered by the control unit 11 (Step E39, FIG. 3D). For example, when there are three of the transmission-state bits Bit0˜Bitn remaining in transmission-enable states, the power mode index Ips is changed to a value indicating the intermediate power-saving mode D2 of the peripheral interface device 20. Further, the peripheral interface device 20 enters a primary poser-saving mode D1 in response to the change of power mode index Ips when there is four of the transmission-state bits Bit0˜Bitn remaining in transmission-enable states. More than four transmission-state bits Bit0˜Bitn remaining in transmission-enable states correspond to another power mode index value and result in the no power-saving mode D0. After either of the power-saving modes D0, D1, D2 and D3, the input value CC is initialized by resetting the associated counter. It is understood that the input value flagc allows the user to decide whether the power-saving function is to be entered or not. After the power-saving functions in response to the transmission-state bits Bit0˜Bitn and/or the input value flagp are determined, the counting value CC is reset, and Step E13 (FIG. 3A) where new input values CP and CC are generated and inputted is executed, thereby continuousely monitoring and optimizing the power consumption of the peripheral interface device.

[0047] Preferably, the step E18 for discriminating the port situation indices Ip0˜Ipm is executed by the sub-steps E181 to E184 as shown in FIG. 3E. First of all, the port situation indices Ip0˜Ipm are inputted. Then, the bias-state bit and the connection-state bit corresponding to each of the port situation indices Ip0˜Ipm are determined to be in enable or disable states. When the bias-state bit and connection-state bit are both under enable states, which means the bias of the corresponding expansion port of the peripheral interface device 20 is in a normal state and the connection of the expansion port to the peripheral device is perfect, the port situation index associated with the expansion port is discriminated to be under the enable state. Otherwise, the port situation index is discriminated to be under the disable state.

[0048] To sum up, the method for enabling the power-saving mode according to the present invention dynamically detecting the data transmission states of the peripheral interface device 20 and/or the utility situations of the expansion ports. Accordingly, the power status of the system 10 can be dynamically adjusted, thereby minimizing the power consumption. The power-saving function is especially important for a portable computer or a cell phone which relies on battery to work.

[0049] While the invention has been described in terms of what is presently considered to be the most practical and preferred embodiments, it is to be understood that the invention needs not be limited to the disclosed embodiment. On the contrary, it is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims which are to be accorded with the broadest interpretation so as to encompass all such modifications and similar structures.

Claims

1. A method for enabling a power-saving mode for an electronic apparatus, said electronic apparatus being electrically connected to a peripheral device via a peripheral interface device, said method comprising steps of:

comparing a first input value with a first reference value;

determining a transmission index according to a comparing result of said first input value and said first reference value; and

having said peripheral interface device enter a power-saving mode when said transmission index indicates an inactive transmission state.

2. The method according to claim 1 wherein said first input value is a counting value generated in response to a system clock.

3. The method according to claim 1 wherein said first reference value is a constant value.

4. The method according to claim 1 wherein said transmission index includes a plurality of transmission-state bits.

5. The method according to claim 4 wherein said plurality of transmission-state bits correspond to an asynchronous request transmit mode, an asynchronous response transmit mode, an asynchronous request receive mode, an asynchronous response receive mode, isochronous transmit modes and isochronous receive modes.

6. The method according to claim 4 wherein said inactive transmission state is determined when all said transmission-state bits are in disable states.

7. The method according to claim 1 further comprising a step of resetting said first input value when said inactive transmission state is determined and said peripheral interface device enters said power-saving mode.

8. The method according to claim 1 wherein said transmission index indicating said inactive transmission state is generated when said comparing result indicates that said first input value substantially equals to said first reference value.

9. The method according to claim 8 wherein said transmission index indicating an active transmission state is generated when said first input value is different from said first reference value.

10. The method according to claim 9 wherein said first input value is updated to repeat the comparing step when said transmission index indicates said active transmission state.

11. The method according to claim 9 wherein said active transmission state is determined when at least one of transmission-state bits included in said transmission index are in an enable state.

12. The method according to claim 1 wherein said power-saving mode includes at least two power-saving stages.

13. The method according to claim 1 further comprising steps of:

detecting a status of a second input value when said first input value is substantially equal to said first reference value; and

prohibiting said peripheral interface device from entering said power-saving mode when said second input value is in a specified status.

14. The method according to claim 13 wherein said second input value is a flag and said specified status is one of a true and a false status.

15. The method according to claim 1 further comprising steps of:

comparing a third input value with a third reference value when said first input value is different from said first reference value; and

determining a port disable mode and having said peripheral interface device enter said power-saving mode in response to a comparing result indicating that said third input value is substantially equal to said third reference value.

16. The method according to claim 15 wherein said third input value is a counting value generated in response to a system clock, and said third reference value is a constant value.

17. The method according to claim 16 wherein said third input value is zeroed when said third input value is substantially equal to said third reference value, and accumulatively updated when said third input value is different from said third reference value.

18. The method according to claim 15 wherein said port disable mode is determined according to a bias bit and a connection bit.

19. The method according to claim 18 wherein said port disable mode is determined when at least one of said bias bit and said connection bit are under a disable state.

20. The method according to claim 19 wherein a port enable mode is determined when said bias bit and said connection bit are both under an enable state.

21. The method according to claim 15 wherein said peripheral interface device includes a plurality of ports, and said power-saving mode is entered when all of said ports are under said port disable mode.

22. The method according to claim 15 further comprising steps of:

detecting a status of a fourth input value when said third input value is substantially equal to said third reference value; and

prohibiting said peripheral interface device from entering said power-saving mode when said fourth input value is in a specified status.

23. The method according to claim 22 wherein said fourth input value is a flag and said specified status is one of a true and a false status.

24. A method for enabling a power-saving mode for an electronic apparatus, said electronic apparatus being electrically connected to a peripheral device via a peripheral interface device with at least one port, said method comprising steps of:

comparing a first input value with a first reference value;

determining a port situation index according to a comparing result of said first input value and said first reference value; and

having said peripheral interface device enter a power-saving mode when said port situation index indicates an inactive transmission state.

25. The method according to claim 24 wherein said port situation index is determined according to a bias bit and a connection bit.

26. The method according to claim 25 wherein said port situation index indicates a port disable mode when at least one of said bias bit and said connection bit are under a disable state.

27. The method according to claim 26 wherein said power-saving mode is entered when all of said ports of said peripheral interface device are under said port disable mode.

28. The method according to claim 25 wherein said port situation index indicates a port enable mode when said bias bit and said connection bit are both under an enable state.

29. The method according to claim 24 further comprising steps of:

detecting a status of a second input value when said first input value is substantially equal to said first reference value; and

prohibiting said peripheral interface device from entering said power-saving mode when said second input value is in a specified status.

30. The method according to claim 29 wherein said second input value is a flag and said specified status is one of a true and a false status.

31. The method according to claim 24 further comprising steps of:

comparing a third input value with a third reference value; and

determining a transmission inactive mode and having said peripheral interface device enter said power-saving mode in response to a comparing result indicating that said third input value and said third reference value.

32. The method according to claim 31 wherein said first and third input values are counting values generated in response to a system clock, and said first and third reference values are constant values.

33. The method according to claim 31 wherein said transmission inactive mode is determined when all transmission-state bits are in a disable state.

34. The method according to claim 31 further comprising steps of:

detecting a status of a fourth input value when said third input value is substantially equal to said third reference value; and

prohibiting said peripheral interface device from entering said power-saving mode when said fourth input value is in a specified status.

35. The method according to claim 34 wherein said fourth input value is a flag and said specified status is one of a true and a false status.