Abstract: A method for performing power management services for devices includes identifying, by a power manager, a power schedule generation event associated with devices; in response to identifying the power schedule generation event: identifying relationships between containers of the devices; generating a relationship matrix based on the identifying; obtaining network information associated with the containers; generating a prediction model using the relationship matrix and the network information; generating power schedules associated with the devices using the prediction model; and performing power management services for the devices based on the power schedule.

Abstract: A host apparatus, into which a card having a nonvolatile semiconductor memory is inserted, issues a check command to the card. The check command instructs to send information on whether the card supports a termination process in which the card shifts into a state ready for a stop of power supply from the host apparatus.

Abstract: Example embodiments provide improved dynamic load management for an electric vehicle charging system. A cloud-based apparatus is configured to adjust maximum current ratings of charging stations when one or more charging stations drop offline based on a latest accepted request for maximum charging current of the offline charging station. An apparatus, a method, and a computer program are disclosed.

Abstract: A data storage device comprises a disk; a head configured to read data from and write data to the disk; and a current balancer configured to receive a first voltage supply having a load limit and to receive a second voltage supply. The current balancer is further configured, to mitigate rotational vibration (RV) noise, to sample a first current IH5V drawn from the first voltage supply, to maintain a difference between the first current IH5V and a current balancer threshold parameter IThreshold to be at least twice a minimum peak current minCurrentLimitpk amount required for turn on of the current balancer (IH5V?IThreshold?2*minCurrentLimitpk), and to draw a second current from the second voltage supply to satisfy a part of a total load on the first voltage supply that exceeds the load limit.

Abstract: Embodiments of the present disclosure are related to dynamically adjusting a timing and/or power model for a programmable logic device. In particular, the present disclosure is directed to adjusting a timing and/or power model of the programmable logic device that operates at a voltage level that is not other than a predefined voltage defined by a voltage library. A system of the present disclosure may interpolate between voltage levels defined by the voltage libraries to generate a new voltage library for the programmable logic device. A timing and/or power model may be generated for the programmable logic device based on the new voltage library and the programmable logic device may be analyzed using the timing and/or power model at the interpolated voltage. The timing and/or power model may be used to generate a bitstream that is used to program the integrated circuit.

Abstract: The various embodiments described herein include methods and systems for encoding and decoding video. In one aspect, a method includes obtaining video data that includes a first block. The method further includes determining a plurality of transform coefficients associated with the first block. The method also includes predicting respective coefficient signs for the plurality of transform coefficients. The method also includes entropy coding the first block including jointly signaling two or more of the predicted coefficient signs.

Abstract: A computer implemented method includes receiving one or more user set preferences for detecting a hub alarm condition and one or more actions to perform in response to detecting a hub alarm condition, receiving, from the output of the security panel, data indicating that a traditional alarm condition occurred, based on receiving data indicating a traditional alarm condition occurred at the monitored property, receiving sensor data from at least one wireless sensor in a vicinity of a hardwired sensor associated with the traditional alarm condition, determining, based on the sensor data received from at least one wireless sensor in a vicinity of the hardwired sensor associated the traditional alarm condition, that the sensor data satisfies a condition, and in response to determining that the sensor data satisfies a condition, performing an action.

Abstract: A first address resolution request may be received by a first access switch from a first device and the address resolution request may be resolved by the first access switch with a central database of a network. Then a second address resolution request may be sent to a sensor by the first access switch in response to resolving the first address resolution request. An address resolution response may then be sent by the sensor to the first device in response to the sensor determining that the first device is a bad endpoint. A session may then be established between the sensor and the first device in response to the sensor sending the address resolution response. The first device may then be prompted by the sensor via the established session to resolve issues that lead the sensor to determine that the first device is a bad endpoint.

Abstract: Various embodiments include methods and devices for implementing scaling memory frequency configuration by a computing device. Embodiments may include comparing at least a memory refresh rate, a memory size, at least one use case bandwidth of transmission between the memory and a system on chip (SoC), and a use case latency of transmission between the memory and the SoC with at least one stored memory refresh rate, at least one stored memory size, at least one stored use case bandwidth of transmission between the memory and the SoC, and at least one stored use case latency of transmission between the memory and the SoC, selecting a memory frequency based on a result of the comparison, and configuring the memory for the memory frequency. Some embodiments may include issuing an alarm indicating changing the use for the memory to be able to achieve a use case parameter.

Abstract: A DC link capacitor (8) comprises a capacitor housing, a plurality of capacitor cells (1), each comprising a film capacitor element (2) with a wound metallized film and two contact terminals (3a, 3b) connected to the metallized plastic film. The plurality of capacitor cells (1) are arranged in the capacitor housing (4) and are sealed therein by means of a sealing material (7). The contact terminals (3a, 3b) are electrically isolated from each other and protrude separately out of the sealing material (7), in order to be connected by means of bus bars.

Abstract: A method is presented for selectively throttling subsystems of a battery-powered computing device. The method comprises determining an amount of power consumed a plurality of rest-of-platform (ROP) subsystems of the battery-powered computing device. A total amount of power consumed by subsystems of a battery-powered computing device is determined. The subsystems including at least a system on a chip (SOC) and the plurality of ROP subsystems. Responsive to recognizing a condition where the amount of power consumed by the plurality of ROP subsystems is above an ROP power threshold, and where the total amount of power consumed increases above a first throttling threshold, one or more ROP subsystems are throttled.

Abstract: Examples of a low complexity enhancement video coding are described. Encoding and decoding methods are described, as well as corresponding encoders and decoders. The enhancement coding may operate on top of a base layer, which may provide base encoding and decoding. Spatial scaling may be applied across different layers. Only the base layer encodes full video, which may be at a lower resolution. The enhancement coding instead operates on computed sets of residuals. The sets of residuals are computed for a plurality of layers, which may represent different levels of scaling in one or more dimensions. A number of encoding and decoding components or tools are described, which may involve the application of transformations, quantization, entropy encoding and temporal buffering. At an example decoder, an encoded base stream and one or more encoded enhancement streams may be independently decoded and combined to reconstruct an original video.

Abstract: A circuit system includes a first integrated circuit die having a first group of circuits configured to perform a first set of operations. The circuit system also includes a second integrated circuit die having a second group of circuits configured to start performing a second set of operations with a delay after the first group of circuits starts performing the first set of operations to reduce power supply voltage droop. The operations performed by the first and second groups of circuits can be interleaved with a fixed or a variable delay. Logic circuits can be partitioned into the first and the second groups of circuits based on predicted switching activity of the logic circuits. Decoupling capacitors in integrated circuit dies can be coupled together to reduce droop in a supply voltage during a high current event.

Abstract: A memory device standby procedure can include idling a first memory device in a low-power standby mode, the first memory device coupled to a memory interface that couples multiple memory devices to a host and includes a command line (CA) and a standby exit line (EX), and the first memory device can include a primary die coupled to multiple secondary dies using an intra-package bus. At the first memory device, the procedure can include waking receiver circuitry on the primary die in response to a state change on the standby exit line, and sampling the command line using logic circuitry on the primary die. When a wakeup message on the command line comprises a chip identification that corresponds to the first memory device, the procedure can include initiating a standby exit procedure for the first memory device.

Abstract: Systems and methods of memory operation involving dynamic adjustment of write policy based on performance needs are disclosed. In one embodiment, an exemplary method may comprise monitoring memory performance parameters related to a programming operation being scheduled, selecting a write policy based on the memory performance parameters monitored, executing a memory control process that is configured to switch between the first addressing scheme and the second addressing scheme, and programming a first superpage of the programming operation using the first addressing scheme and programing a second superpage of the programming operation using the second addressing scheme.

Abstract: A cooling apparatus includes a body frame holding a fan. The fan includes a blade housed in a casing and rotating about a fan shaft and discharges air from a casing's fan inlet opening surrounding the fan shaft into a casing's fan exhaust opening on a tangent line of the blade's rotational direction. The body frame includes an air-leading duct feeding the discharged air to a heat exchanger in a first direction. The fan tilts by a first tilt from a first plane orthogonal to the first direction to position, in the first direction, the fan exhaust opening closer to the heat exchanger than the blade, and by a second tilt about the fan shaft to tilt, as viewed from the first direction, the fan exhaust opening from a direction parallel to a second plane parallel to the first direction.

Abstract: Video streams uploaded to a video hosting platform are transcoded using quality-normalized transcoding parameters dynamically selected using a learning model. Video frames of a video stream are processed using the learning model to determine bitrate and quality score pairs for some or all possible transcoding resolutions. The listing of bitrate and quality score pairs determined for each resolution is processed to determine a set of transcoding parameters for transcoding the video stream into each resolution. The bitrate and quality score pairs of a given listing may be processed using one or more predefined thresholds, which may, in some cases, refer to a weighted distribution of resolutions according to watch times of videos of the video hosting platform. The video stream is then transcoded into the various resolutions using the set of transcoding parameters selected for each resolution.

Abstract: The technology is generally directed to a coordinated power throttling mechanism for a payload using power provided by a rack such that the rack power does not exceed a threshold amount for greater than a predetermined period of time. The coordinated power throttling mechanism includes the rack providing a power throttling signal to the payload and the payload executing the power throttling upon detection of the throttling signal. The payload may detect the throttling signal and, after a delay, execute the power throttling. The delay may ensure that all payloads within the rack have detected the power throttling signal.

Abstract: Provided are a chip, a series power supply circuit, a data processing device, and a computer server. The chip includes a plurality of units to be powered, the plurality of units to be powered are connected in parallel, and a voltage domain forms on each unit to be powered. Each unit to be powered is connected to a voltage regulation unit in series, and during power-on of the chip, the voltage regulation unit is regulated to control power-on time of the plurality of units to be powered.

Abstract: Data backup method, wherein the method comprises the following method steps: switching on an energy supply of a first data storage element of a data backup device by means of a control unit of the data backup device, activating a processing unit by means of the control unit, setting up a data connection between the processing unit and the first data storage element, setting up a data connection between the processing unit and a data memory, querying the data memory by means of the processing unit, storing the data queried from the data memory on the data storage element by means of the processing unit, deactivating the processing unit, switching off an energy supply of the first data storage element by means of the control unit, and data backup device for such a method.

Abstract: A transceiver includes a transmitter and a receiver connected to each other through a first line and a second line. The transmitter transmits signals having a first voltage range to the first line and the second line in a first mode, and transmits signals having a second voltage range less than the first voltage range to the first line and the second line in a second mode. When transmitting a first payload to the receiver, the transmitter is sequentially driven in the first mode, the second mode, and the first mode, and the transmitter transmits a clock training pattern and the first payload in the second mode.

Abstract: A power supply control method, system and device for a server are provided. The method includes: dividing a utilization rate of a system main power supply into different levels in advance, and setting a GPU power control policy corresponding to a respective one of the different levels of the utilization rate of the system main power supply, wherein a suppression degree, on a computing capability of GPUs in a system, of the set GPU power control policy increases with the increase in the level of the utilization rate of the system main power supply; acquiring an actual utilization rate of the system main power supply, and determining a target utilization rate level corresponding to the actual utilization rate; and performing power supply control on the GPUs in the system according to the GPU power control policy corresponding to the target utilization rate level.

Abstract: A system includes multiple hardware circuits and protection circuitry. The multiple hardware circuits are coupled to respective power domains having respective sets of domain-specific power settings. The protection circuitry is configured to monitor requests in which one or more of the hardware circuits request transitions between the domain-specific power settings, to determine, from among multiple system-level combinations of the domain-specific power settings, a subset of system-level combinations that could potentially be traversed in performing the requested transitions, and to initiate a responsive action upon detecting that any of the system-level combinations in the subset is specified as invalid.

Abstract: A system-on-chip according to an embodiment includes a core including a header switch circuit configured to transmit a power supply voltage applied to a first power rail as a supply voltage to a second power rail and a logic circuit configured to operate based on the supply voltage from the second power rail, and a low-dropout (LDO) regulator configured to regulate a magnitude of first current output to the second power rail based on a change in the supply voltage, wherein the LDO regulator is further configured to control on/off of a plurality of first header switches included in the header switch circuit based on an amount of the change in the supply voltage.

Abstract: A control load is reduced in a fan unit capable of controlling air flow volume. The rotation speed of a fan can be changed. An air flow volume detector detects air flow volume of the fan or equivalent air flow volume that is a physical quantity corresponding to the air flow volume of the fan. A unit casing houses, therein, the fan and the air flow volume detector. A fan controller, which is a controller, controls the rotation speed of the fan. The fan controller controls the rotation speed of the fan on the basis of a command value of the air flow volume of the fan given from outside the unit and a detected value of the air flow volume or the equivalent air flow volume detected by the air flow volume detector.

Abstract: A system and method are described herein for estimating power usage of various components of a CPU and controlling voltage regulators based on the estimated power usage. The power estimates may be based on digital power meter readings at each component, on voltage information from a voltage regulator, and on other power information. This power information is transmitted over a mesh interconnect disposed throughout the CPU such that power estimation can be accurately calculated and used to control voltage regulators without being limited by external bus speeds. More of the power management processes and components may be disposed on the CPU and connected to the mesh interconnect. These power management processes include various calibrations, adjustments, and limits so as efficiently manage and use the more rapidly processed power estimations.

Abstract: An information translation device, information translation method, and an information translation system based on Modbus are provided. The client module of the information translation device receives an information model file including identity information, receives a sensor signal corresponding to first identity information and Modbus data including memory addresses of Modbus protocol, determines a first memory address corresponding to the sensor signal according to sensed values of the sensor signal and values corresponding to each of the memory addresses and builds a memory address mapping table including the first memory address and the first identity information, and receives a first value of the first memory address and searches the first identity information corresponding to the first memory address according to the memory address mapping table. The server module of the information translation device receives the first value and the first identity information and transmits to an OPC UA device.

Abstract: A method and apparatus for measuring the remaining power level of a device. The state of flag bits are detected, a password is calculated when a first flag bit is set, the password is displayed to reset the first flag bit, and the detection of the state of the flag bits is returned to; the total power consumption is calculated when a second flag bit is set, the remaining power level is updated on the basis of the total power consumption and of a second preset value, the second flag bit is reset, and the detection of the state of the flag bits is returned to. The present invention implements increased precision in measuring the remaining power level without additional component, accurately reflects the actual value of the remaining power level of a battery, and incurs no additional power consumption. This does not affect the service life of the device and is inexpensive.

Abstract: A computing device is provided, including a battery, a processor configured to receive electrical power from the battery via a voltage regulator, and one or more additional electronic components configured to receive electrical power from the battery. The computing device may further include a first current detector configured to detect a total battery discharge current. The voltage regulator may be configured to receive a first analog current signal from the first current detector, convert the first analog current signal into first digital current data, and transmit the first digital current data to the processor. The processor may be further configured to determine a difference between the total battery discharge current and an available electric current limit for the battery. In response to at least determining the difference, the processor may be further configured to adjust one or more performance parameters of the processor such that the difference is reduced.

Abstract: A method for preventing unauthorized access to information in a semiconductor device that is secured with a security protocol that uses a first portion of the information may include in response to a verified inaccessibility-inducing signal, unlocking safety lock circuitry which is operable to prevent unintentional activation of self-destruction in the semiconductor device, and initiating the self-destruction of at least a portion of the semiconductor device. A semiconductor device is configured to prevent unauthorized access to information available therein that is secured with a security protocol that uses a first portion of the information. The semiconductor device may include safety lock circuitry operable to prevent unintentional activation of self-destruction in the semiconductor device and control circuitry operable to unlock the safety lock circuitry and to initiate the self-destruction of at least a portion of the semiconductor device in response to a verified inaccessibility-inducing signal.

Abstract: An electrical signal transmission method applied to an electrical signal transmission system includes first transmission interfaces and second transmission interface(s). Electrical signal transmission modes of the electrical signal transmission system include: a first transmission mode used for controlling a total transmission power of the first transmission interfaces and the second transmission interface(s) to be less than or equal to a first preset power, and a second transmission mode used for controlling a maximum transmission power of a second transmission interface to be the first preset power. The electrical signal transmission method includes: determining whether the first transmission mode is turned on; if yes, making the total transmission power of the first transmission interfaces and the second transmission interface(s) less than or equal to the first preset power; and if no, making the maximum transmission power of the second transmission interface be a second preset power.

Abstract: Various aspects of methods, systems, and use cases include coordinating actions at an edge device based on power production in a distributed edge computing environment. A method may include identifying a long-term service level agreement (SLA) for a component of an edge device, and determining a list of resources related to the component using the long-term SLA. The method may include scheduling a task for the component based on the long-term SLA, a current battery level at the edge device, a current energy harvest rate at the edge device, or an amount of power required to complete the task. A resource of the list of resources may be used to initiate the task, such as according to the scheduling.

Abstract: An integrated meter in an electric vehicle supply equipment (EVSE) is described. Input power is received at input terminal of the EVSE and carried through a conductor that passes through an opening of a current transformer coil of the meter. The input power is split into a main path and an auxiliary path. The main path is for charging an electric vehicle (EV). The auxiliary path provides power to the meter to the EVSE itself. The auxiliary path passes through the opening of the current transformation coil in a reverse direction before being passed to a power supply of the meter and to a power supply of the EVSE to remove any current not for charging the EV from current measurements. The meter calculates energy measurements that do not include current drawn by the meter and the EVSE and transmits them to a processor of the EVSE.

Abstract: A storage system comprises one or more storage devices, power supplies supplying power to the storage device, a processor that performs in response to determining that the total power consumption of the one or more storage devices is less than a first percentage threshold of a load of the active power supplies, deactivating one or more of the active power supplies until the total power consumption is equal to or greater than the first percentage threshold of a load of each of the active power supplies, and in response to determining that the total power consumption is equal to or greater than a second percentage threshold of a load of each of the active power supplies, activating one or more of the deactivated ones of the power supplies until the total power consumption is less than the second percentage threshold of the load of each of the active power supplies.

Abstract: The handheld electronic user device default charging and data port micro USB Female connector is divided by an interface which is composed of a microchip and two micro USB Female connectors configured to separate the power transmission channel and data transmission channel to create two separate connections and then handheld electronic user device default charging and data port micro USB Female connector is replicated with the above said two micro USB Female connectors which is secured to handheld electronic user device protective case back wall outer surface away from the edges or mounted on a Popup Door which is sunk into the handheld electronic user device body through the back cover.

Abstract: According to one embodiment, a method, computer system, and computer program product for mitigating computer fan noise. The embodiment may include retrieving a previously generated baseline profile for a user participating in a real-time e-conference call via a computing device. The embodiment may include identifying real-time hardware and software metrics of the computing device. The embodiment may include calculating a current fan indicative noise (FIN) score for the call based on the baseline profile and the identified metrics. The embodiment may include determining whether the current FIN score is above a threshold value. In response to determining that the FIN score is above a threshold value, the embodiment may include determining whether the computing device is at risk of damage. In response to determining that the computing device is not at risk of damage, the embodiment may include limiting operation of one or more fans of the computing device.

Abstract: A datacenter includes a heterogeneous node group efficiency management system that is coupled to node devices and that, based on a power consumption and performance associated with each node device, generates node group rankings that it uses to group subsets of the node devices into respective heterogeneous node groups. The heterogeneous node group efficiency management system then identifies workload characteristic(s) and performance requirement(s) for a workload provided for deployment, identifies a first heterogeneous node group that satisfies the performance requirement for the workload, and identifies first node device(s) that are included in the first heterogeneous node group and that are configured to perform the first workload having the workload characteristic(s) with a higher power efficiency than second node device(s) that are included in the first heterogeneous node group.

Abstract: A control method of a power supply path includes detecting a plug-in state of a first connector through a configuration channel pin of the first connector; acquiring a plurality of rated voltages of a first power adaptor externally connected to the first connector and a rated current corresponding to each of the rated voltages; detecting a plug-in state of a second connector through a direct-current (DC) input pin of the second connector; acquiring a power quota of a second power adaptor externally connected to the second connector; selecting, from the plurality of rated voltages, the largest one that is not greater than an operating voltage, as a selected rated voltage; calculating a power quota of the selected rated voltage; and controlling a switching circuit to couple a power circuit to a power pin of one of the first and second connectors according to the two power quotas.

Abstract: A memory sprint controller, responsive to an indicator of an irregular memory access phase, causes a memory controller to enter a sprint mode in which it temporarily adjusts at least one timing parameter of a dynamic random access memory (DRAM) to reduce a time in which a designated number of activate (ACT) commands are allowed to be dispatched to the DRAM.

Abstract: Power sourcing equipment (“PSE”) can temporarily suspend or indefinitely disable powered devices (“PDs”) exhibiting faults for more efficient resource utilization and preservation of the PSE hardware. The PSE maintains a first counter for each connected PD that indicates a count of fault events detected for the PD. Upon detecting a count of fault events for a PD within a designated time period that exceeds a first threshold, the PSE suspends the PD and increments a second counter maintained for the PD that indicates how many times the PD has been suspended. The PSE suspends processing of/responding to communications received from the suspended PD for the duration of the suspension. Subsequent fault detection and suspension for the PD can continue until the suspension count of the PD exceeds a second threshold, which triggers disabling of the faulty PD by discontinuing processing of/responding to communications received from the PD indefinitely.

Abstract: A method including determining types of radio access technologies supported by the apparatus, wherein the apparatus supports at least two types of radio access technologies, providing inputs to machine learning models, wherein the machine learning models include a corresponding machine learning model to each type of radio access technology, and for each type of radio access technology parameters associated with that type of radio access technology are provided as an input to the corresponding machine learning model, and obtaining, for each type of the radio access technologies, a power consumption estimate provided by the corresponding machine learning model.

Abstract: A system that includes memory and a microcontroller including an analog-to-digital converter (ADC) and in communication with the memory. The microcontroller is configured to define a fingerprint that includes a baseline measurement of side-channel traces of a side-channel retrieved from the ADC, during an enrollment period of the system, wherein the enrollment period includes measuring voltage prior to runtime operation, receive a runtime measurement from the ADC that includes voltage of at least the separate microcontroller during runtime, compare the runtime measurement to the fingerprint, and in response to the measurement exceeding a threshold, executing a countermeasure operation against software ran by the separate processor.

Abstract: Methods, systems, and devices for programming power management circuits in a system are described. An apparatus may include a set of one or more power management circuits configured to provide one or more operating voltages for the apparatus. The apparatus may also include an interface coupled with a controller via a bus. The apparatus may include a first switching circuit configured to isolate the bus from the controller and to couple the bus with a second switching circuit. The second switching circuit may be configured to isolate the set of one or more power management circuits from the controller and to couple the set of one or more power management circuits with the first switching circuit.

Abstract: Various embodiments include a method for regulating an electrical power transfer between two power supply units and a power consumption unit comprising: providing a first data set with information regarding a minimum and maximum electrical power supply rate for each of the two power supply units; providing a second data set with information regarding a power requirement of the power consumption unit and a weighting of each of the power supply units; providing a target function for an optimization method, wherein the target function includes the first data set, the second data set, and the weightings of the power supply units as parameters; and regulating the power transfer by means of an extremalization of the target function.

Abstract: An example non-transitory computer-readable medium includes instructions to monitor a time-averaged power consumption of a computing device that includes a plurality of power-consuming components including a processor, and compare the time-averaged power consumption to a first threshold to detect if the time-averaged power consumption exceeds the first threshold. In response to detecting that the time-averaged power consumption of the computing device exceeds the first threshold, the instructions are to decrease an operational power of the processor from a normal operating power, and start monitoring an instantaneous power consumption of the computing device to determine whether to make a further decrease or an increase to the operational power of the processor.

Abstract: Devices, systems, and methods for measuring a power consumption of a hot pluggable solid-state drives are described. An example method for measuring a power consumption of a solid-state drive communicatively coupled to a server backplane within a server chassis includes performing, by an adaptor, a power measurement to generate a value corresponding to the power consumption of the solid-state drive, and transmitting, using a wireless transceiver of the adaptor, the value to a recording unit, where a first end of the adaptor is coupled to the solid-state drive and a second end of the adaptor is coupled to the server backplane, and where the wireless transceiver, communicatively coupled to an antenna, is configured to operate using at least one wireless protocol.

Abstract: There are realized a vehicle control device and an electronic control system with high reliability capable of safely shifting control even when an operation abnormality occurs in a sensor around a vehicle or an arithmetic block that processes sensor fusion. The vehicle control device includes a first arithmetic block which performs sensor fusion processing based on pieces of raw data output from a plurality of surrounding environment sensors, a second arithmetic block which performs sensor fusion processing based on pieces of object data generated by processing the pieces of raw data output from the plurality of surrounding environment sensors, and a third arithmetic block which diagnoses an output result of the first arithmetic block by using the output result of the first arithmetic block and an output result of the second arithmetic block.

Abstract: Systems and methods are provided for managing prefetching operations for read requests for drives in a distributed storage system. For example, a system can determine that a first drive of a plurality of drives is powered on. Prior to receiving a read request for reading a first set of data from the first drive, the system can enable a prefetching operation for prefetching the first set of data from the first drive to be written to a cache. The system may power off the first drive. The system may receive a read request for reading the first set of data from the first drive of a plurality of drives. In response to receiving the read request, the system may read the first set of data from the cache.

Abstract: A drive box includes a power source, a drive group which is constituted of a plurality of storages, a canister which can be replaced, and a midplane which couples the canister and the drive group, wherein the midplane includes a storage apparatus having a memory unit in which data related to at least the drive group is stored, the canister has a communication channel which is coupled to at least one of the plurality of storages, the canister performs I2C communication with the storage apparatus, power is supplied to the canister from the power source by a first supply line which is a power line passing through the midplane, and power is supplied to the storage apparatus from the power source via the canister.

Abstract: The present disclosure relates to an image processing device and method capable of suppressing an increase in load of decoding processing. A secondary transform identifier is set such that secondary transform is performed only in a case where information regarding a block size is equal to or less than a predetermined threshold value, secondary transform is performed on coefficient data derived from image data on the basis of the secondary transform identifier set, and the secondary transform identifier set is encoded and a bitstream is generated. The present disclosure can be applied, for example, to an image processing device, an image encoding device, an image decoding device, an information processing device, an electronic device, an image processing method, an information processing method, and the like.