Chua's circuit and it's use in hyperchaotic circuit

Abstract

The present invention provides an improved Chua's circuit providing current mode operation, access to all state variables, minimum use of grounded passive elements, and freedom from passive component matching comprising a dual output current conveyer based inductor having one grounded terminal, a capacitor connected across the second terminal of said inductor, a resistor having one terminal connected to the second terminal of said inductor, the second terminal of said resistor connected to one terminal of a second capacitor the other end of which is grounded, and a pair of dual output current conveyers connected together to form a 2-terminal negative resistance having one terminal connected to ground and the second terminal connected to the second terminal of said resistance.

Description

FIELD OF THE INVENTION

The invention relates to an improved Chua's circuit more particularly, the invention relates to a Chua's circuit using a Dual Output Current Conveyer (DO-CC II). The invention also implements Chua's circuit using Multiple Output Current Conveyor (MO-CCII) and uses the said designed circuit to generate a hyperchaotic circuit.

BACKGROUND OF THE INVENTION

FIG. 1 shows a generalized Chua's circuit that has a parallel combination of a capacitor, C₂, a Chua's diode, connected to an L-C tank circuit that consists of a second capacitor C₁ connected in parallel with a serially connected inductor, L₁. In addition, a first voltage, V₁ is defined across capacitor C₁ and second voltage, V₂ defined across capacitor C₂ with the positive orientation of voltages V₁ and V₂ both being at the positive end of the corresponding capacitor. Finally, there is a linear resistor R₁ connected between the positive terminals of each capacitor.

In a typical configuration, the non-linear curve is piece-wise linear with symmetrical slope discontinuities around current axis. It satisfies the following equation I_R=G_aV_R+(½)(G_a−G_b){|v_R+B_p|−|v_R−B_p|} where G_a and G_b are the slopes of respective linear portions of piece-wise linear current/voltage curve characterizing the nonlinear resistor and B_p is the absolute value of the two voltage points at which discontinuities in the current/voltage curve lie as shown in FIG. 2. The circuit has a circuit driving subsystem, a L-C tank circuit, and a response subsystem with a parallel combination of capacitor and non-linear resistor interconnected through resistor.

By choosing values of R, L, C₁ and C₂, the circuit can operate in different operating regions for example double scroll region. Herein Chua's circuit can be made that will oscillate chaotically or quasi-periodically. Given a specified physical configuration and a specified initial state specified by V₁, V₂ and I_L the voltage across the capacitors C₁ and C₂ and the current through the inductor L, the evolution of Chua's circuit is deterministic, but chaotic. That is any Chua's circuit with the same physical parameters and initial conditions will follow the same course of states over time and this course will repeat itself over a very long period. However, to an observer it looks mainly like a noise. Also, systems trajectory is sensitive to initial conditions. In addition, the power spectral density function is spread over a wide range of frequencies, with the peak frequency of the fundamental being governed by L-C tank circuit.

Owing to its simple circuitry, ability to demonstrate most well known routes to chaos, Chua's Circuit and Chua's Oscillator is an active topic of research in the study of non-linear dynamical circuit and systems. Recently, there has been an increasing interest in designing inductor-less Chua's circuit and Chua's oscillator. Moreover, owing to advantages, the attainability of all the three state variables of CC/CO is also attracting the designers. Simultaneously literature is also witnessing the shift of analog integrated circuit designing from voltage mode processing to current-mode processing (CMP). A number of chaotic circuits have been implemented using current-mode active building blocks. Dual-Output Current Conveyor (DO-CC II) is also emerging as a versatile block to implement current-mode circuits.

To improve the performance of the circuit different researchers have done extensive research. A paper by Kennedy M. P. [Kennedy M. P.; ‘Robust op-amp realization of Chua's circuit’, Frequenz, 1992, 46, pp. 66-80.] suggests a Chua's circuit using off shelf components. Further, in another research paper by Torres, L. A. B. and Aguirre, L. A. [Torres, L. A. B. and Aguirre, L. A.; Inductorless Chua's circuit, Electron. Lett., 2000, 36, (23), pp. 1915-1916.] report a Chua's circuit using operational amplifier to generate Chua's oscillation at very low frequency that is claimed to be used for bio-medical operations.

In a design proposed by Morgul, O. [Morgul, O.; ‘Inductorless realization of Chua's oscillator’, Electron. Lett., 1995, 31, pp. 1403-1404.] synthetic inductors (using op-amps) were used along with the operational amplifier thereby making design suitable for monolithic implementation.

Senani R. and Gupta S. S. [Senani R. and Gupta S. S.; ‘Implementation of Chua's chaotic circuit using current feedback op-amps’, Electron. Lett., 1998, 34, (9), pp. 829-830.] proposed Chua's circuit using Current Feedback Operational Amplifier (CFOA) thus making available the third state variable through the inductor (i_L).

In another architecture designed by Elwakil A. S. and Kennedy M. P. [Elwakil A. S. and Kennedy M. P.; ‘Improved implementation of Chua's chaotic oscillator using current-feedback op-amp’, IEEE Trans. CAS-I, 2000, 47, (1), pp. 76- 79.] CFOA was efficiently used in Chua's circuit to provide a higher bandwidth of chaotic signal with buffered output of one state variable.

All the above architectures individually provide some or the other advantage of Chua's circuit but so far there is no circuit that simultaneously provides:

• • 1. Current mode operation;
  • 2. Use of minimum grounded passive elements;
  • 3. Availability of all the state variables;
  • 4. Availability of two state variables in form of current which further can be used further to generate other complex chaotic circuits;
  • 5. A circuit idea free from passive component matching;
  • 6. Use of lesser active components as compared to prior art 2.
  • 7. Generation of reduced hardware higher order chaotic circuit (also called hyper-chaotic circuit) using one of the available current mentioned in 4 above.

Thus it is observed that there is a need to develop a circuit that can provide above all simultaneously.

Background of Application in Generating Hyper Chaos

Chua's circuit apart from being a device for demonstrating, studying and modeling chaotic real world system, has been proposed to generate hyperchaotic circuit [T. Kapitaniak, L. O. Chua and G. Zhong, ‘Experimental Hyperchaos in Coupled Chua's Circuits’, IEEE Trans. CAS-I, Vol 41, No.7, July 1994]. Referring to FIG. 3, it has been shown in ‘T. Kapitaniak, L. O. Chua and G. Zhong, ‘Experimental Hyperchaos in Coupled Chua's Circuits’, IEEE Trans. CAS-I, Vol 41, No.7, July 1994’ that if a Chua's (100) is coupled to a similar Chua's circuit (101) such that the non-ground terminal of inductor is connected to the input of a voltage buffer (10) whose output is connected to one of the terminal of controlling resistor (11) and another end of the controlling resistor is connected the non grounded terminal of another Chua's circuit (101), the system coupling is achieved by interconnecting ‘n’ Chua's circuit in the fashion described above and the last Chua's circuit of the ring is either connected to the first Chua's circuit (100) or is left open. This type of coupling results in the following cases:

For the value of controlling resistor greater than specific value (called threshold value), all the Chua's circuit will synchronize with each other. This value of controlling resistor depends on the number of Chua's circuit used in the chain. During this state the curve between the state variable of one Chua's circuit to the corresponding state variable in another Chua's circuit of the chain will be a straight line.

For the value of controlling resistor lesser than specific value (called threshold value), the Chua's circuit will loose synchronization with each other and the system will undergo a state of hyper-chaos, which is more sensitive to the initial condition. This value of controlling resistor depends on the number of Chua's circuit used in the chain. During this state the curve between the state variable of one Chua's circuit to the corresponding state variable in another Chua's circuit of the chain will not be a straight line.

With such a proposal, a monolithic implementation of the hyperchaotic circuit can be achieved by using any of the above-mentioned variants of Chua's circuit (i.e. prior arts of Chua's circuit can be used to generate the hyperchaotic circuit using the above described scheme). However, use of any of these circuits will not only add the disadvantage of those proposal of Chua's circuit but also one voltage buffer and one floating resistor per coupling is required which in turn make the final circuit bulky and inefficient in terms of power consumption.

OBJECT AND SUMMARY OF THE INVENTION

The object of the invention is to obviate above and other drawbacks associated with the prior arts.

It is an object of the invention to design Chua's circuit using four Dual Output Current Conveyor (DO-CCII), two grounded resistors, three grounded capacitors and three floating resistors.

Another object of the invention to use minimum grounded elements used so far.

Yet another object of the invention is to have voltage across inductor in the form of current for current mode processing of the system without extra hardware requirement.

Further object of the invention to derive a Chua's diode using two grounded resistors, two floating resistors and two MOCCIIs.

Yet another object of the invention to derive a Chua's diode using two grounded resistors, two floating resistors and two DOCCIIs.

Further object of the invention to achieve current through Z-terminal of DOCCII and MOCCII used in designing non-linear resistor.

Yet another object of the invention to design Chua's circuit using Multiple Output Current Conveyor.

Further object of the invention to achieve grounded controlling resistor for hyper-chaotic system designed by coupling of Chua's circuit which is done by using the above derived current of voltage across inductor.

According to one embodiment an improved Chua's circuit is provided while according to another embodiment, the CCII presented in [Seguin F. and Fabre A.; ‘New second generation current conveyor with reduced parasitic resistance and band-pass filter application’, IEEE Trans. CAS-I, 2001, 48,(6), pp. 781- 785] is modified to achieve a DOCCII and MOCCII as shown in FIG. 4. The schematic diagram of MOCCII and DOCCII used to further design Chua's chaotic circuit and it's coupling is as shown in FIG. 4B.

According to yet another embodiment, the above said DOCCII based Chua's circuit can be implemented using MOCCII based Chua's circuit as shown in FIG. 5.

To achieve above objectives present invention provides an improved Chua's circuit providing current mode operation, access to all state variables, minimum use of grounded passive elements, and freedom from passive component matching comprising;

• • a multiple output current conveyer based inductor having one grounded terminal,
  • a capacitor connected across the second terminal of said inductor,
  • a resistor having one terminal connected to the second terminal of said inductor,
  • the second terminal of said resistor connected to one terminal of a second capacitor the other end of which is grounded, and
  • a pair of multiple output current conveyers connected together to form a 2-terminal negative resistance having one terminal connected to ground and the second terminal connected to the second terminal of said resistance.

The said multiple output current conveyers are the multiple output (second generation) current conveyer (MO-CC II).

The said inductor comprises two multiple output current conveyers having their x terminals grounded through resistors, a capacitor having one terminal grounded and its second terminal connected to the z_P1 terminal of the second multiple output current conveyer and in parallel to the y terminal of the first multiple output current conveyer while the y terminal of the second multiple output current conveyers and the z_N1 terminal of the first multiple output current conveyers of are joined together and which acts as one of the terminal of simulated grounded inductance.

The said 2-terminal negative resistance circuit comprises two multiple output current conveyers having their x terminals grounded through resistors and their y terminals connected together and to the z_P1 terminals of both multiple output current conveyers through two different resistors.

An improved Chua's circuit providing current mode operation, access to all state variables, minimum use of grounded passive elements, and freedom from passive component matching comprising;

• • a dual output current conveyer based inductor having one grounded terminal,
  • a capacitor connected across the second terminal of said inductor,
  • a resistor having one terminal connected to the second terminal of said inductor, the second terminal of said resistor connected to one terminal of a second capacitor the other end of which is grounded, and
  • a pair of dual output current conveyers connected together to form a 2-terminal negative resistance having one terminal connected to ground and the second terminal connected to the second terminal of said resistance.

The said dual output current conveyer is a dual output (second generation) current conveyer.

The said inductor comprises two dual output current conveyers having their x terminals grounded through resistors, a capacitor having one terminal grounded and its second terminal connected to the z₊ terminal of the second dual output current conveyer and in parallel to the y terminal of the first dual output current conveyer while the y terminal of the second dual output current conveyers and the z terminal of the first dual output current conveyers of are joined together and which acts as one of the terminal of simulated grounded inductance.

The said 2-terminal negative resistance circuit comprises two dual output current conveyers having their x terminals grounded through resistors and their y terminals connected together and to the z₊ terminals of both dual output current conveyers through two different resistors.

An improved Chua's circuit for use in a hyperchaotic circuit comprising a plurality of said Chua's circuit symmetrically coupled together to enable monolithic implementation of hyperchaotic circuit.

A method for improving a Chua's circuit to provide current mode operation, access to all state variables, minimum use of grounded passive elements, and freedom from passive component matching comprising the steps of:

• • simulating a grounded inductor using a multiple output current conveyer,
  • connecting a capacitor connected across the second terminal of said inductor,
  • connecting one terminal of a resistor to the second terminal of said inductor,
  • connecting the second terminal of said resistor to one terminal of a second capacitor the other end of which is grounded, and
  • providing a 2-terminal negative resistance device using a pair of multiple output current conveyers.

BRIEF DESCRIPTION OF THE INVENTION WITH ACCOMPANYING DRAWINGS

The invention will now be described with reference to the accompanying drawings.

FIG. 1 shows the generalized Chua's circuit diagram

FIG. 2 shows the response of non-linear resistor (Chua's diode)

FIG. 3 shows the coupling of Chua's circuit

FIG. 4 shows the implementation of MOCCII

FIG. 5 shows the block diagram schematic of DOCCII and MOCCII

FIG. 6A shows the DOCCII based inductor

FIG. 6B shows the MOCCII based inductor

FIG. 7A shows the DOCCII based non-linear negative resistor

FIG. 7B shows the MOCCII based non-linear negative resistor

FIG. 8 shows the characteristic of thus designed non-linear negative resistor

FIG. 9A shows the implementation of Chua's diode using DOCCII.

FIG. 9B shows the implementation of Chua's diode using MOCCII.

FIG. 10 shows the Chua's circuit using DOCCII

FIG. 11 shows the Chua's circuit using MOCCII and it's block schematic

FIG. 12 shows Double Scroll attractor derived from MOCCII based Chua's Circuit

FIG. 13 shows the block schematic of MOCCII based hyperchaotic circuit

FIG. 14 shows the simulation results of hyperchaotic circuit validating the theory.

DETAILED DESCRIPTION OF THE INVENTION

The present invention provides a Chua's circuit using Dual Output (second-generation) Current Conveyer (DO-CC II) as one embodiment. It also provides Chua's circuit implementation using Multiple Output Current Conveyor and further it provides the design of a hyperchaotic circuit using Multiple Output Current Conveyor based Chua's circuit as other embodiments.

FIG. 1 has already been discussed under the section “background of the invention”.

FIG. 2 has also been discussed under the section “background of the invention”

FIG. 3 shows the coupling of ‘n’ Chua's circuit to achieve synchronization. The system thus formed is used to solve the following set of equations $C_1\frac{d{v}_{C_1}^{\left(1\right)}}{dt}=G\left(v_{C_2}^{\left(1\right)}-v_{C_1}^{\left(1\right)}\right)-f\left(v_{C_1}^{\left(1\right)}\right)$ $C_2\frac{d{v}_{C_2}^{\left(1\right)}}{dt}=G\left(v_{C_1}^{\left(1\right)}-v_{C_2}^{\left(1\right)}\right)+i_L^{\left(1\right)}+f\left(v_{C_1}^{\left(1\right)}\right)+\frac{1}{R_K}\left(v_{C_2}^{\left(2\right)}-v_{C_2}^{\left(1\right)}\right)$ $L\frac{d{v}_L^{\left(1\right)}}{dt}=-v_{C_2}^{\left(1\right)}$ $C_1\frac{d{v}_{C_1}^{\left(2\right)}}{dt}=G\left(v_{C_2}^{\left(2\right)}-v_{C_1}^{\left(2\right)}\right)-f\left(v_{C_1}^{\left(2\right)}\right)$ $C_2\frac{d{v}_{C_2}^{\left(2\right)}}{dt}=G\left(v_{C_1}^{\left(2\right)}-v_{C_2}^{\left(2\right)}\right)+i_L^{\left(2\right)}+f\left(v_{C_1}^{\left(2\right)}\right)+\frac{1}{R_K}\left(v_{C_2}^{\left(3\right)}-v_{C_2}^{\left(2\right)}\right)$ $L\frac{d{v}_L^{\left(2\right)}}{dt}=-v_{C_2}^{\left(2\right)}$ $⋮$ $C_1\frac{d{v}_{C_1}^{\left(n\right)}}{dt}=G\left(v_{C_2}^{\left(n\right)}-v_{C_1}^{\left(n\right)}\right)-f\left(v_{C_1}^{\left(n\right)}\right)$ $C_2\frac{d{v}_{C_2}^{\left(n\right)}}{dt}=G\left(v_{C_1}^{\left(n\right)}-v_{C_2}^{\left(n\right)}\right)+i_L^{\left(n\right)}+f\left(v_{C_1}^{\left(n\right)}\right)+\frac{1}{R_K}\left(v_{C_2}^{\left(n+1\right)}-v_{C_2}^{\left(n\right)}\right)$ $L\frac{d{v}_L^{\left(n\right)}}{dt}=-v_{C_2}^{\left(n\right)}$

The dynamics of the system is dependent on the controlling resistor R_K. This aspect has been discussed in prior art.

FIG. 4 shows the implementation of Multiple Output Current Conveyor which has been designed to by modifying the current conveyor proposed in [Seguin F. and Fabre A.; ‘New second generation current conveyor with reduced parasitic resistance and band-pass filter application’, IEEE Trans. CAS-I, 2001,48,(6), pp. 781-785]. Herein one additional output z− is taken by using current mirrors. This scheme then corresponds to implementation of DOCCII. Further, herein two additional outputs, one similar in behavior to Z+ and one similar in behavior to z− have been added. The final scheme as shown in figure realizes MOCCII.

FIG. 5 shows a schematic block diagram of DO-CC II and MOCCII. The DO-CC II has six terminals. Terminals VSS and VDD are the supply voltage terminals while the terminals x, y, z+ and z− allow different voltages and current to flow in and out of the circuit. A basic DO-CC II has a current mirror circuit that reflects the current of terminal x in the terminal z+. The magnitude of the current through in z− terminal and the, current through the z+ terminal is the same except for their directions. Also the voltages at the terminals x and y are the same and the current through the terminal y is zero. This can be represented in following equations.
v_X=v_Y  (1)
i_y=0  (2)
i_Z+=i_X  (3)
i_Z−=−i_X  (4)

Where the subscript with current I and voltage V represents currents and voltages in the respective terminals of the DO-CC II.

Further, the MO-CC II has eight terminals. Terminals VSS and VDD are the supply voltage terminals while the terminals x, y, zp1, zp2 and zn1 and zn2 allow different voltages and currents to flow in and out of the circuit.

A basic MO-CC II has a current mirror circuit that reflects the current of terminal x in the terminal zp1. The magnitude of the current through in zn1 terminal and the current through the zp1 terminal is the same except for their directions. Also the voltages at the terminals x and y are the same and the current through the terminal y is zero. Further zp1 and zp2 show similar behavior in terms of current movement. Similarly zn1 and zn2 show similar behavior. This can be represented in following equations.
v_X=v_Y  (1)
i_y=0  (2)
i_zp1=i_X  (3)
i_zp2=−i_X  (4)
i_zn1=i_X  (5)
i_zn2=−i_X  (6)

Where the subscript with current I and voltage V represents currents and voltages in the respective terminals of the MO-CC II.

These characteristics of the DO-CC II and MO-CC II can be used to realize inductive properties as follows.

FIG. 6A shows DO-CC II based inductor. This inductor has two DO-CC II D₃ and D₄ having their x terminals grounded through the resistors R_L1, R_L2. A capacitor C_L having its one terminal grounded and second terminal coupled to z₊ terminal of DO-CC II D₃ and y terminal of DO-CC II D₄. The terminal z of D₄ and y of D₃ are joined together to connect the one terminal of the input supply.

When a voltage v is applied at node 1, a similar voltage is induced at node 2 that is at the x terminal of D₃ according to the equation 1 of DO-CC II. Hence resulting in current i₂ through the resistor R_L2 given by
i₂=v/R_L2.

Because of the relations 3 and 4, current through terminal x is reflected at terminals L and z₊ accordingly. Thus producing a voltage across the capacitor C_L which is seen by the y terminal of D4 and is given by $v_3=\int \frac{v}{C_L{R}_{\mathrm{L2}}}dt$

The voltage V₃ is then induced at the x terminal of D₄ according to the relation 1 thus causing a current i5 through resistor R_L1 that is then, reflected in the terminals z+ and z− of D4. The current i5 through the resistor R_L1 can be given as $i_5=\frac{v_3}{R_{\mathrm{L1}}}=\int \frac{v}{C_L{R}_{\mathrm{L2}}{R}_{\mathrm{L1}}}dt$

From FIG. 2 it is clear that the current i₅=i_L because of the relation 2, thus $i_L=\int \frac{v}{C_L{R}_{\mathrm{L2}}{R}_{\mathrm{L1}}}dt$

From above following equation can be written: $C_L{R}_{\mathrm{L1}}{R}_{\mathrm{L2}}\frac{d{i}_L}{dt}=v$

The characteristic equation of an inductor is given by: $L\frac{d{i}_L}{dt}=v$

On comparing above two equations we get:
L=C_LR_L1R_L2

Thus it can be said that the circuit shown is FIG. 6A is equivalent to an inductor of value determined by L=C_LR_L1R_L2. Further it is important to note that the circuit provides terminals z+ and z− of D₄ and D₃ respectively to tap current flowing through the inductor and the voltage across capacitor (of tank circuit) in the form of current. To be specific, whereas D₃ provides voltage across capacitor in the form of current, current through the inductor is available at z₊ terminal of D₄.

Similar results can be achieved by using MOCCII by replacing terminal x of DOCCII by terminal x of MOCCII, y of DOCCII by terminal y of MOCCII, z+ of DOCCII by terminal z1+ of MOCCII, z− of DOCCII by terminal z1− of MOCCII, VDD of DOCCII by terminal VDD of MOCCII, VSS of DOCCII by terminal VSS of MOCCII and rest of the terminals of MOCCII i.e. z2+ and z2− remaining floating. Thus MOCC II based inductor is also realized as shown in FIG. 6B.

FIG. 7A shows a schematic block diagram of DOCC II based negative resistor. The DOCC II has its x terminal connected to a resistance R3 whose other terminal is connected to ground and has a resistance R1 connected between its z+ and y terminals.

A Dual Output Current Conveyer based non-linear device basically works in three different regions as depicted in IV Characteristics shown in FIG. 8. The region of operation can be classified as follows:

Negative saturation region is the region when the input voltage to this non-linear device is highly negative with respect to ground while the positive saturation region, when the input voltage to this non-linear device is highly positive with respect to ground. The input voltage is the voltage applied at the y terminal of the non-linear device described in FIG. 7A. The Linear region is when the input voltage to this non-linear device is comparable to supply voltage.

In the negative or positive saturation regions when the input voltages are either highly negative or positive, the z₊ terminal of the DOCCII assumes a constant voltage (negative or positive respectively) thus allowing a current to flow through the resistance R3 exhibiting positive resistive properties beyond a Break point (Bp) shown in FIG. 8.

In the linear region when the input voltage is comparable to the supply voltage, the current flowing inside z₊ terminal equals current through x terminal according to the relation 3. Also the voltage at the x terminal and the voltage at the y terminals are similar as per the relation 1 for a DOCCII. Thus current through the input supply terminal i_in is equal to the current through resistor R3 and hence the current ix through the terminal x. Thus the voltage at the terminal y can be given as:
v_y=−i_x*R3
Or
i_x/v_y=−1/R3=m₁

Where m₁ is the slope in the linear region.

Owing to its linearity in the three regions, positive linearity in positive and negative saturation region and negative linearity in linear region, the non-linear device behaves as a non-linear resistor with positive resistance at the positive and negative saturation region and negative resistance in the linear region.

Hence the DOCC II of FIG. 7A exhibits a negative resistance in the linear region as shown in corresponding I-V Characteristics in the FIG. 8.

Similar results can be achieved by using MOCCII by replacing terminal x of DOCCII by terminal x of MOCCII, y of DOCCII by terminal y of MOCCII, z+ of DOCCII by terminal zp1 of MOCCII, z− of DOCCII by terminal zn1 of MOCCII, VDD of DOCCII by terminal VDD of MOCCII, VSS of DOCCII by terminal VSS of MOCCII and rest of the terminals of MOCCII i.e. zp2 and zn2 remaining floating. Thus MOCC II based negative resistor is also realized as shown in FIG. 7B.

FIG. 9A shows two DOCC II connected in parallel to achieve a variable slope in the linear region and specified break point as required for the Chua's circuit. The total conductance of parallel combination of the two DOCC II is a linear addition of the individual conductance of each DOCC II. Thus I-V characteristics of the parallel combination exhibit a variable slope as shown in FIG. 2. Note that this type of non-linear resistor is also called as Chua's diode.

Similar results can be achieved by using MOCCII by replacing terminal x of DOCCII by terminal x of MOCCII, y of DOCCII by terminal y of MOCCII, z+ of DOCCII by terminal zp1 of MOCCII, z− of DOCCII by terminal zn1 of MOCCII, VDD of DOCCII by terminal VDD of MOCCII, VSS of DOCCII by terminal VSS of MOCCII and rest of the terminals of MOCCII i.e. zp2 and zn2 remaining floating. Thus MOCC II based Chua's diode is also realized as shown in FIG. 9B.

Without limiting the scope of the invention to the discussed embodiment and the values thereof, the invention will now be discussed with reference to circuit shown in FIG. 10. A person skilled in art will appreciate that the invention can also be practiced with other embodiments without deviating from the concept described hereinafter.

FIG. 10 shows a schematic block diagram of a Chua's circuit according to one embodiment of the present invention. The circuit shown is basically a current mode implementation of Chua's circuit using a Dual Output second generation Current Conveyor. The Chua's chaotic circuit according to the present invention comprises four Dual Output Second Generation Current Conveyor D1, D2, D3 and D4. The DO-CC II D3 and D4 forming an inductor as described in FIG. 3 and D1, D2 forming a non-linear component as described in the FIG. 9A. The capacitors C₁ and C₂ are the first and second energy storing elements of the Chua's circuit and are connected to y terminals of D₃, D₂ respectively. Resistor R is the passive component of the Chua's circuit and is connected to the y terminals of the D₃ and D₂. The terminals y of the D₁ and D₂ are coupled together and the terminals x of the D₁ and D₂ are connected to the ground through resistive load R₄ and R₃. The terminals z+ of D₁ and D₂ are connected to their y terminals through resistances R₁ and R₂ and the y terminals of the D₂ and D₁ are connected as shown in FIG. 9A.

For this Chua's circuit the equation can be written as: $C_2\frac{d{V}_2}{dt}=\frac{1}{R}\left(V_1-V_2\right)-g\left(V_1\right)$ $C_1\frac{d{V}_1}{dt}=\frac{1}{R}\left(V_2-V_1\right)+i_L$ $C_L{R}_{\mathrm{L1}}{R}_{\mathrm{L2}}\frac{d{i}_L}{dt}=-V_1$
where, $g\left(V_1\right)=m_0{V}_1+\frac{1}{2}\left(m_0-m_1\right)\left[V_1+B_p-V_1-B_p\right]$

The value of m₀ and m₁ are determined by resistor values R1, R2, R3, R4 and the supply VSS1, VSS2, VDD1, VDD2.

FIG. 12 shows the results obtained by simulations of the above Chua's circuit for values selected as follows. This is called the double scroll-operating region.

Non Linear Resistance:

R₁=190 Ω, R₂=25.6 kΩ, R₃=2 kΩ, R₄=2.2 kΩ and VSS₁=−7V, VDD₁=7.8V VSS₂=−7.8V VDD₂=7V

Inductor:

C_L=100 nF, R_L1=400 Ω, R_L2=400 Ω.

Other Components:

C₁=100 nF, C₂=10 nF R=1.550k.

Similar results can be achieved by using MOCCII by replacing terminal x of DOCCII by terminal x of MOCCII, y of DOCCII by terminal y of MOCCII, z+ of DOCCII by terminal z1+ of MOCCII, z− of DOCCII by terminal z1− of MOCCII, VDD of DOCCII by terminal VDD of MOCCII, VSS of DOCCII by terminal VSS of MOCCII and rest of the terminals of MOCCII i.e. z2+ and z2− remaining floating. Thus MOCC II based Chua's Circuit is also realized as shown in FIG. 11.

As described earlier the Chua's circuit can be coupled by using one voltage buffer and one floating resistor using the scheme presented in FIG. 2. Herein it is actually solving the following equations of the system $C_1\frac{d{v}_{C_1}^{\left(1\right)}}{dt}=G\left(v_{C_2}^{\left(1\right)}-v_{C_1}^{\left(1\right)}\right)-f\left(v_{C_1}^{\left(1\right)}\right)$ $C_2\frac{d{v}_{C_2}^{\left(1\right)}}{dt}=G\left(v_{C_1}^{\left(1\right)}-v_{C_2}^{\left(1\right)}\right)+i_L^{\left(1\right)}+f\left(v_{C_1}^{\left(1\right)}\right)+\frac{1}{R_K}\left(v_{C_2}^{\left(2\right)}-v_{C_2}^{\left(1\right)}\right)$ $L\frac{d{v}_L^{\left(1\right)}}{dt}=-v_{C_2}^{\left(1\right)}$ $C_1\frac{d{v}_{C_1}^{\left(2\right)}}{dt}=G\left(v_{C_2}^{\left(2\right)}-v_{C_1}^{\left(2\right)}\right)-f\left(v_{C_1}^{\left(2\right)}\right)$ $C_2\frac{d{v}_{C_2}^{\left(2\right)}}{dt}=G\left(v_{C_1}^{\left(2\right)}-v_{C_2}^{\left(2\right)}\right)+i_L^{\left(2\right)}+f\left(v_{C_1}^{\left(2\right)}\right)+\frac{1}{R_K}\left(v_{C_2}^{\left(3\right)}-v_{C_2}^{\left(2\right)}\right)$ $L\frac{d{v}_L^{\left(2\right)}}{dt}=-v_{C_2}^{\left(2\right)}$ $⋮$ $C_1\frac{d{v}_{C_1}^{\left(n\right)}}{dt}=G\left(v_{C_2}^{\left(n\right)}-v_{C_1}^{\left(n\right)}\right)-f\left(v_{C_1}^{\left(n\right)}\right)$ $C_2\frac{d{v}_{C_2}^{\left(n\right)}}{dt}=G\left(v_{C_1}^{\left(n\right)}-v_{C_2}^{\left(n\right)}\right)+i_L^{\left(n\right)}+f\left(v_{C_1}^{\left(n\right)}\right)+\frac{1}{R_K}\left(v_{C_2}^{\left(n+1\right)}-v_{C_2}^{\left(n\right)}\right)$ $L\frac{d{v}_L^{\left(n\right)}}{dt}=-v_{C_2}^{\left(n\right)}$

Here n is taken to be equal to 5. RK is the controlling resistor whose value describes the behavior of the entire system.

Present invention tries to achieve the solution of above equations without any additional hardware by proposing the scheme as shown in FIG. 13.

Referring to FIG. 13, 11 of Chua's circuit (100) is connected to 17 of same Chua's circuit 100, 11 of Chua's circuit is also connected to 18 of next Chua's circuit (101), similarly 18 of Chua's circuit (100) is connected with 11 of previous Chua's circuit (99), thereby forming a ring using several Chua's circuit connected in similar and symmetric fashion. RL2 of each Chua's circuit acts as a controlling resistor and the coupling is achieved without additional resistor or voltage buffer. The additional advantage of the present proposal of hyper chaotic circuit is that the controlling resistor is grounded and hence can be beneficial in easy monolithic implementation.

For the above stated values of components and RL1=300 Ohm and RL2=600 ohm for Chua's circuit designed using MOCCII and using similar Chua's circuit for coupling with the scheme as shown in FIG. 13, the system of FIG. 13 thus derived is a hyperchaotic. This is proved by the fact that none of the Chua's circuit is in synchronization with each other as is reflected by the simulation results shown in FIG. 14.

Advantages

A DOCCII/MOCCII based implementation of Chua's circuit is presented. The circuit has advantages of grounded resistor and capacitor, minimum active and passive component and accessibility of current across inductor. Moreover, apart from these advantages the voltage across capacitor (of tank circuit) is also available in the form of current at high impedance node. One of the applications of this current is in generating hyper-chaos in coupled Chua's circuit with reduced hardware.

The Chua's circuit uses a DOCC II/MOCC II based inductor and non-linear component that allows tapping of current through the inductor and voltage across the capacitor of tank circuit without requiring any additional hardware. The available third state variable can be observed and therefore it is possible to make more complex chaotic circuits using this additional information. Also the inductor of the present invention does not use any additional components like capacitors and resistors as compared to the prior arts.

Since the present invention does not use operational amplifiers rather it uses current conveyors it operates in the current mode. Also the invention does not require a precise component matching unlike prior arts that used op-amps for realizing Chua's circuit.

The invention also relates the use of available current in designing reduced hardware hyper-chaos circuit. The final hyper-chaotic circuit thus designed offers several advantages like minimum active and passive components for coupled Chua's circuit hyper chaotic circuit, coupling of Chua's circuit without additional hardware as voltage buffer and floating resistor, controlling resistor being grounded etc. These advantages are non-existent in case the same coupling is achieved using any of the prior art of Chua's circuit.

Claims

1. An improved Chua's circuit providing current mode operation, access to all state variables, minimum use of grounded passive elements, and freedom from passive component matching comprising;

a multiple output current conveyer based inductor having one grounded terminal,

a capacitor connected across the second terminal of said inductor,

a resistor having one terminal connected to the second terminal of said inductor,

the second terminal of said resistor connected to one terminal of a second capacitor the other end of which is grounded, and

a pair of multiple output current conveyers connected together to form a 2-terminal negative resistance having one terminal connected to ground and the second terminal connected to the second terminal of said resistance.

2. An improved Chua's circuit as claimed in claim 1 wherein said multiple output current conveyers are the multiple output (second generation) current conveyer (MO-CC II).

3. An improved Chua's circuit as claimed in claim 1 wherein said inductor comprises two multiple output current conveyers having their x terminals grounded through resistors, a capacitor having one terminal grounded and its second terminal connected to the zP1 terminal of the second multiple output current conveyer and in parallel to the y terminal of the first multiple output current conveyer while the y terminal of the second multiple output current conveyers and the ZN1 terminal of the first multiple output current conveyers of are joined together and which acts as one of the terminal of simulated grounded inductance.

4. An improved Chua's circuit as claimed in claim 1 wherein said 2-terminal negative resistance circuit comprises two multiple output current conveyers having their x terminals grounded through resistors and their y terminals connected together and to the zP1 terminals of both multiple output current conveyers through two different resistors.

5. An improved Chua's circuit providing current mode operation, access to all state variables, minimum use of grounded passive elements, and freedom from passive component matching comprising;

a dual output current conveyer based inductor having one grounded terminal,

a capacitor connected across the second terminal of said inductor,

a resistor having one terminal connected to the second terminal of said inductor, the second terminal of said resistor connected to one terminal of a second capacitor the other end of which is grounded, and

a pair of dual output current conveyers connected together to form a 2-terminal negative resistance having one terminal connected to ground and the second terminal connected to the second terminal of said resistance.

6. An improved Chua's circuit as claimed in claim 6 wherein said dual output current conveyer is a dual output (second generation) current conveyer.

7. An improved Chua's circuit as claimed in claim 6 wherein said inductor comprises two dual output current conveyers having their x terminals grounded through resistors, a capacitor having one terminal grounded and its second terminal connected to the z+ terminal of the second dual output current conveyer and in parallel to the y terminal of the first dual output current conveyer while the y terminal of the second dual output current conveyers and the z terminal of the first dual output current conveyers of are joined together and which acts as one of the terminal of simulated grounded inductance.

8. An improved Chua's circuit as claimed in claim 1 wherein said 2-terminal negative resistance circuit comprises two dual output current conveyers having their x terminals grounded through resistors and their y terminals connected together and to the z+ terminals of both dual output current conveyers through two different resistors.

9. An improved Chua's circuit for use in a hyperchaotic circuit as claimed in claims 1 comprising a plurality of said Chua's circuit symmetrically coupled together to enable monolithic implementation of hyperchaotic circuit.

10. A method for improving a Chua's circuit to provide current mode operation, access to all state variables, minimum use of grounded passive elements, and freedom from passive component matching comprising the steps of:

simulating a grounded inductor using a multiple output current conveyer,

connecting a capacitor connected across the second terminal of said inductor,

connecting one terminal of a resistor to the second terminal of said inductor,

connecting the second terminal of said resistor to one terminal of a second capacitor the other end of which is grounded, and

providing a 2-terminal negative resistance device using a pair of multiple output current conveyers.