Semiconductor device fabrication method

Abstract

The method for fabricating a semiconductor device comprises the step of planarizing the surface of a film-to-be-polished formed over a semiconductor substrate by polishing, with a polishing pad 104 formed of a foam with a plurality of cells 107 incorporated in a base material 105 thereof, the surface being polished with the base material alone while a polishing slurry containing abrasive grains and an additive of a surfactant is being supplied. The film-to-be-polished is polished with the polishing pad of a foam having no shells around the cells, whereby even when a polishing slurry containing the additive of a surfactant is used, the generation of scratches in the surface of the film-to-be-polished can be depressed.

Description

CROSS-REFERENCE TO RELATED APPLICATION

This application is based upon and claims priority of Japanese Patent Application No. 2004-88673, filed on Mar. 25, 2004, the contents being incorporated herein by reference.

BACKGROUND OF THE INVENTION

The present invention relates to a semiconductor device fabrication method, more specifically a semiconductor fabrication method in which a film-to-be-polished is polished.

Conventionally, as a technique for forming a device isolation region for defining a device region, LOCOS (LOCal Oxidation of Silicon) has been widely known.

However, when device isolation regions are formed by LOCOS, the device regions tend to be made smaller by bird's beaks. The bird's beaks can be made small by making the oxidation rate for forming the device isolation regions low. The low oxidation rate makes it impossible to obtain the sufficient device isolation function. When the device isolation regions are formed by LOCOS, large steps are formed in the substrate surface. Thus, further micronization and higher integration is difficult by means the technique of forming device isolation regions by LOCOS.

Recently, as a polishing slurry which can provide good planarity, a polishing slurry containing abrasive grains, and an additive of a surfactant is proposed (refer to Patent Reference 1). The proposed polishing slurry uses, e.g., cerium oxide (CeO₂) as the abrasive grains, and, e.g., poly(ammonium acrylate) or others as the additive.

Following references disclose the background art of the present invention.

[Patent Reference 1]

Specification of Japanese Patent Application Unexamined Patent Publication No. 2000-248263

[Patent Reference 2]

Specification of Japanese Patent No. 3013105

[Patent Reference 3]

Specification of Japanese Patent Application Unexamined Patent Publication No. 2003-301021

SUMMARY OF THE INVENTION

According to one aspect of the present invention, there is provided a method for fabricating a semiconductor device comprising the step of planarizing the surface of a film-to-be-polished formed over a semiconductor substrate by polishing, with a polishing pad while a polishing slurry containing abrasive grains and an additive of a surfactant being supplied onto the polishing pad to thereby planarize the surface of the film-to-be-polished, the polishing pad being formed of a foam with a plurality of cells incorporated in a base material thereof, whereby the surface of the film-to-be-polished is polished with only the base material.

According to the present invention, the film-to-be-polished is polished with the polishing pad of a foam having no shells around the cells, whereby even when a polishing slurry containing a surfactant as the additive is used, the generation of scratches in the surface of the film-to-be-polished can be depressed. Furthermore, according to the present invention, the film-to-be-polished is polished by using a polishing slurry containing a surfactant as the additive, whereby better planarization can be realized in comparison with that realized by using a polishing slurry containing abrasive grains of silica and the additive of KOH. Thus, the present invention can realize the micronization of semiconductor devices while ensuring the reliability.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a plan view of the polishing apparatus.

FIG. 2 is a side view of a part of the polishing apparatus illustrated in FIG. 1.

FIG. 3 is a sectional view of the polishing pad used in the semiconductor device fabrication method according to one embodiment of the present invention.

FIG. 4 is an enlarged view of a part of the polishing apparatus illustrated in FIG. 1.

FIGS. 5A to 5C are sectional views of a semiconductor device in the steps of the semiconductor device fabrication method according to one embodiment of the present invention, which illustrate the method (Part 1).

FIGS. 6A and 6B are sectional views of a semiconductor device in the steps of the semiconductor device fabrication method according to one embodiment of the present invention, which illustrate the method (Part 2).

FIG. 7 is a graph of characteristics of the polishing slurry.

FIG. 8 is conceptual views of the mechanism for changes of the polishing rate.

FIG. 9 is a graph conceptually illustrating changes of the torque of the polishing table.

FIG. 10 is a graph of numbers of scratches generated in the polish with a polishing slurry containing abrasive grains and an additive of a surfactant.

FIG. 11 is a graph of numbers of scratches generated in the polish with a polishing slurry of abrasive grains of silica and an additive of KOH.

FIG. 12 is a sectional view of a polishing pad used in the modified semiconductor device fabrication method.

FIGS. 13A to 13C are sectional views of a semiconductor device in the steps of the conventional semiconductor device fabrication method, which illustrate the method.

FIG. 14 is a sectional view of the polishing pad used in the proposed semiconductor device fabrication method.

DETAILED DESCRIPTION OF THE INVENTION

As a technique taking place of the LOCOS, STI (Shallow Trench Isolation) is noted. The technique of forming a device isolation region by STI will be explained with reference to FIG. 13. FIGS. 13A to 13C are sectional views of a semiconductor device in the steps of the conventional semiconductor device fabrication method, which illustrate the method.

As illustrated in FIG. 13A, a silicon oxide film 212 and a silicon nitride film 214 are sequentially formed on a semiconductor substrate 210.

Next, the silicon nitride film 214 and the silicon oxide film 212 are patterned by photolithography. Openings 216 are thus formed in the silicon nitride film 214 and the silicon oxide film 212 down to the semiconductor substrate 210.

With the silicon nitride film 214 with the openings 216 formed in as the mask, the semiconductor substrate 210 is anisotropically etched. Trenches 218 are thus formed in the semiconductor substrate 210.

As illustrated in FIG. 13B, a silicon oxide film 220 is formed in the trenches 216 and on the silicon nitride film 214.

As illustrated in FIG. 13C, the surface of the silicon oxide film 220 is polished by CMP (Chemical Mechanical Polishing) until the surface of the silicon nitride film 214 is exposed. The silicon nitride film 214 functions as the stopper for polishing the silicon oxide film 220. The polishing slurry is, e.g., a polishing slurry containing, e.g., abrasive grains of silica and an additive of KOH. Thus, device isolation regions 221 of the silicon oxide film 220 are buried in the trenches 216. The device isolation regions 221 defined device regions 222.

Then, the silicon nitride film 214 and the silicon oxide film 212 are etched off. Then, transistors (not illustrated) are formed in the device regions 222. Thus, the semiconductor device is fabricated.

When the device isolation regions 221 are formed by STI, bird's beaks are not generated, as are when device isolation regions are formed by LOCOS, and the decrease of the device regions 222 can be prevented. Setting the depth of the trenches 218 large can make the effective inter-device distance longer, whereby the device isolating function can be high.

However, the conventional semiconductor device fabrication method using the above-described polishing slurry, i.e., the polishing slurry containing abrasive grains of silica and an additive of KOH has high pattern dependency, and cannot always provide good planarity.

When the film-to-be-polished 220 is polished by the proposed polishing slurry, scratches have been often made in the surface of the film-to-be-polished 220.

FIG. 14 is a sectional view of the polishing pad used in the proposed semiconductor device fabrication method.

As illustrated in FIG. 14, the polishing pad 304 is formed of two pad layers 303a, 303b adhered to each other. The pad layer 303a which is to be the polishing surface when a film-to-be-polished 220 is polished is formed of urethane foam. The lower pad layer 303a is formed of, e.g., non-foamed urethane.

The upper pad layer 303a is formed of a high molecular matrix 305, as of urethane or others, containing a number of polymeric microelements 310 (refer to Patent Reference 2). The polymeric microelements 310 has cells 307 in the shells 309. The polymeric microelements 310 are called also hollow balloons (refer to Patent Reference 3).

The shells 309 of those of the polymeric microelements 310 present in the surface of the upper pad layer 303a are broken when the polishing pad 304 is dressed, when the film-to-be-polished 220 is polished, or in other occasions. Accordingly the broken shells 309 are present on the surface of the pad layer 303a. More specifically, on the surface of the pad layer 303a, parts of the shells 309 are projected from the matrix 305.

A major cause for causing scratches in the surface of the film-to-be-polished 220 will be that those of the shells 309 projected from the surface of the pad layer 303a are pressed against to the surface of the film-to-be-polished 220 under large pressure.

The inventor of the present application has made earnest studies and had an idea that the film-to-be-polished is polished by the polishing pad of a foam having no shells around the cells. In using the polishing pad of a foam having no shells around the cells, no shells are projected from the surface of the pad layer and are pressed against the surface of the film-to-be-polished under large pressure, whereby the generation of scratches in the surfaces of the film-to-be-polished 220 can be prevented.

[One Embodiment]

(The Polishing Apparatus)

Before the semiconductor device fabrication method according to one embodiment of the present invention is explained, the polishing apparatus used in the present embodiment will be explained with reference to FIGS. 1 to 4. FIG. 1 is a plan view of the polishing apparatus. FIG. 2 is a side view of a part of the polishing apparatus of FIG. 1. FIG. 3 is a sectional view of the polishing pad used in the semiconductor fabrication method according to the present embodiment. FIG. 4 is an enlarged side view of a part of the polishing apparatus of FIG. 1.

As illustrated in FIG. 1, three polishing tables 102a-102c which are rotatable are disposed on a base 100.

In the present embodiment, the polishing table 102a, for example, is used in polishing the surface of a film-to-be-polished. The polishing tables 102b, 102c may be used in polishing the surface of the film-to-be-polished.

As illustrated in FIG. 2, polishing pads 104 are provided respectively on the polishing tables 102a-102c.

As illustrated in FIG. 3, each polishing pad is formed of two pad layers 103a, 103b adhered to each other.

The upper pad layer 103a which is to be the polishing surface in polishing the film-to-be-polished is formed of, e.g., urethane foam. The urethane foam contains a plurality of cells 107 formed in a matrix 105 of urethane. The pad layer 103a is formed of closed-cell type urethane foam. That is, a plurality of cells 107 formed in the matrix 105 are independent of each other. The pad layer 103a is formed of a closed-cell type foam so that the polishing surface has a suitable hardness, and the polishing surface can be homogeneous even when abraded.

The shells 309 (refer to FIG. 14) are not present around the cells 107. That is, the pad layer 103a is formed of foam with the cells 107 incorporated in the matrix 105 without the use of the microelements 310 (hollow balloons, hollow parts) The shells 309 are absent around the cells 107, and the matrix 105 alone polishes the surface of the film-to-be-polished. The surface of the film-to-be-polished is free from being pressed under large pressure by the shells 309, and the generation of scratches in the surface of the film-to-be-polished can be depressed.

It is very important that the average diameter of the cells 107 is 150 μm or less. Specifically, the diameter of the cells 107 is about 30-40 μm. A foam having cells 107 of a 150 μm or less average diameter is used for the following reason.

That is, when the cells 107 of a 150 μm or less average diameter are uniformly introduced in the matrix 105, the polishing surface is highly flexible and uniform. Accordingly, the use of the pad layer 103a of a foam having the cells 107 of a 150 μm or less average diameter makes it possible to uniformly polish the surface of the film-to-be-polished.

In a case that an average diameter of cells introduced in the matrix is above 150 μm, good flexibility cannot be obtained, and the polishing surface is not uniform. Accordingly, the use of the pad layer 103a of a foam having the cells 107 having the average diameter above 150 μm makes it difficult to uniformly polish the surface of the film-to-be-polished.

For this reason, it is very important that the average diameter of the cells 107 introduced into the matrix 105 is 150 μm or less.

The lower pad layer 103b is formed intentionally of urethane having no closed-cells introduced in. The lower pad layer 103b is less hard than the upper pad layer 103a. Such polishing pad 104 can be, e.g., a polishing pad (type: NP2000) by TOYOBO Co., Ltd.

The method for fabricating the polishing pad without the shells around the cells, i.e., the method for fabricating the polishing pad without the hollow balloons is described in Patent Reference 3.

As illustrated in FIG. 1, a carousel 110 having arms 108a-108d is provided on the base 100.

Rotary polishing heads 112a-112d are mounted respectively on the arms 108a-108d. The carousel 110 is suitably rotated to move the polishing heads 112a-112d.

As illustrated in FIG. 2, the polishing heads 112a-112d hold semiconductor substrates 10. The polishing heads 112a-112d press the semiconductor substrates 10 against the polishing pads 104 while rotating the semiconductor substrates 10.

A plurality of nozzles 124a, 124b are provided above each of the polishing table 102a-102c. The nozzles 124a feeds a polishing slurry onto the polishing pad 104. The nozzle 124b feeds deionized water onto the polishing pad 104.

As illustrated in FIG. 1, dressers 114a-114c for dressing the polishing pads 104 are disposed respectively near the polishing tables 102a-102c.

As illustrated in FIG. 4, each of the dressers 114 includes diamond disk 116. The diamond disk 116 is made of a base metal 118 of, e.g., stainless steel, and diamond particles 120 of, e.g., about 150 μm fixed to the base metal 118. Several diamond particles 120 are disposed per 1 cm². The diamond particles 120 are secured to the base metal 118 by means of, e.g., a nickel plating layer 122.

Thus, the polishing apparatus used in the present embodiment is constituted.

(The Semiconductor Device Fabrication Method)

The semiconductor device fabrication method according to the embodiment of the present invention will be explained with reference to FIGS. 1 to 11. FIGS. 5A to 6B are sectional views of a semiconductor device in the steps of the semiconductor fabrication method according to the embodiment, which illustrate the method.

As illustrated in FIG. 5A, a 10 nm-thickness silicon oxide film 12 is formed on the entire surface of a semiconductor substrate 10 of, e.g., silicon by, e.g., thermal oxidation.

Then, a silicon nitride film 14 is formed on the entire surface by, e.g., CVD. The film thickness of the silicon nitride film 14 is, e.g., about 100 nm.

Next, openings 16 are formed in the silicon nitride film 14 and the silicon oxide film 12 down to the semiconductor substrate 10 by photolithography.

By using as the mask the silicon nitride film 14 with the openings 16 formed in, the semiconductor substrate 10 anisotropically etched. Thus, trenches 18 are formed in the semiconductor substrate 10. The depth of the trenches 18 is about, e.g., 300 nm from the surface of the silicon nitride film 14.

As illustrated in FIG. 5B, a silicon oxide film 20 is formed on the entire surface by, e.g., high density plasma CVD. The film thickness of the silicon oxide film 20 is, e.g., 450 nm. Thus, the silicon oxide film 20 is formed, buried in the trenches 18 and having concavities and convexities in the surface. The silicon oxide film 20 is to be a film-to-be-polished.

Next, a semiconductor substrate 10 is held by the polishing head 112a (see FIG. 2). At this time, the silicon oxide film 20, which is to be the film-to-be-polished, is positioned on the underside.

Next, the carousel 110 is turned counter-clockwise by about 90 degrees. The polishing head 112a holding the semiconductor substrate 10 is thus positioned on the polishing table 102a with the polishing pad 104 disposed on the upper surface.

As illustrated in FIG. 5C, main polish is performed by CMP on the film-to-be-polished 20 formed on the semiconductor substrate 10.

The main polish is performed as follows. That is, while the semiconductor substrate 10 is being rotated by the polishing head 112a, the polishing head 112a is lowered to press the surface of the film-to-be-polished 20 against the surface of the polishing pad 104. At this time, the polishing table 102a is on rotation while a polishing slurry is fed onto the polishing pad 104 through the nozzle 124a.

Conditions for the main polish are as follows.

The pressure for pressing the polishing head 112a against the polishing pad 104, i.e., the polishing pressure is, e.g., 350 gf/cm². The rotation number of the polishing head 112a is, e.g., 118 rotations/minute. The rotation number of the polishing table 112a is, e.g., 120 rotations/minute. The feeding rate of the polishing slurry is, e.g., 0.2 liters/minute.

Conditions for the main polish are not limited to the above and may be suitably set.

The polishing slurry is a polishing slurry containing abrasive grains, and an additive of a surfactant. This polishing slurry contains, e.g., cerium oxide as the abrasive grains. This polishing slurry contains, e.g., poly(ammonium acrylate) or others as the additive. Such polishing slurries can be exemplified by polishing slurries (Type: Micro Planer STI2100) e.g., by EKC Technology, Inc.

FIG. 7 is a graph of characteristics of the polishing slurry used in the present embodiment. On the horizontal axis, the polishing pressure is taken. The polishing speed, i.e., the polishing rate is taken on the vertical axis.

As seen in FIG. 7, the polishing slurry used in the present embodiment has the polishing rate which is lower under polishing pressures smaller than a certain polishing pressure and, under polishing pressures higher than the certain polishing pressure, becomes higher substantially in proportion with the polishing pressures.

FIG. 8 is conceptual views of the mechanism for the polishing rate change.

As illustrated in FIG. 8A, with concavities and convexities present in the surface of the film-to-be-polished 20, the pressure is concentrated on the corners of the convexities of the film-to-be-polished 20, and high pressures are applied to the corners of the convexities. Accordingly, the convexities of the film-to-be-polished are polished at high polishing rates, and the film-to-be-polished 20 is planarized at high polishing rates. As described above, as the polishing pressure for pressing the polishing heads 112 against the polishing pads 104 is set to be larger, the polishing rate for the film-to-be-polished tend to be higher.

As the polishing pressure for pressing the polishing heads 112 against the polishing pads 104 is set to be larger, the polishing rate for the film-to-be-polished tend to be higher, because as the polishing pressure is set to be larger, the surfactant contained as the additive in the polishing slurry is more easily released from the corners of the convexities, and the polish for the film-to-be-polished 20 is less obstructed by the surfactant.

With the surface of the film-to-be-polished 20 substantially planarized as illustrated in FIG. 8B, however, it does not take place that high pressures are applied concentratedly to parts. The pressures applied to the film-to-be-polished 20 are generally evened. Accordingly, the polishing rate for the film-to-be-polished 20 is very low.

The polishing rate for the film-to-be-polished 20 having the surface planarized is low, because the surfactant contained in the polishing slurry as the additive is not easily released, and the polish of the film-to-be-polished 20 will be hindered.

The detection of a finish of the main polish is based on changes of the torque of the polishing table 102a.

The torque of the polishing table 102a in the main polish changes as exemplified in FIG. 9. FIG. 9 is a graph conceptually indicating changes of the torque of the polishing table.

At the early stage of the polish of the film-to-be-polished 20, as illustrated in FIG. 9, the toque of the polishing table 102a does not substantially change. Then, as the surface of the film-to-be-polished 20 is further planarized, the torque of the polishing table 102a is increased. Then, when the surface of the film-to-be-polished 20 is substantially planarized, as illustrated in FIG. 9, the toque of the polishing table 102a is not substantially changed. This makes it possible to detect the finish by observing toque changes per a unit time. Specifically, a time where a torque change amount per a unit time becomes smaller than a certain value can be the finish of the polish.

The finish detection of the main polish is based here on the torque of the polishing table 102a but is not essentially limited to this. The finish of the main polish may be detected by other methods. For example, it is possible to detect the finish by observing the drive voltage or the drive current of the polishing table 102a. The drive current and the drive voltage of the polishing tables change, as does the torque of the polishing tables. The finish can be detected by observing the torque, the drive voltage, the drive current or others of the polishing head 112a.

Thus, it is detected by the above-described finish detection methods that the surface of the film-to-be-polished 20 has been planarized.

Thus, the surface of the film-to-be-polished 20 is planarized, and the main polish is completed (see FIG. 5C).

The polishing pads 104 may be dressed before the main polish or in the main polish.

Conditions for dressing the polishing pads 104 are as exemplified below.

The load for the diamond disk 116 to apply to the polishing pads 104 is, e.g., 50 gf.

The rotation number of the diamond disk 116 is, e.g., 98 rotations/min.

The rotation number of the polishing table 102a is, e.g., 100 rotations/min.

The supply amount of deionized water to be fed onto the polishing pad 104 in the dressing is, e.g., 0.2 liters/min.

The time of dressing the polishing pad 104 is, e.g., 30 seconds.

At the stage of the finish of the main polish, as illustrated in FIG. 5C, the film-to-be-polished 20 remains on the silicon nitride film 14. Because of the film-to-be-polished 20 remaining on the silicon nitride film 14, the silicon nitride film 14 and the silicon oxide film 12 cannot be etched off. The film-to-be-polished 20 on the silicon nitride film 14 must be removed, and to this end, the main polish is followed by finish polish for removing the film-to-be-polished 20 on the silicon nitride film 14.

The finish polish is performed as follows. That is, the supply of the polishing slurry is stopped, and while deionized water is being fed through the nozzle 124b, the polishing head 112a is rotated. At this time, the polishing table 102a is also rotated. The time of the finish polish is a prescribed period of time. The time of the finish polish is here, e.g. about 30 seconds.

When the finish polish is started, the polishing slurry used in the main polish adheres to the surface of the film-to-be-polished 20. The polishing slurry adheres also to the surfaces of the polishing pads 104. The additive of the surfactant contained in the polishing slurry is water-soluble, and when the deionized water is fed, the additive is removed of a short period of time. On the other hand, the abrasive grains contained the polishing slurry are not water-soluble and are not easily removable and remain between the polishing pad 104 and the film-to-be-polished 20. The additive has contributed to making the polishing rate for the film-to-be-polished low in planarizing the surface of the film-to-be-polished. The additive is removed in short time, but the abrasive grains which contribute to the polish remain between the polishing pad 104 and the film-to-be-polished 20, whereby the film-to-be-polished 20 can be further polished with the abrasive grains.

The technique of, as described above, stopping the supply of the polishing slurry and polishing the film-to-be-polished 20 while the deionized water is being fed is called water polish.

Conditions for the finish polish are set to be as exemplified below.

The polishing pressure for pressing the polishing head 112a against the polishing pad is, e.g., 200 gf/cm². The rotation number of the polishing head 112a is, e.g., 118 rotations/min. The rotation number of the polishing table 102a is, e.g., 120 rotations/min. The supply amount of the deionized water 128 is, e.g., 0.3 liters/min.

The conditions for the finish polish are not limited to the above and can be suitably set.

Thus, the finish polish is completed, and the silicon oxide film 20 on the silicon nitride film 14 is removed (see FIG. 6A).

Next, cleaning is performed on the semiconductor substrate 10. The cleaning for the semiconductor substrate 10 is performed as exemplified below. That is, the surface of the semiconductor substrate 10 is cleaned with a brush by using, e.g., a 0.3 wt % ammonium aqueous solution. Then, the surface of the semiconductor substrate 10 is further cleaned with a brush by using, e.g., 0.5 wt % hydrofluoric acid. Then, the semiconductor substrate 10 is rinsed with deionized water. Next, the semiconductor substrate 10 is dried. Thus, the semiconductor device 10 is cleaned.

Next, as illustrated in FIG. 6B, the silicon nitride film 14 and the silicon oxide film 12 are etched off. The device isolation regions 21 of the silicon oxide film 20 buried in the trenches 18 define device regions 22.

Then, transistors, etc. (not illustrated) are formed in the device regions 22.

Thus, the semiconductor device is fabricated by the semiconductor device fabricating method according to the present embodiment.

(Evaluation Results)

Next, the result of evaluating the number of scratches generated in the surface of the film-to-be-polished will be explained.

First, the case that the polish was performed with a polishing slurry containing abrasive grains and an additive of a surfactant will be explained.

FIG. 10 is a graph of the number of scratches in the case that the polish was performed with a polishing slurry containing abrasive grains and an additive of a surfactant.

Examples 1 to 4 indicate the polish by the semiconductor device fabrication method according to the present embodiment, i.e., the surface of the film-to-be-polished 20 was polished with the polishing pads 104 of a foam having no shells around the cells 107. The polishing pad having no shells around the cells was a polishing pad (type: NP2000) by TOYOBO Co., Ltd.

Controls 1 to 4 indicate the polish by the proposed semiconductor device fabrication method, i.e., the surface of the film-to-be-polished was polished with the polishing pad 304 of a foam having shells 309 around the cells 307. The polishing pad having shells around cells was a polishing pad (type: IC1400) by RODEL NITTA Company.

To evaluate the number of scratches, a wafer defect detector (type: AIT-XP) by KLA-Tencor Corporation.

In Controls 1 to 4, in which the polishing pad 304 of a foam having the shells 309 around the cells 307 was used, the numbers of scratches were about 35-55, which were relatively many.

In contrast to this, in Examples 1 to 4, in which the polishing pad 104 of a foam having no shells around the cells 107 was used, the numbers of scratches were about 10-20, which were relatively few.

Based on these results, it can be seen that the present embodiment can depress the generation of scratches in the surface of the film-to-be-polished 20.

Next, the case that the polish was performed with a polishing slurry containing abrasive grains of silica and an additive of KOH, i.e., with a polishing slurry containing no additive of a surfactant will be explained. FIG. 11 is a graph of the numbers of scratches in the case that the polish was performed with a polishing slurry containing abrasive grains of silica and an additive of KOH.

Controls 5 to 8 indicate the cases that the surface of the film-to-be-polished was polished with the polishing pad 104 of a foam having no shells around the cells 107. The polishing pad 104 having no shells around the cells 107 was a polishing pad (type: NP2000) by TOYOBO Co., Ltd, as described above.

Controls 9 to 12 indicates the that the polishing pad 304 of a foam having the shells 309 around the cells 307 is used.

The polishing pad having shells around cells was a polishing pad (type: IC1400) by RODEL NITTA Company.

The polishing conditions were as follows. The pressure for pressing the polishing head 112a against the polishing pad 104, i.e., the polishing pressure was, e.g., 350 gf/cm². The rotation number of the polishing head 112a was, e.g., 98 rotations/min. The rotation number of the polishing table 102a was, e.g., 100 rotations/min. The supply amount of the polishing slurry to be fed onto the polishing pad 104 was, e.g., 0.2 liters/min.

The polishing slurry containing abrasive grains of silica and an additive of KOH was SS25 by CABOT Corporation. The polishing slurry was diluted with deionized water in 1:1 ratio to be fed onto the polishing pad 104.

The numbers of scratches were evaluated by a wafer defect detector (type: AIT-XP) by KLA-Tencor Corporation.

In Controls 5 to 8, in which the polishing pad 104 of a foam having no shells around the cells 107 was used, the numbers of scratches were about 15-20, where were relatively few.

In Controls 9 to 12, in which the polishing pad 304 of a foam having the shells 309 around the cells 307 was used, the numbers of scratches were about 15-20, which were relatively few.

Based on these results, it can be seen that in the case the polishing slurry containing abrasive grains of silica and an additive of KOH, i.e., a polishing slurry containing no surfactant as the additive is used, scratches generated in the surface of the film-to-be-polished will be relatively few whether or not the polishing pad has shells around the cells.

In the case that the polishing slurry containing the abrasive grains of silica and the additive of KOH is used, the scratches are relatively few whether or not the shells are present around the cells in the polishing pad. This will be for the following reason. That is, when the polishing slurry containing the abrasive grains of silica and the additive of KOH is used, the polish advances even after the surface of the film-to-be-polished has been planarized. Accordingly, even if scratches are generated in the surface of the film-to-be-polished, the scratches are removed by the polish which advances after the generation of the scratches. Thus, in the case that the polishing slurry containing the abrasive grains of silica and the additive of KOH is used, even if the polishing pad with shells around the cells is used, scratches will not be accumulated. For this reason, in the case the polishing slurry containing the abrasive grains of silica and the additive of KOH is used, scratches will be relatively few whether or not the shells are present around the cells in the polishing pad.

On the other hand, in the case that polishing slurry containing a surfactant as the additive is used, relatively many scratches are generated when shells are present around the cells of the polishing pad. This will be for the following reason.

That is, when the polishing slurry containing surfactant as the additive is used, the polish does not almost advance as the surface of the film-to-be-polished is planarized. Accordingly, scratches generated after the surface of the film-to-be-polished has been planarized are extremely unremovable. When the polishing pad having shells around the cells is used, scratches will be accumulated in the surface of the film-to-be-polished. The thickness of the film-to-be-polished, which is removed by the finish polish is smaller in comparison with depths of the scratches, which makes it difficult to remove the scratches by the finish polish. For this reason, when the polishing slurry containing a surfactant as the additive is sued, relatively many scratches will be generated when the polishing pad has shells around the cells.

As described above, according to the present embodiment, the film-to-be-polished 20 is polished with the polishing pad 104 of a foam having no shells around the cells 107, whereby even when the polishing slurry contains surfactant as the additive, the generation of scratches in the surface of the film-to-be-polished can be depressed. Furthermore, according to the present embodiment, the film-to-be-polished 20 is polished with a polishing slurry containing a surfactant as the additive, whereby good planarization can be realized in comparison with the planarization performed with a polishing slurry containing abrasive grains of silica and an additive of KOH. Thus, the present embodiment can realize micronization of semiconductor devices while ensuring the reliability.

(Modifications)

Next, a modification of the semiconductor device fabrication method according to the present embodiment will be explained with reference to FIG. 12. FIG. 12 is a sectional view of the polishing pad used in the semiconductor device fabrication method according to the present modification.

As illustrated in FIG. 12, the polishing pad 104a used in the present modification is characterized mainly in that the polishing pad 104a is formed of a single layer of a pad layer 103a.

The pad layer 103a is formed of, e.g., urethane foam, as in the embodiment described above. As described above, shells 309 (see FIG. 14) are not present around the cells 107 formed in the pad layer 103a.

The use of the polishing pad 104a formed even of such single layer of the pad layer 103a can depress the generation of scratches in the surface of the film-to-be-polished, as does in the above-described embodiment.

[Modified Embodiments]

The present invention is not limited to the above-described embodiment and can cover other various modifications.

For example, in the above-described embodiment, the pad layer 103a is formed of urethane foam. The pad layer 103a is not essentially formed of urethane foam and can be formed suitably of a foam of any other material as long as the foam has not shells around the cells. For example, polyethylene foam or others having no shells around the cells may be used as the pad layer 103a.

In the above-described embodiment, the polishing slurry contains abrasive grains of ceriumoxide (ceria). In the present invention, the abrasive grains contained in the polishing slurry are not essentially cerium oxide. That is, a polishing slurry having characteristics that the polishing rate is relatively higher for the film-to-be-polished 20 having concavities and convexities in the surface and relatively low for the film-to-be-polished 20 having a substantially flat surface can be suitably used. For example, a polishing slurry containing abrasive grains of silicon oxide (silica) and having the above-described characteristics may be used. Such polishing slurry is exemplified by KS-S-210 by KAO Corporation.

In the above-described embodiment, the device isolation regions are formed by STI. The principle of the present invention is not limited to forming device isolation regions and is applicable widely to polishing the surfaces of films-to-be-polished.

In the above-described embodiment, the film-to-be-polished 20 is silicon oxide film. The film-to-be-polished 20 is not essentially silicon oxide film.

The principle of the present invention is applicable to polishing the film-to-be-polished 20 of any other material.

Claims

1. A method for fabricating a semiconductor device comprising the step of planarizing the surface of a film-to-be-polished formed over a semiconductor substrate by polishing, with a polishing pad while a polishing slurry containing abrasive grains and an additive of a surfactant being supplied onto the polishing pad to thereby planarize the surface of the film-to-be-polished, the polishing pad being formed of a foam with a plurality of cells incorporated in a base material thereof, whereby the surface of the film-to-be-polished is polished with only the base material.

2. A method for fabricating a semiconductor device according to claim 1, wherein

the polishing pad is formed of the foam having the plural cells incorporated in the base material without hollow parts mixed therein.

3. A method for fabricating a semiconductor device according to claim 1, wherein

the polishing pad is formed of a single layer of a pad layer formed of the foam.

4. A method for fabricating a semiconductor device according to claim 2, wherein

the polishing pad is formed of a single layer of a pad layer formed of the foam.

5. A method for fabricating a semiconductor device according to claim 1, wherein

the polishing pad includes a first pad layer of the foam, and a second pad layer formed below the first pad layer and formed of a material which is more flexible than the first pad layer.

6. A method for fabricating a semiconductor device according to claim 2, wherein

the polishing pad includes a first pad layer of the foam, and a second pad layer formed below the first pad layer and formed of a material which is more flexible than the first pad layer.

7. A method for fabricating a semiconductor device according to claim 1, wherein

the base material of the polishing pad is polyurethane.

8. A method for fabricating a semiconductor device according to claim 2, wherein

the base material of the polishing pad is polyurethane.

9. A method for fabricating a semiconductor device according to claim 1, wherein

the base material of the polishing pad is polyethylene.

10. A method for fabricating a semiconductor device according to claim 2, wherein

the base material of the polishing pad is polyethylene.

11. A method for fabricating a semiconductor device according to claim 1, further comprising, before the step of planarizing the surface of the film-to-be-polished, the steps of:

forming over the semiconductor substrate an insulation film having etching characteristics different from those of the film-to-be-polished;

forming an opening in the insulation film;

etching the semiconductor substrate with the insulation film as a mask to form a trench in the semiconductor substrate; and

forming the film-to-be-polished in the trench and over the insulation film.

12. A method for fabricating a semiconductor device according to claim 2, further comprising, before the step of planarizing the surface of the film-to-be-polished, the steps of:

forming over the semiconductor substrate an insulation film having etching characteristics different from those of the film-to-be-polished;

forming an opening in the insulation film;

etching the semiconductor substrate with the insulation film as a mask to form a trench in the semiconductor substrate; and

forming the film-to-be-polished in the trench and over the insulation film.

13. A method for fabricating a semiconductor device according to claim 1, wherein

the abrasive grains are formed of one of cerium oxide and silicon oxide, or a mixture of them.

14. A method for fabricating a semiconductor device according to claim 2, wherein

the abrasive grains are formed of one of cerium oxide and silicon oxide, or a mixture of them.

15. A method for fabricating a semiconductor device according to claim 1, wherein

the average diameter of the plural cells incorporated in the base material is 150 μm or less.

16. A method for fabricating a semiconductor device according to claim 2, wherein

the average diameter of the plural cells incorporated in the base material is 150 μm or less.

17. A method for fabricating a semiconductor device according to claim 1, wherein

the additive is poly(ammonium acrylate).

18. A method for fabricating a semiconductor device according to claim 2, wherein

the additive is poly(ammonium acrylate).