Wafer-level packaged microelectronic imagers and processes for wafer-level packaging
The following disclosure describes several embodiments of (1) methods for wafer-level packaging of microelectronic imagers, (2) methods of forming electrically conductive interconnects in microelectronic imagers, (3) methods for forming optical devices for microelectronic imagers, and (4) microelectronic imagers that have been packaged using wafer-level packaging processes. Wafer-level packaging of microelectronic imagers is expected to significantly enhance the efficiency of manufacturing microelectronic imagers because a plurality of imagers can be packaged simultaneously using highly accurate and efficient processes developed for packaging semiconductor devices. Moreover, wafer-level packaging of microelectronic imagers is expected to enhance the quality and performance of such imagers because the semiconductor fabrication processes can reliably align an optical device with an image sensor and space the optical device apart from the image sensor by a desired distance with a higher degree of precision.
The following disclosure relates generally to microelectronic imagers and methods for packaging microelectronic imagers. Several aspects of the present invention are directed toward wafer-level packaging of microelectronic imagers.
BACKGROUNDMicroelectronic imagers are used in digital cameras, wireless devices with picture capabilities, and many other applications. Cell phones and Personal Digital Assistants (PDAs), for example, are incorporating microelectronic imagers for capturing and sending pictures. The growth rate of microelectronic imagers has been steadily increasing as they become smaller and produce better images with higher pixel counts.
Microelectronic imagers include image sensors that use Charged Coupled Device (CCD) systems, Complementary Metal-Oxide Semiconductor (CMOS) systems, or other systems. CCD image sensors have been widely used in digital cameras and other applications. CMOS image sensors are also quickly becoming very popular because they are expected to have low production costs, high yields and small sizes. CMOS image sensors can provide these advantages because they are manufactured using technology and equipment developed for fabricating semiconductor devices. CMOS image sensors, as well as CCD image sensors, are accordingly “packaged” to protect the delicate components and to provide external electrical contacts.
The die 10 includes an image sensor 12 and a plurality of bond-pads 14 electrically coupled to the image sensor 12. The interposer substrate 20 is typically a dielectric fixture having a plurality of bond-pads 22, a plurality of ball-pads 24, and traces 26 electrically coupling bond-pads 22 to corresponding ball-pads 24. The ball-pads 24 are arranged in an array for surface mounting the imager 1 to a board or module of another device. The bond-pads 14 on the die 10 are electrically coupled to the bond-pads 22 on the interposer substrate 20 by wire-bonds 28 to provide electrical pathways between the bond-pads 14 and the ball-pads 24.
The imager 1 shown in
One problem with packaging conventional microelectronic imagers is that it is difficult to accurately align the lens with the image sensor. Referring to
Another problem of packaging conventional microelectronic imagers is that positioning the lens at a desired focus distance from the image sensor is time-consuming and may be inaccurate. The lens 70 shown in
Yet another concern of conventional microelectronic imagers is that they have relatively large footprints and occupy a significant amount of vertical space (i.e., high profiles). The footprint of the imager in
Yet another concern of conventional microelectronic imagers is the manufacturing costs for packaging the dies. The imager 1 shown in
A. Overview
The imaging unit fabrication procedure 202 comprises providing an imager workpiece having a first substrate and a plurality of imaging units on and/or in the first substrate. The imaging units can each include an image sensor and a plurality of external electrical contacts electrically coupled to the image sensor. For example, the image sensors can be CMOS image sensors and the external contacts can be backside arrays of contact pads coupled to corresponding image sensors by through-wafer interconnects.
The optics fabrication procedure 204 comprises providing an optical device workpiece having a second substrate and a plurality of optical devices on and/or in the second substrate. The optical devices are typically arranged in a pattern corresponding to the pattern of the imaging units on the first substrate. The optical devices can each include at least one optics element, such as a focus lens or filter.
The assembly procedure 206 comprises assembling the optical devices with corresponding imaging units before cutting the imager workpiece and/or the optical device workpiece. The assembly procedure can include assembling the optical devices with the imaging units before cutting either the first substrate or the second substrate, and then cutting both the first and second substrates to separate individual imagers from each other. In other embodiments, either the imager workpiece is cut to separate the imaging units from each other or the optical device workpiece is cut to separate the optical devices from each other before assembling the optical devices with corresponding imaging units.
The following disclosure describes several embodiments of (1) methods for wafer-level packaging of microelectronic imagers, (2) methods of forming electrically conductive interconnects in microelectronic imagers, (3) methods for forming optical devices for microelectronic imagers, and (4) microelectronic imagers that have been packaged using wafer-level packaging processes. Wafer-level packaging of microelectronic imagers is expected to significantly enhance the efficiency of manufacturing microelectronic imagers because a plurality of imagers can be packaged simultaneously using highly accurate and efficient processes developed for packaging semiconductor devices. Moreover, wafer-level packaging of microelectronic imagers is expected to enhance the quality and performance of such imagers because the semiconductor fabrication processes can reliably align an optical device with an image sensor and space the optical device apart from the image sensor by a desired distance with a high degree of precision. Several embodiments of wafer-level packaging processes for packaging microelectronic imagers and the imagers packaged using such wafer-level packaging processes are thus expected to significantly reduce the costs for assembling microelectronic imagers, increase the performance of microelectronic imagers, and produce smaller imagers compared to conventional devices.
1. Summary of Selected Wafer-Level Packaging Processes
One embodiment of a method for wafer-level packaging of microelectronic imagers comprises providing an imager workpiece comprising a first substrate and a plurality of imaging units formed on and/or in the first substrate. The individual imaging units comprise an image sensor, an integrated circuit formed in the first substrate and electrically coupled to the image sensor, and a plurality of external electrical contacts coupled to the integrated circuit. The external electrical contacts are arranged in a plurality of contact arrays on the first substrate corresponding to the individual imaging units. The method further includes providing an optical device workpiece having a second substrate and a plurality of optical devices formed on and/or in the second substrate. The individual optical devices comprise an optics element, such as a focus lens, a pin-hole lens, and/or a filter. The method continues by assembling the optical devices with corresponding imaging units so that the optics elements are positioned with respect to corresponding image sensors before cutting the first substrate and/or the second substrate.
Another embodiment of a method for wafer-level packaging of microelectronic imagers comprises providing an imager workpiece comprising a first substrate, a plurality of microelectronic image sensors arranged in a pattern on the first substrate, and cutting lanes between adjacent image sensors. The method further includes providing an optical device workpiece comprising a second substrate and a plurality of optics elements arranged at least generally in the pattern of the image sensors on the first substrate. This embodiment further includes fixing the imager workpiece relative to the optical device workpiece so that individual image sensors on the first substrate are aligned with corresponding optics elements on the second substrate. The first and second substrates are then cut along the cutting lanes after fixing the imager workpiece relative to the optical device workpiece to separate individual imagers from each other.
Another embodiment of a method for wafer-level packaging of microelectronic imagers in accordance with the invention comprises forming a plurality of imaging units on and/or in a first substrate having a front side and a backside. Each imaging unit has an image sensor at the front side of the first substrate and external electrical contacts at the backside of the first substrate. The external electrical contacts, for example, can have contact pads on the backside of the first substrate and through-wafer interconnects electrically coupling the contact pads to the image sensors. The method further includes fabricating a plurality of optics elements on and/or in a second substrate, and then fixing the imaging units relative to the optics elements in a spaced apart relationship. The imaging units are fixed relative to the optics elements before cutting the first substrate and/or the second substrate such that the image sensors are sealed within discrete compartments in alignment with a corresponding optics element.
Yet another embodiment of a method for wafer-level packaging of microelectronic imagers in accordance with the invention comprises forming a plurality of imaging units on and/or in a first substrate and fabricating a plurality of optical devices on and/or in a second substrate. The imaging units are arranged in a die pattern on the first substrate, and individual imaging units have an image sensor and an array of external electrical contacts electrically coupled to the image sensor. The optical devices are arranged in a device pattern on the second substrate that corresponds to the die pattern of the imaging units, and individual optical devices have an optics element. The method further includes constructing a spacer having openings arranged to be aligned with the die pattern and the device pattern. This method continues by fixing the first substrate relative to the second substrate with the spacer assembly between the first and second substrates. The first and second substrates are fixed together such that each image sensor on the first substrate is aligned with (a) a corresponding opening of the spacer and (b) a corresponding optics element on the second substrate.
2. Summary of Selected Microelectronic Imager Assemblies
Another aspect of the present invention is directed toward microelectronic imager assemblies that are packaged or otherwise used in wafer-level packaging of microelectronic imagers. One embodiment of a microelectronic imager assembly in accordance with the invention comprises an imager workpiece and an optical device workpiece. The imager workpiece has a first substrate and a plurality of imaging units formed on and/or in the first substrate. The imaging units can each comprise an image sensor, an integrated circuit electrically coupled to the image sensor, and external electrical contacts on the first substrate that are coupled to the integrated circuit. The optical device workpiece has a second substrate and a plurality of optical devices on and/or in the second substrate. The optical devices can comprise an optics element. The first and second substrates are fixed relative to each other in a spaced apart relationship so that the image sensors are aligned with corresponding optics elements.
Another embodiment of a microelectronic imager assembly in accordance with the invention comprises a first substrate having a front side and a back side, a plurality of image sensors at the front side of the first substrate, and a plurality of external electrical contacts. The external electrical contacts include contact pads on the backside of the first substrate and interconnects extending through at least a portion of the first substrate. The interconnects are electrically coupled to the contact pads on the backside of the first substrate and the image sensors. The microelectronic imager assembly of this embodiment further includes a second substrate having a plurality of optics elements aligned with corresponding image sensors, and a spacer having a first portion attached to the first substrate and a second portion attached to the second substrate. The spacer has openings arranged in a pattern such that individual openings are aligned with (a) a corresponding image sensor and (b) a corresponding optics element.
Another embodiment of a microelectronic imager assembly in accordance with the invention comprises a first substrate having (a) a first imaging unit including a first microelectronic imager and a first array of external contacts electrically coupled to the first image sensor, and (b) a second imaging unit including a second microelectronic image sensor and a second array of external contacts electrically coupled to the second image sensor. This embodiment of a microelectronic imager assembly further includes a first optics element fixed relative to the first imaging unit in alignment with the first microelectronic imager, and a second optics element fixed relative to the second imaging unit in alignment with the second microelectronic image sensor.
Still another embodiment of a microelectronic imager assembly in accordance with the invention comprises an imager workpiece including (a) a first substrate having a front side and a back side, (b) a first imaging unit including a first microelectronic image sensor at the front side of the first substrate and a first array of external contacts at the backside of the first substrate coupled to the first image sensor, and (c) a second imaging unit including a second microelectronic image sensor at the front side of the first substrate and a second array of external contacts at the backside of the first substrate coupled to the second image sensor. The microelectronic imager assembly of this embodiment further includes a first optics element fixed relative to the first imaging unit in alignment with the first microelectronic image sensor, and a second optics element fixed relative to the second imaging unit in alignment with the second microelectronic image sensor.
Another embodiment of a microelectronic imager assembly in accordance with the invention comprises an imaging workpiece having a first substrate and a plurality of microelectronic imaging means formed in and/or on the first substrate. This embodiment further includes an optical device workpiece having a second substrate fixedly coupled to the first substrate. The optical device workpiece has a plurality of optical device means in and/or on the second substrate in alignment with corresponding imaging means of the imager workpiece.
3. Summary of Selected Microelectronic Imagers
Another aspect of the invention is directed toward microelectronic imagers. One embodiment of a microelectronic imager in accordance with the invention comprises an imaging unit including a die having a front side and a backside, an image sensor at the front side of the die, an integrated circuit electrically coupled to the image sensor, a plurality of through-wafer interconnects electrically coupled to the integrated circuit and a plurality of contact pads at the backside of the die. The interconnects extend through the die to the backside, and the contact pads are connected to the interconnects. The microelectronic imager further comprises an optical device fixed with respect to the imaging unit. The optical device has an optics element aligned with the image sensor.
Another embodiment of a microelectronic imager comprises an imaging unit including a die having a front side and a backside, an image sensor at the front side of the die, an integrated circuit electrically coupled to the image sensor, a plurality of interconnects electrically coupled to the integrated circuit and a plurality of contact pads at the backside of the die connected to the interconnects. The microelectronic imager further includes a stand-off projecting from the die and having an opening aligned with the image sensor, and an optical device attached to the stand-off. The optical device has a substrate and an optics element on and/or in the substrate aligned with the image sensor.
Still another embodiment of a microelectronic imager comprises an imaging unit and an optical device fixed with respect to the imaging unit. The imaging unit can include a die having a front side and a backside, an image sensor at the front side of the die, and a plurality of contact pads at the backside of the die. The contact pads are operatively coupled to the image sensor for electrically attaching the imager to an external device. The optical device includes an optics element aligned with the image sensor.
Specific details of several embodiments of the invention are described below with reference to CMOS imagers to provide a thorough understanding of these embodiments, but other embodiments can use CCD imagers or other types of imagers. Several details describing structures or processes that are well known and often associated with other types of microelectronic devices are not set forth in the following description for purposes of brevity. Moreover, although the following disclosure sets forth several embodiments of different aspects of the invention, several other embodiments of the invention can have different configurations or components than those described in this section. As such, it should be understood that the invention may have other embodiments with additional elements or without several of the elements described below with reference to
The individual steps of the wafer-level packaging process 200 set forth above with respect to
B. Imager Workpieces with Backside Electrical Contacts
The external contacts 350 shown in
The interconnects 356 enable the contact pads 354 to be on the backside 314 of the first substrate 310, which provides several advantages. More specifically, the external contact pads 354 can be located on the backside 314 of the first substrate 310 because the embodiment of the interconnects 356 shown in
Referring now to
After forming the through-hole 450, it is cleaned to remove ablated byproducts (i.e., slag) and/or other undesirable byproducts resulting from the laser. The through-hole 450 can be cleaned using a wet-etch process. In the embodiment shown in
Referring to
After applying the fourth dielectric layer 460, a first conductive layer 470 is deposited onto the imaging unit 320. In the illustrated embodiment, the first conductive layer 470 covers the fourth dielectric layer 460. The first conductive layer 470 is generally composed of a metal, such as TiN, but in other embodiments the first conductive layer 470 can be composed of TaN, W, Ta, Ti, Al, Cu, Ag, Au, Ni, Co and/or other suitable materials known to those of skill in the art. When the first conductive layer 470 is composed of TiN, it can be formed using TiCl4TiN and an atomic layer deposition or chemical vapor deposition process. As explained below, the first conductive layer 470 provides a seed layer for plating another layer of metal into the passage 452.
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One feature of the method described above with reference to
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The embodiments described above with reference to
After the first substrate 310 is thinned to a thickness T, a third dielectric layer 710 is applied over the second side 314 of the first substrate 310. The dielectric layers 410/420/710 can be a polyimide material, but they can alternatively be other non-conductive materials. For example, the dielectric layers 410/420/470 can be composed of low temperature chemical vapor deposition (low temperature CVD) materials, such as tetraethylorthosilicate (TEOS), parylene, silicon nitride (Si3N4), silicon oxide (SiOx), and/or other suitable materials. The dielectric layers 410/420/710 are generally not composed of the same material as each other, but it is possible that two or more of these layers are composed of the same material. In addition, one or more of the layers described above with reference to
Referring to
The hole 720 can alternatively be formed using a laser in addition to or in lieu of etching. If a laser is used to form all or a portion of the hole 720, it is typically cleaned using chemical cleaning agents to remove slag or other contaminants. Although laser cutting the hole 720 may be advantageous because the first substrate 310 does not need to be patterned, etching the hole 720 may be easier because slag does not need to be cleaned from the hole 720. Another advantage of etching the hole 720 is that the hole 720 has rounded corners, which reduces stress points within the hole so that an interconnect constructed within the hole 720 is less susceptible to stress damage. A further advantage of using an etching process is that the second side 314 of the first substrate 310 can be patterned and etched to simultaneously form a plurality of holes 720 aligned with corresponding terminals 352. Accordingly, etching the holes 720 may be more efficient than using a laser because the laser must be realigned with individual terminals 352 before it cuts each hole.
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The interconnect 760 has a first end 763 contacting the backside 722 of the terminal 352 and a second end 764 at the second surface 314 of the first substrate 310. A cap 766 can be formed at the second end 764 of the interconnect 760 after depositing the fill material. In one embodiment, the cap 766 can be Ni electroplated onto the interconnect 760. In other embodiments, the cap 766 can be a wetting agent and/or other material. A solder ball (not shown) can then be attached to the interconnect 760 at the second side 314 of the first substrate 310 to provide an external connection to other electronic devices on the backside of the imaging unit 320.
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A conductive fill material is then deposited into the blind hole to form an interconnect 860 in the imaging unit 320. Solder wave processes, plating processes, vapor deposition processes or other methods can be used to deposit the fill material into the blind hole. The interconnect 860 has a first end 862 proximate to the terminal and a second end 864 at the bottom of the blind hole.
Referring to
C. Optical Device Workpieces for Microelectronic Imagers
The second substrate 1010 is transmissive to a desired radiation. When the imagers are for use in cameras, for example, the substrate is transmissive to light in the visible spectrum. The second substrate 1010, however, can be transmissive to ultraviolet light, infrared radiation and/or any other suitable spectrum according to the particular application of the imager. The second substrate 1010 can be composed of glass, quartz, plastics and/or other materials. The second substrate 1010 can also be configured to be handled by semiconductor fabrication equipment. As such, the second substrate 1010 can be a thin wafer having a thickness of approximately 300-1,500 μm and a diameter of approximately 200-300 μm, or it can have other dimensions suitable for being handled by automatic fabrication equipment.
Referring to
The optics elements 1050 are configured to manipulate the radiation for use by the image sensors 330 (
The optics elements 1210 shown in
Several embodiments of the optical device workpieces shown in
Several embodiments of the optical device workpieces are further expected to improve the efficiency of packaging imagers compared to the manual process of packaging the conventional imager shown in
The various features illustrated in the optical device workpieces shown in
The first section 1702 can be formed by molding a material to shape the first optic members 1710 and a base 1714. The base 1714 can be characterized as a substrate in the sense that it interconnects the first optic members 1710. Alternatively, the first section 1702 can be formed by etching the first optic members 1710 from a substrate. The second section 1704 can be formed by etching or molding the second optic members 1720 in a manner similar to the first section 1702. The first and second sections 1702 and 1704 are then assembled to form the optical device workpiece 1700.
The optical device workpiece 1800 shown in
It will be appreciated that various modifications may be made to several of the embodiments of the optical device workpieces in
D. Wafer-level Packaging of Microelectronic Imagers
Wafer-level packaging of the microelectronic imagers 2050/2150/2250 (shown in
Another advantage of the microelectronic imagers 2050/2150/2250 is that they occupy less real estate on the boards in cell phones, PDAs, or other types of devices. Because the through-wafer interconnects in the imagers 2050/2150/2250 eliminate the need for an interposer substrate to provide external electrical contacts, the footprint of the imagers can be the same as that of the imaging unit 320 instead of the interposer substrate. The area occupied by the imagers is accordingly less than conventional imagers because the footprint of the individual imaging units 320 is significantly smaller than that of the interposer substrate. Furthermore, the imagers 2050/2150/2250 have a lower profile because eliminating the interposer substrate 20 (
A further advantage of wafer-level imager packaging is that the microelectronic imagers 2050/2150/2250 can be tested from the backside of the imaging units 320 at the wafer level before the individual imagers are singulated. A test probe can test the individual microelectronic imagers using the through-wafer interconnects and backside electrical contact pads. Accordingly, because the test probe engages contact pads on the backside of the imagers, it will not damage the image sensors 330, the optical devices 1030, or associated circuitry on the front of the microelectronic imagers. Moreover, the test probe cannot obstruct the image sensors 330 during a backside test, which allows the test probe to test a larger number of imaging units 320 at one time compared to processes that test imaging dies from the front side. It is accordingly more efficient in terms of cost and time to test the microelectronic imagers at the wafer level (i.e., before singulation) than to test each imager from the front side of the dies. Furthermore, it is advantageous to test the microelectronic imagers in an environment where the individual image sensors 330 and/or optics units 1050 will not be damaged during testing.
Yet another advantage of wafer-level processing is that the first substrate 310 can be singulated after assembling the optical devices 1030 to the imaging units 320. The optical devices 1030 can accordingly protect the imager sensors 330 from particles generated during the singulation process. Thus, the likelihood that the image sensors 330 will be damaged during singulation and subsequent handling is significantly reduced.
The individual imagers 2700 provide many of the same features as the imagers 2050/2150/2250 described above with reference to
From the foregoing, it will be appreciated that specific embodiments of the invention have been described herein for purposes of illustration, but that various modifications may be made without deviating from the spirit and scope of the invention. The features and components of any of the embodiments shown above can be interchanged with each other in additional embodiments of the invention. For example, the stand-offs 2340 of the spacer 2304 shown in
Claims
1. A method of packaging a microelectronic imager, comprising:
- providing an imager workpiece comprising a first substrate and a plurality of imaging units formed on and/or in the first substrate, wherein individual imaging units comprise an image sensor, an integrated circuit formed in the first substrate and electrically coupled to the image sensor, and a plurality of external electrical contacts coupled to the integrated circuit and having contact pads arranged on the first substrate;
- providing an optical device workpiece having a second substrate and a plurality of optical devices formed on and/or in the second substrate, wherein individual optical devices comprise an optics element; and
- assembling the optical devices with corresponding imaging units so that an optics element of one optical device is positioned at a desired location with respect to an image sensor of a corresponding imaging unit before cutting the first substrate and/or the second substrate.
2. The method of claim 1 wherein the first substrate comprises a wafer having front side and a backside, the image sensors are at the front side of the wafer, and the contact pads are at the backside of the wafer, and wherein providing the imager workpiece comprises constructing through-wafer interconnects extending through at least a portion of the wafer to electrically couple contact pads to corresponding integrated circuits.
3. The method of claim 1 wherein providing the imager workpiece comprises forming the image sensors on a front side of the first substrate and forming the contact pads on a backside of the first substrate, and wherein the front side faces toward the optical device workpiece and the backside faces away from the optical device workpiece.
4. The method of claim 1 wherein the optics elements comprise lenses configured to direct radiation to corresponding image sensors, and providing the optical device workpiece comprises producing lenses on the second substrate in a pattern corresponding to a pattern of the image sensors on the first substrate.
5. The method of claim 4 wherein producing the lenses comprises molding the lenses on the second substrate, etching the lenses into the second substrate and/or attaching the lenses to the second substrate.
6. The method of claim 1 wherein the optics elements comprise lenses arranged in a pattern on the second substrate corresponding to a pattern of the image sensors on the first substrate, and wherein assembling the optical devices with corresponding imaging units comprises:
- aligning the lenses with corresponding image sensors;
- spacing the first substrate apart from the second substrate by a desired distance; and
- fixing the first substrate relative to the second substrate.
7. The method of claim 1, further comprising:
- providing a spacer between the imager workpiece and the optical device workpiece; and
- fixing the imager workpiece to one portion of the spacer and fixing the optical device workpiece to another portion of the spacer to fix the first substrate relative to the second substrate with the first and second substrates being separated by a desired distance, wherein the spacer has a plurality of openings arranged such that individual openings are aligned with a corresponding image sensor and a corresponding optics element.
8. The method of claim 1, further comprising:
- providing a spacer having a plurality of stand-offs, and wherein each stand-off has an opening; and
- arranging the imager workpiece, the stand-offs and the optical device workpiece so that the imager workpiece is fixed to one portion of the stand-offs and the optical device workpiece is fixed to another portion of the stand-offs, wherein an individual image sensor and a corresponding optics element are aligned with an opening of one of the stand-offs.
9 The method of claim 1 wherein:
- the optical devices are assembled with corresponding imaging units before cutting either of the first substrate or the second substrate; and
- the method further comprises cutting the first and second substrates to singulate individual imagers from each other.
10. The method of claim 1 wherein:
- the second substrate is cut to singulate the optical devices from each other before assembling the optical devices with corresponding imaging units; and
- the method further comprises (a) attaching separate optical devices to corresponding imaging units and (b) cutting the first substrate to singulate the imaging units from each other.
11. The method of claim 1 wherein:
- the first substrate is cut to singulate the imaging units from each other before assembling the optical devices with corresponding imaging units; and
- the method further comprises (a) attaching separate imaging units to corresponding optical devices and (b) cutting the second substrate to singulate the optical devices from each other.
12. A method of packaging a microelectronic imager, comprising:
- providing an imager workpiece comprising a first substrate, a plurality of microelectronic image sensors arranged in a pattern on the first substrate, and cutting lanes between adjacent image sensors;
- providing an optical device workpiece comprising a second substrate and a plurality of optics elements arranged on the second substrate at least generally in the pattern of the image sensors on the first substrate;
- fixing the imager workpiece relative to the optical device workpiece so that individual image sensors on the first substrate are aligned with corresponding optics elements on the second substrate; and
- cutting the first and second substrates along the cutting lanes after fixing the imager workpiece relative to the optical device workpiece.
13. The method of claim 12 wherein the first substrate comprises a wafer having front side and a backside, the image sensors are at the front side of the wafer, and the imager workpiece further comprises a plurality of contact pads at the backside of the wafer, and wherein providing the imager workpiece comprises constructing through-wafer interconnects extending through at least a portion of the wafer to electrically couple the contact pads to corresponding integrated circuits.
14. The method of claim 12 wherein providing the imager workpiece comprises forming the image sensors on a front side of the first substrate and forming a plurality of contact pads on a backside of the first substrate, and wherein the front side faces toward the optical device workpiece and the backside faces away from the optical device workpiece.
15. The method of claim 12, further comprising:
- providing a spacer between the imager workpiece and the optical device workpiece; and
- fixing the imager workpiece to one portion of the spacer, and fixing the optical device workpiece to another portion of the spacer to fix the first substrate relative to the second substrate with the first and second substrates being separated by a desired distance, wherein the spacer has a plurality of openings arranged such that individual openings are aligned with a corresponding image sensor and a corresponding optics element.
16. The method of claim 12, further comprising:
- providing a spacer having a plurality of stand-offs, and wherein each stand-off has an opening; and
- arranging the imager workpiece, the stand-offs and the optical device workpiece so that the imager workpiece is fixed to one portion of the stand-offs and the optical device workpiece is fixed to another portion of the stand-offs, wherein an individual image sensor and a corresponding optics element are aligned with an opening of one of the stand-offs.
17. A method of packaging a microelectronic imager, comprising:
- forming a plurality of imaging units on and/or in a first substrate having a front side and a backside, each imaging unit having an image sensor at the front side of the first substrate and external contact pads at the backside of the first substrate operatively coupled to the image sensor;
- fabricating a plurality of optical devices on and/or in a second substrate, each optical device having an optics element; and
- fixing the imaging units relative to the optics elements in a spaced apart relationship before cutting the first substrate and/or the second substrate, wherein the image sensors are sealed in discrete compartments in alignment with a corresponding one of the optics elements.
18. The method of claim 17 wherein the optics elements comprise lenses configured to direct radiation to corresponding image sensors, and fabricating a plurality of optical devices comprises producing lenses on the second substrate in a pattern corresponding to a pattern of the image sensors on the first substrate.
19. The method of claim 18 wherein producing the lenses comprises molding the lenses on the second substrate, etching the lenses into the second substrate and/or attaching the lenses to the second substrate.
20. The method of claim 17 wherein the optics elements comprise lenses arranged in a pattern on the second substrate corresponding to a pattern of the image sensors on the first substrate, and wherein fixing the imaging units relative to the optics elements comprises:
- aligning the lenses with corresponding image sensors;
- spacing the first substrate apart from the second substrate by a desired distance; and
- fixing the first substrate relative to the second substrate.
21. The method of claim 17, further comprising:
- providing a spacer between the first substrate and the second substrate; and
- fixing the first substrate to one portion of the spacer and fixing the second substrate to another portion of the spacer to fix the first substrate relative to the second substrate with the first and second substrates being separated by a desired distance, wherein the spacer has a plurality of openings arranged such that individual openings are aligned with a corresponding image sensor and a corresponding optics element.
22 The method of claim 17 wherein:
- the imaging units are fixed relative to the optics elements before cutting either of the first substrate or the second substrate; and
- the method further comprises cutting the first and second substrates to singulate individual imagers from each other.
23. The method of claim 17 wherein:
- the second substrate is cut to singulate the optical devices from each other before the imaging units are fixed relative to the optics elements; and
- the method further comprises (a) attaching separate optical devices to corresponding imaging units and (b) cutting the first substrate to singulate the imaging units from each other.
24. The method of claim 17 wherein,
- the first substrate is cut to singulate the imaging units from each other before the imaging units are fixed relative to the optics elements; and
- the method further comprises (a) attaching separate imaging units to corresponding optical devices and (b) cutting the second substrate to singulate the optical devices from each other.
25. A method of packaging a microelectronic imager, comprising:
- forming a plurality of imaging units on and/or in a first substrate, the imaging units being arranged in a die pattern, and individual imaging units having an image sensor and an array of external contact pads electrically coupled to the image sensor;
- fabricating a plurality of optical devices on and/or in a second substrate, the optical devices being arranged in a device pattern at least generally corresponding to the die pattern of the imaging units, and individual optical devices having an optics element;
- constructing a spacer having individual openings arranged to be aligned with the die pattern and the device pattern; and
- fixing the first substrate relative to the second substrate with the spacer assembly between the first and second substrates, wherein individual imaging sensors on the first substrate are aligned with (a) a corresponding one the openings of the spacer assembly and (b) a corresponding one of the optics elements on the second substrate.
26. The method of claim 25 wherein the first substrate comprises a wafer having front side and a backside, the image sensors are at the front side of the wafer, and the contact pads are at the backside of the wafer, and wherein forming a plurality of imaging units comprises constructing through-wafer interconnects extending through at least a portion of the wafer to electrically couple contact pads to corresponding integrated circuits.
27. The method of claim 25 wherein forming a plurality imaging units comprises forming the image sensors on a front side of the first substrate and forming the contact pads on a backside of the first substrate, and wherein the front side faces toward the optical device workpiece and the backside faces away from the optical device workpiece.
28. The method of claim 25 wherein the optics elements comprise lenses configured to direct radiation to corresponding image sensors, and fabricating the optical devices comprises producing lenses on the second substrate arranged in the device pattern.
29. The method of claim 28 wherein producing the lenses comprises molding the lenses on the second substrate, etching the lenses into the second substrate and/or attaching the lenses to the second substrate in the device pattern.
30. A microelectronic imager assembly, comprising:
- an imager workpiece having a first substrate and a plurality of imaging units formed on and/or in the first substrate, the imaging units individually comprising an image sensor, an integrated circuit electrically coupled to the image sensor, and external electrical contacts having contact pads on the first substrate coupled to the integrated circuit; and
- an optical device workpiece having a second substrate and a plurality of optical devices on and/or in the second substrate, the optical devices individually comprising an optics element, wherein the first and second substrates are fixed relative to each other in a spaced apart relationship so that the image sensors are aligned with corresponding optics elements.
31. The imager assembly of claim 30 wherein the first substrate comprises a semiconductor wafer and the second substrate comprises a glass wafer.
32. The imager assembly of claim 30 wherein the first substrate comprises a semiconductor wafer and the second substrate comprises a quartz wafer.
33. The imager assembly of claim 30 wherein:
- the first substrate has a front side and a backside;
- the image sensors are at the front side of the first substrate;
- the contact pads are at the backside of the first substrate; and
- the external electrical contacts further comprise through-wafer interconnects extending at least partially through the first substrate, the through-wafer interconnects operatively coupling contact pads at the backside to integrated circuits of corresponding image sensors at the front side.
34. The imager assembly of claim 30 wherein the first substrate has a front side and a backside, the image sensors are at the front side of the first substrate, and the contact pads are at the backside of the first substrate.
35. The imager assembly of claim 30 wherein:
- the first substrate has a front side and a backside;
- the image sensors are at the front side of the first substrate;
- the contact pads are at the backside of the first substrate;
- the imaging units further comprise a plurality of terminals at the front side of the first substrate, the terminals being electrically coupled to integrated circuits of corresponding image sensors; and
- the external electrical contacts further comprise through-wafer interconnects extending through the first substrate, the through-wafer interconnects having first ends connected to the terminals and second ends connected to the contact pads.
36. The imager assembly of claim 30 wherein the optics elements comprise lenses in and/or on the second substrate.
37. The imager assembly of claim 30 wherein the second substrate comprises a glass wafer and the optics elements comprise lenses in and/or on the glass wafer.
38. The imager assembly of claim 30 wherein the second substrate comprises a glass wafer having a filtering film and the optics elements comprise lenses in and/or on the glass wafer.
39. The imager assembly of claim 38 wherein individual lenses comprise a focusing lens and/or a pin-hole lens.
40. A microelectronic imager assembly, comprising:
- a first substrate having a front side and a backside, a plurality of image sensors at the front side of the first substrate, a plurality of external electrical contacts having contact pads on the backside of the first substrate, and interconnects extending through at least a portion of the first substrate and electrically coupled to the contact pads on the backside of the first substrate;
- a second substrate having a plurality of optics elements, wherein the optics elements are aligned with corresponding image sensors; and
- a spacer having a first portion attached to the first substrate and a second portion attached to the second substrate, the spacer having openings arranged in a pattern such that individual openings are aligned with (a) a corresponding one of the image sensors and (b) a corresponding one of the optics elements.
41. The imager assembly of claim 40 wherein the optics elements comprise lenses in and/or on the second substrate.
42. The imager assembly of claim 40 wherein the second substrate comprises a glass wafer and the optics elements comprise lenses in and/or on the glass wafer.
43. The imager assembly of claim 40 wherein the second substrate comprises a glass wafer having a filtering film and the optics elements comprise lenses in and/or on the glass wafer.
44. The imager assembly of claim 43 wherein individual lenses comprise a focusing lens and/or a pin-hole lens.
45. A microelectronic imager assembly, comprising:
- a first substrate having (a) a first imaging unit including a first microelectronic image sensor and a first array of external contacts having contact pads operatively coupled to the first image sensor and (b) a second imaging unit including a second microelectronic image sensor and a second array of external contacts having contact pads operatively coupled to the second image sensor;
- a first optics element fixed relative to the first imaging unit in alignment with the first microelectronic image sensor; and
- a second optics element fixed relative to the second imaging unit in alignment with the second microelectronic image sensor.
46. The imager assembly of claim 45, wherein the first substrate has a front side and a backside, the first and second image sensors are at the front side, and the contact pads are at the backside.
47. The imager of claim 46, further comprising a plurality of through-wafer interconnects extending through at least a portion of the first substrate, the through-wafer interconnects being coupled to the contact pads.
48. A microelectronic imager assembly, comprising:
- a imager workpiece including a first substrate having a front side and a backside, a first imaging unit including a first microelectronic image sensor at the front side of the first substrate and a first array of external contacts having contact pads at the backside of the first substrate coupled to the first image sensor, and a second imaging unit including a second microelectronic image sensor at the front side of the first substrate and a second array of external contacts having contact pads at the backside of the first substrate coupled to the second image sensor;
- a first optics element fixed relative to the first imaging unit in alignment with the first microelectronic image sensor; and
- a second optics element fixed relative to the second imaging unit in alignment with the second microelectronic image sensor.
49. A microelectronic imager assembly, comprising:
- an imager workpiece having a first substrate and a plurality of microelectronic imaging means formed in and/or on the first substrate; and
- an optical device workpiece having a second substrate fixedly coupled to the first substrate, the optical device workpiece having a plurality of optical device means in and/or on the second substrate in alignment with corresponding imaging means of the image workpiece.
50. A microelectronic imager, comprising:
- an imaging unit including a die having a front side and a backside, an image sensor at the front side of the die, and a plurality of contact pads at the backside of the die, the contacts being electrically coupled to the image sensor; and
- an optical device having a substrate that is at least substantially non-transmissive to infrared radiation and an optics element integrated with the substrate, the optics element being aligned with the image sensor and configured to manipulate radiation for the image sensor.
51. The microelectronic imager of claim 50, further comprising a stand-off between the imaging unit and the optical device, the stand-off having an opening aligned with the image sensor and the optics element, and the image sensor being exposed to the optics element without another transparent member therebetween.
52. A microelectronic imager, comprising:
- an imaging unit including a die having a front side and a backside, an image sensor at the front side of the die, an integrated circuit electrically coupled to the image sensor, a plurality of through-wafer interconnects electrically coupled to the integrated circuit and extending through the die to the backside, and a plurality of contact pads at the backside of the die and connected to the interconnects; and
- an optical device fixed with respect to the imaging unit and having an optics element aligned with the image sensor.
53. A microelectronic imager, comprising:
- an imaging unit including a die having a front side and a backside, an image sensor at the front side of the die, an integrated circuit electrically coupled to the image sensor, a plurality of through-wafer interconnects electrically coupled to the integrated circuit and extending through the die to the backside, and a plurality of contact pads at the backside of the die and connected to the interconnects;
- a stand-off projecting from the die and having an opening aligned with the image sensor; and
- an optical device attached to the stand-off, the optical device having a substrate and an optics element on and/or in the substrate aligned with the image sensor.
54. A microelectronic imager, comprising:
- an imaging unit including a die having a front side and a backside, an image sensor at the front side of the die, and a plurality of contact pads at the backside of the die, the contact pads being operatively coupled to the image sensor for electrically attaching the imager to an external device; and
- an optical device fixed with respect to the imaging unit and having an optics element aligned with the image sensor.
Type: Application
Filed: Jun 9, 2004
Publication Date: Dec 15, 2005
Inventors: Salman Akram (Boise, ID), Peter Benson (Boise, ID), Warren Farnworth (Nampa, ID), William Hiatt (Eagle, ID)
Application Number: 10/863,994