Method for recycling/reclaiming a monitor wafer

Abstract

The present invention provides a method for recycling/reclaiming a monitor wafer and a method for testing a manufacturing process. The method for recycling/reclaiming the monitor wafer, among other steps, includes providing a monitor wafer having a number of front surface defects thereon (110), and annealing the monitor wafer in a presence of an inert gas to correct one or more of the number of front surface defects (150).

Description

TECHNICAL FIELD OF THE INVENTION

The present invention is directed, in general, to a method for manufacturing an integrated circuit and, more specifically, to a method for recycling/reclaiming a monitor wafer used in the manufacture of an integrated circuit.

BACKGROUND OF THE INVENTION

In practical semiconductor fabrication, hundreds and hundreds of individual manufacturing steps are required to convert a bare silicon wafer into one or more operational integrated circuits (ICs). In an effort to save time and money, after each individual manufacturing step is set up a monitor or test wafer is processed through the given manufacturing step to examine whether the manufacturing step achieves its intended purpose. If the specific manufacturing step being tested achieves its intended purpose, then the manufacturer is confident that actual device wafers may be subjected to the manufacturing step. However, if the specific manufacturing step being tested does not achieve its intended purpose, the manufacturing step may be tweaked and tested again, without subjecting actual device wafers to the unsatisfactory manufacturing step.

The industry, as a result of the extreme number and cost of the monitor wafers being used, currently attempts to recycle or reclaim these used monitor wafers. The recycling or reclaiming of the used monitor wafers typically begins by determining what type of used monitor wafer is being recycled or reclaimed. Knowing that information, the specific type of chemical etch, chemical strip, and/or polish that is required to return the monitor wafer to a suitable state, may be determined.

However, conventional technologies do not always thoroughly restore the original condition of a monitor wafer. For example, conventional technologies are not capable of removing or reducing the number of crystal oriented pits (COPs) or oxygen induced stacking faults (OISFs), thereby making it more atomically flat, that show up on the surface of the monitor wafer. OISFs typically result when oxygen precipitates out of the wafer during one or more of the multiple thermal cycles the monitor wafer experiences during its testing. As the COPs and OISFs show up as light point defects, similar to airborne particles, the industry generally finds them undesirable. This is particularly evident, as the specification requirements of the industry continue to tighten. For example, where the industry was previously in agreement with up to about 25 particles of 0.2 microns or less per wafer, the industry in certain instances now requires less than about 25 particles of 0.16 microns or less. With the current two or three step polish processes for recycled/reclaimed wafers, COPs and other crystal oriented front surface defects are quite abundant at the sub 0.17 micron level. If the COPs or OISFs may be removed from this count, the manufacturers defect specifications are easier to attain.

Therefore, what is needed in the art is a method for recycling/reclaiming silicon wafers that does not experience the drawbacks of the prior art processes.

SUMMARY OF THE INVENTION

To address the above-discussed deficiencies of the prior art, the present invention provides a method for recycling/reclaiming a monitor wafer and a method for testing a manufacturing process. The method for recycling/reclaiming the monitor wafer, among other steps, includes providing a monitor wafer having a number of front surface defects thereon, and annealing the monitor wafer in a presence of an inert gas to correct one or more of the number of front surface defects.

The method for testing a manufacturing process, on the other hand, includes (1) providing a monitor wafer, (2) forming one or more integrated circuit films on the monitor wafer and testing the one or more integrated circuit films, the process of forming or testing the one or more integrated circuit films on the monitor wafer causing the monitor wafer to have a number of front surface defects thereon, (3) annealing the monitor wafer in a presence of an inert gas to correct one or more of the number of front surface defects, and thereby recycling/reclaiming the monitor wafer.

The foregoing has outlined preferred and alternative features of the present invention so that those skilled in the art may better understand the detailed description of the invention that follows. Additional features of the invention will be described hereinafter that form the subject of the claims of the invention. Those skilled in the art should appreciate that they can readily use the disclosed conception and specific embodiment as a basis for designing or modifying other structures for carrying out the same purposes of the present invention. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

For a more complete understanding of the present invention, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:

FIG. 1 illustrates a flow chart depicting one process flow that could be used to test a manufacturing process, which takes advantage of the unique recycling/reclamation method of the present invention.

DETAILED DESCRIPTION

The present invention, in contrast to the prior art, begins with the unique recognition that if front surface defects on a monitor wafer caused during either the formation of the integrated circuit (IC) films on the monitor wafers or the testing of those films can be corrected, the effective useful life of the monitor wafer can be greatly increased. Namely, the present invention has recognized that if the front surface effects can be corrected, less lapping and polishing of the monitor wafer is required to sufficiently correct those front surface defects during the recycling/reclamation process. Therefore, the monitor wafer, and more specifically the thickness of the monitor wafer, withstands many more recycling/reclamation processes before being unsuitable for additional testing purposes.

Given the aforementioned recognition, the present invention observed that by annealing the monitor wafer in a presence of an inert gas, one or more of the front surface defects created during either the formation of the IC films on the monitor wafers or the testing of those films, may be corrected. Accordingly, depending on the specifications of the IC manufacturer purchasing the recycled/reclaimed monitor wafer, less of the monitor wafer need be lapped or polished. Thus, the effective lifespan of any given monitor wafer can be increased over what it once was using the prior art etching and polishing process. As new monitor wafers can cost upwards of $50 each, this saving represents a significant savings to the industry.

Turning now to FIG. 1, illustrated is a flow chart 100 depicting one process flow that could be used to test a manufacturing process, that takes advantage of the unique recycling/reclamation method of the present invention. While the flow chart 100 depicted in FIG. 1 includes about 10 specific steps, those skilled in the art understand that fewer or more steps could be used and remain within the scope of the present invention. While many of the additional steps will not be discussed, certain ones of those additional steps will be discussed.

The method for testing the manufacturing process using the unique method for recycling/reclaiming the wafer begins in a start step 105. Thereafter, in a step 110, a wafer is provided. The wafer, which may comprise a number of different types and qualities, in the embodiment of the present invention is a virgin monitor wafer. In an exemplary embodiment, the virgin monitor wafer is a wafer that was formed using the well known Czochralski method, or a slight variation thereof. Other known or hereafter discovered manufacturing techniques could, however, also be used to form the virgin monitor wafer and stay within the scope of the present invention.

The wafer, depending on its intended use and the IC manufacturer using it, will include a given set of parameters. For instance, the wafer will most likely be designed to have a certain amount of resistance, a certain dopant type and amount, certain thickness, certain surface roughness, etc. In addition to those parameters, the initial wafer will most likely also contain only a certain number of surface defects of a prescribed size. For instance, certain manufacturers require that the initial wafer contains less than about 25 defects of 0.2 microns or larger, or less than about 100 defects of 0.12 microns or larger or larger when used for testing purposes.

After providing the wafer, in a step 120, one or more IC films may be formed on the wafer. As is appreciated by those skilled in the art, the one or more IC films may comprise any material layer formed on the wafer that might be used in the typical manufacture of an IC. For example, the IC films could be a collection of dielectric and conductive layers, or in alternative embodiments just dielectric or conductive layers. The number and type of films generally depends on the specific parameter of the manufacturing process, or in this case IC, that needs testing. As used herein, however, the IC film could also include a doped region in the wafer itself or one of the other IC films located thereon.

After forming the IC films in a desired manner, the properties of the one or more IC films may be tested in a step 130. The testing of the IC films may consist of a collection of one or more electrical, thermal, mechanical, or other known tests. Those skilled in the art understand the numerous different tests that might be applied to test the IC films. For this reason, no discussion is warranted.

It is believed that the formation of the IC films and/or the testing of the IC films causes one or more front surface defects to occur in the wafer. The front surface defects, in one embodiment of the invention, comprise crystal originate pits (COPs). The front surface defects may, however, comprise in addition to or in place of the COPs, oxygen induced stacking faults (OISFs) caused by the oxygen precipitating in the wafer during thermal cycles that occurred during the formation of the IC films and/or the testing of the IC films. While it is not currently believed that these COPs or OISFs are detrimental to the testing of the IC films, during the visual inspection of the recycled/reclaimed wafer they show up as defects just the same. For instance, both show up as light point defects just the same as particle imperfections. As each specific IC manufacturer has a predetermined size and amount of defects per wafer, these COPs and OISFs often cause a wafer to be rejected.

In a common scenario, the wafer that has been subjected to the formation and testing of the one or more films contains at least about 500 front surface defects, such as crystal oriented front surface defects, of 0.09 microns or larger. A significant portion of those 500 front surface defects of 0.09 microns or larger are COPs or OISFs. In most instances too many front surface defects exist to meet the manufactures defect specifications.

Therefore, in steps 140 through 170, as well as any steps in-between, the wafers are recycled/reclaimed using a unique method that corrects one or more of the front surface defects caused by the formation of the IC films and/or the testing of the IC films. Therefore, steps 140 through 170, as well as the intermediate steps, allow the recycled/reclaimed wafer to meet the predetermined specifications of the IC manufacturers more often and easier. Additionally, these steps allow the effective lifespan of the wafer to significantly increase, as less severe etching and polishing procedures are required to remove the front surface defects. In an exemplary embodiment, the unique process of the present invention forgoes the need for etching or polishing the wafer to remove the front surface defects.

Consequently, in a step 140, the one or more IC films located on the wafer may be removed. As those skilled in the art are aware, without the removal of these IC films the wafer may not easily be reused. The removal of the IC films may be accomplished using a number of different processes, as well as combination of processes. After chemically etching the one or more IC films from the wafer, the wafer may be subjected to a one or more step polishing process. For example, in an exemplary embodiment a two-step polishing process is used, wherein the first step of the polishing process is a rough polish and the second step of the polishing process is a mirror polish. It should be noted, however, that the removal of the IC films could be accomplished using any combination of one or more of a chemical etch or polishing process.

Following the IC film removal process, in one embodiment of the invention the wafer is subjected to a modified RCA chemistry. The modified RCA chemistry used in the exemplary embodiment of the invention includes a first SC1 solution (e.g., hydrogen peroxide, ammonia hydroxide and DI water) followed by a second SC2 solution (e.g., hydrochloric acid, hydrogen peroxide and DI water).

After removing the IC films, in a step 150, the wafer is subjected to a unique anneal to correct one or more of the front surface defects on the wafer. The anneal is accomplished in the presence of an inert gas. In an exemplary embodiment this inert gas includes hydrogen, argon, another similar inert gas or any combinations thereof. In an alternative embodiment, however, it has been observed that deuterium, which is an isotope of hydrogen, works significantly well. The gas flow of the specific gases used may vary greatly. It is believed that a flow rate of 2000 sccm to about 50000 sccm would provide excellent results.

The anneal, which may be accomplished using a rapid thermal anneal, furnace anneal, or another similar process, optimally occurs at a temperature of greater than about 1000° C. for a time period of greater than about 10 minutes for the standard furnace process or a time period ranging from about 5 seconds to about 240 seconds for the rapid thermal anneal process. In an exemplary embodiment, the anneal occurs at a temperature ranging from about 1100° C. to about 1300° C. for a time period ranging from about 10 minutes to about 120 minutes for the standard furnace process or a time period ranging from about 15 seconds to about 120 seconds for the rapid thermal anneal process.

It is believed that the resulting annealed wafer may have less than about 100 front surface defects, such as crystal oriented front surface defects, of 0.09 microns or larger, many of those defects being particle defects rather than front surface defects. In an exemplary embodiment, the annealed wafer has less than about 25 front surface defects of 0.09 microns or larger.

In an optional embodiment of the present invention the wafer may be polished, whether it be rough polished or mirror polished after it has been annealed. In another embodiment the wafer is rough polished or mirror polished before it has been annealed. It is believed that after the wafer has been annealed that the wafer surface will approach its original atomically flat state.

After annealing the wafer in step 150, the annealed wafer may be inspected to determine whether it is suitable for another testing procedure, in a step 160. This inspection, as is appreciated, might be based upon the number of defects remaining on the wafer of a certain size, the thickness of the wafer, as well as other criteria. If it is determined that the anneal adequately recycled/reclaimed the wafer and that the wafer is suitable for another testing procedure, in a step 170 the process flow would return to step 120. Alternatively, if it is determined that the anneal did not adequately recycle/reclaim the wafer and that the wafer is not suitable for another testing procedure, or that the wafer is not suitable for another testing procedure for another reason, the process flow would return to step 140 assuming the wafer thickness was sufficient or move to step 180 if the wafer thickness were not sufficient, where the wafer would be discontinued for testing purposes. For example, depending on the number of testing procedures the wafer has already undergone, its thickness might be reduced to such a level that it is impractical to be reused. After the wafer is discontinued in step 180, the process would finish in step 185.

It is quite conceivable that the manufacturing process might return to steps 120 or 140 up to about 50 times before the wafer would be unsuitable for further testing procedures. As the prior art methods were generally only capable of reusing their wafers up to about 4 times, the unique method of the present invention provides tremendous cost savings to the industry.

Although the present invention has been described in detail, those skilled in the art should understand that they can make various changes, substitutions and alterations herein without departing from the spirit and scope of the invention in its broadest form.

Claims

1. A method for recycling/reclaiming a monitor wafer, comprising:

providing a monitor wafer having a number of front surface defects thereon;

annealing the monitor wafer in a presence of an inert gas to correct one or more of the number of front surface defects.

2. The method as recited in claim 1 further including removing any integrated circuit films located on the monitor wafer prior to annealing the monitor wafer.

3. The method as recited in claim 2 wherein removing any integrated circuit films includes chemically etching the monitor wafer.

4. The method as recited in claim 2 wherein removing any integrated circuit films includes polishing the monitor wafer.

5. The method as recited in claim 2 wherein removing any integrated circuit films includes chemically etching and polishing the monitor wafer.

6. The method as recited in claim 1 wherein providing a monitor wafer includes providing a monitor wafer produced by a Czochralski method.

7. The method as recited in claim 1 wherein the monitor wafer provided has more than about 500 crystal oriented front surface defects of about 0.09 microns or larger, and wherein the annealed monitor wafer has less than about 100 crystal oriented front surface defects of 0.09 microns or larger.

8. The method as recited in claim 1, wherein annealing the monitor wafer includes annealing the monitor wafer using a rapid thermal anneal or furnace anneal process.

9. The method as recited in claim 1 wherein annealing the monitor wafer includes annealing the monitor wafer using a temperature of greater than about 1000° C. for a time ranging from about 10 minutes to about 120 minutes for a standard thermal process or a time ranging from about 15 seconds to about 240 seconds for a rapid thermal anneal process.

10. The method as recited in claim 1 wherein the inert gas comprises deuterium.

11. The method as recited in claim 1 wherein the inert gas comprises a gas selected from the group consisting of hydrogen, argon, or any combination thereof.

12. The method as recited in claim 1 wherein the front surface defects are crystal originated pits caused by the formation or testing of one or more integrated circuit films on the monitor wafer.

13. The method as recited in claim 1 further including polishing the monitor wafer after annealing it.

14. A method for testing a manufacturing process, comprising:

providing a monitor wafer;

forming one or more integrated circuit films on the monitor wafer and testing the one or more integrated circuit films, the process of forming or testing the one or more integrated circuit films on the monitor wafer causing the monitor wafer to have a number of front surface defects thereon;

annealing the monitor wafer in a presence of an inert gas to correct one or more of the number of front surface defects, and thereby recycling/reclaiming the monitor wafer.

15. The method as recited in claim 14 further including removing the one or more integrated circuit films located on the monitor wafer prior to annealing the monitor wafer.

16. The method as recited in claim 14 wherein providing a monitor wafer includes providing a monitor wafer produced by a Czochralski method.

17. The method as recited in claim 14 wherein the monitor wafer provided has more than about 500 crystal oriented front surface defects of about 0.09 microns or larger, and wherein the annealed monitor wafer has less than about 100 crystal oriented front surface defects of 0.09 microns or larger.

18. The method as recited in claim 14 wherein annealing the monitor wafer includes annealing the monitor wafer using a temperature of greater than about 1000° C. for a time ranging from about 10 minutes to about 120 minutes for a standard thermal process or a time ranging from about 15 seconds to about 240 seconds for a rapid thermal anneal process.

19. The method as recited in claim 14 wherein the inert gas comprises deuterium.

20. The method as recited in claim 14 further including forming one or more integrated circuit films on the monitor wafer and then annealing the monitor wafer, up to about 50 times before discarding the monitor wafer.