Patents Assigned to Texas Instruments Incorporated
  • Patent number: 10666276
    Abstract: In some embodiments, an analog-to-digital converter (ADC) comprises a loop filter configured to produce an error signal based on a difference between an analog input signal and a feedback signal. The ADC also comprises a main comparator set comprising one or more main comparators, the main comparator set configured to digitize the error signal and further configured to drive a main digital-to-analog converter (DAC). The ADC further comprises an auxiliary comparator set comprising a plurality of auxiliary comparators, the auxiliary comparator set configured to digitize the error signal when the ADC is in a runaway state and further configured to drive an auxiliary DAC to bring the error signal into a predetermined range.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: May 26, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Krishnaswamy Nagaraj
  • Patent number: 10666279
    Abstract: A circuit includes a phase control logic, an analog-to-digital converter (ADC), and digital logic. The phase control logic is configured to couple to a plurality of power phases of a multi-phase power supply. The digital logic is configured to couple to the phase control logic and the ADC, to receive an instruction to operate in a self-calibration mode of operation, receive a first message including a value associated with a calibrated load configured to couple to the plurality of power phases, perform a self-calibration sub-routine for each power phase of the plurality of power phases based at least partially on the received instruction, the received first message, and a signal received from the ADC, and receive a second message instructing the digital logic to store a result of the self-calibration in a memory of the circuit.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: May 26, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Matthew John Ascher Schurmann, Mayank Jain, Wenkai Wu, Preetam Charan Anand Tadeparthy, Kuang-Yao Cheng
  • Patent number: 10666293
    Abstract: A digital down converter includes a low resolution mixer, a decimation filter, and a high resolution mixer. The low resolution mixer is configured to receive a digitized radio frequency signal, and apply a first down conversion to the radio frequency signal to produce an intermediate frequency signal. The decimation filter is coupled to the low resolution mixer. The decimation filter is configured to receive the intermediate frequency signal, and reduce a sampling rate of the intermediate frequency signal to produce a decimated intermediate frequency signal. The high resolution mixer is coupled to the decimation filter. The high resolution mixer is configured to receive the decimated intermediate frequency signal, and apply a second down conversion to the decimated intermediate frequency signal to produce a down converted signal.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: May 26, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jawaharlal Tangudu, Suvam Nandi, Jaiganesh Balakrishnan
  • Patent number: 10666204
    Abstract: A circuit includes an amplifier to amplify an input signal and generate an output signal. The circuit also includes a tuning network to tune frequency response of the amplifier. The tuning network includes at least one tunable capacitor, which includes at least one micro-electro mechanical system (MEMS) capacitor. The amplifier could include a first die, the at least one MEMS capacitor could include a second die, and the first die and the second die could be integrated in a single package. The at least one MEMS capacitor could include a MEMS superstructure over a control structure, which is to control the MEMS superstructure and tune the capacitance of the at least one MEMS capacitor.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: May 26, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Aritra Banerjee, Nathan R. Schemm, Rahmi Hezar, Lei Ding, Baher Haroun
  • Patent number: 10666137
    Abstract: An inductor conducts a first current, which is variable. A first transistor is coupled through the inductor to an output node. The first transistor alternately switches on and off in response to a voltage signal, so that the first current is: enhanced while the first transistor is switched on in response to the voltage signal; and limited while the first transistor is switched off in response to the voltage signal. A second transistor is coupled to the first transistor. The second transistor conducts a second current, which is variable. On/off switching of the second transistor is independent of the voltage signal. Control circuitry senses the second current and adjusts the voltage signal to alternately switch the first transistor on and off in response to: the sensing of the second current; and a voltage of the output node.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: May 26, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Erick Omar Torres, Harish Venkataraman, Philomena C. Brady
  • Patent number: 10666180
    Abstract: An adaptive torque disturbance cancellation method and motor control system for rotating a load are described. The system has: (i) a speed controller for receiving a first input signal indicating a desired motor speed and, in response, for outputting a motor control signal; (ii) current sensing circuitry for sensing current through a motor that rotates in response to the speed controller; (iii) circuitry for storing, into a storage device, history data representative of the current through a motor when the motor operates to rotate the load; and (iv) circuitry for modifying the motor control signal in response to the history data.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: May 26, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: David L. Wilson, Jorge Zambada Tinoco, David Patrick Magee
  • Patent number: 10666146
    Abstract: In some examples, a device comprises a capacitor a bidirectional inverting buck-boost converter coupled to the capacitor and configured to couple to multiple loads and to a voltage source, wherein the bidirectional inverting buck-boost converter is configured to: compare a voltage across the capacitor with a reference voltage; and based on the comparison, facilitate converting a dissipation current flowing from one of the multiple loads into a recycling current.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: May 26, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Ingolf Edgar Frank, Lars Lotzenburger, Matthieu Etienne Chevrier
  • Patent number: 10666144
    Abstract: A DC-DC converter controller includes a transistor driver, a flip-flop, a comparator, an integrator circuit, a switch, and a pulse generator circuit. The flip-flop includes an output coupled to an input of the transistor driver. The comparator includes an output coupled an input of the flip-flop. The integrator circuit includes an output coupled to an input of the comparator. The switch includes a first terminal coupled to the output of the integrator circuit, and a second terminal coupled to ground. The pulse generator circuit includes an input coupled to an output of the transistor driver, and an output coupled to a third terminal of the switch.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: May 26, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Linghan Xie, Jianzhang Xie, Wei Zhao, Weicheng Zhang
  • Patent number: 10664424
    Abstract: One example relates to a device that includes an activity monitor. The activity monitor includes a bus interface having inputs coupled to receive signals from a bus and having outputs coupled to provide signals to an other device. The activity monitor monitors the bus for a message directed to a predefined address that is associated with the other device in response to detecting that the other device is a low power sleep mode, the activity monitor outputs the predefined address to the other device to enable the other device to capture the predefined address, via the bus interface, in response to the monitored address matching the predefined address that is associated with the other device.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: May 26, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Gary Franklin Chard, Tpinn Ronnie Koh, Harshil Atulkumar Shah
  • Patent number: 10666257
    Abstract: A wide-voltage range, failsafe output interface module including a low-voltage, drain extended MOSFETs has been proposed to prevent the flow of reverse current during a failsafe operation while ensuring the MOSFETs are not subject to voltage over their voltage tolerance levels, improving reliability of an output interface module without resorting to more costly transistors with thicker films.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: May 26, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Srikanth Srinivasan, Devraj Rajagopal
  • Patent number: 10665475
    Abstract: A quad flat no lead (“QFN”) package that includes a die having an active side positioned substantially in a first plane and a backside positioned substantially in a second plane parallel to the first plane; a plurality of separate conductive pads each having a first side positioned substantially in the first plane and a second side positioned substantially in the second plane; and mold compound positioned between the first and second planes in voids between the conductive pads and the dies. Also a method of producing a plurality of QFN packages includes forming a strip of plastic material having embedded therein a plurality of dies and a plurality of conductive pads that are wire bonded to the dies and singulating the strip into a plurality of QFN packages by cutting through only the plastic material.
    Type: Grant
    Filed: June 11, 2014
    Date of Patent: May 26, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Dan Okamoto, Hiroyuki Sada
  • Patent number: 10666151
    Abstract: One example includes an interleaved resonant converter circuit. The circuit includes a plurality of resonant converter circuits that are each coupled to an output node and are configured to collectively generate an output voltage on the output node in response to a respective plurality of sets of switching signals at each of a respective plurality of phases. The circuit also includes a switching controller configured to generate each of the plurality of sets of switching signals having a variable duty-cycle relative to each other at each of the plurality of phases.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: May 26, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Hrishikesh Ratnakar Nene
  • Patent number: 10665596
    Abstract: An integrated circuit and method includes self-aligned contacts. A gapfill dielectric layer fills spaces between sidewalls of adjacent MOS gates. The gapfill dielectric layer is planarized down to tops of gate structures. A contact pattern is formed that exposes an area for multiple self-aligned contacts. The area overlaps adjacent instances of the gate structures. The gapfill dielectric layer is removed from the area. A contact metal layer is formed in the areas where the gapfill dielectric material has been removed. The contact metal abuts the sidewalls along the height of the sidewalls. The contact metal is planarized down to the tops of the gate structures, forming the self-aligned contacts.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: May 26, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Steven Alan Lytle
  • Patent number: 10665543
    Abstract: An integrated circuit and method comprising an underlying metal geometry, a dielectric layer on the underlying metal geometry, a contact opening through the dielectric layer, an overlying metal geometry wherein a portion of the overlying metal geometry fills a portion of the contact opening, and an oxidation resistant barrier layer disposed between the underlying metal geometry and overlying metal geometry. The oxidation resistant barrier layer is formed of TaN or TiN with a nitrogen content of at least 20 atomic % and a thickness of at least 5 nm.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: May 26, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Jeffrey A. West, Kezhakkedath R. Udayakumar, Eric H. Warninghoff, Alan G. Merriam, Rick A. Faust
  • Patent number: 10663418
    Abstract: In described examples, one or more devices include: apparatus including a lens element and a transducer to vibrate the lens element at an operating frequency when operating in an activated state; and controller circuitry. The controller circuitry is arranged to measure an impedance of the apparatus, to determine an estimated temperature of the apparatus in response to the measured impedance, to compare the estimated temperature against a temperature threshold for delineating an operating temperature range of the apparatus, and to toggle an activation state of the transducer in response to comparing the estimated temperature against the temperature threshold.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: May 26, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: David Patrick Magee, Stephen John Fedigan
  • Patent number: 10663355
    Abstract: A device having a first terminal region and a second terminal region. The first terminal region includes fine-tune (FT) metal stripes that are separated from each other by a first distance along the longitudinal direction. The second terminal region is spaced apart from the first terminal region by at least an inter-terminal distance. The second terminal region includes coarse-tune (CT) metal stripes that are separated from each other by a second distance along the longitudinal direction. The second distance is greater than the first distance, and the inter-terminal distance greater than the second distance. Each of the FT metal stripes may be selected as a first access location, and each of the CT metal stripes may be selected as a second access location. A pair of selected first and second access locations access a sheet resistance defined by a distance therebetween.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: May 26, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Keith Ryan Green, Byron Jon Roderick Shulver
  • Patent number: 10664627
    Abstract: An end-user computing device can include a theft detector that maintains a registered host device list containing identifiers of at least one registered host device. The theft detector can have root access to operations of the end-user device and the theft detector can provides a secure reboot request in response to detecting a possible theft condition. The end-user computing device can also include a boot loader that executes a secure reboot of the end-user device in response to a secure reboot request from the theft detector. The secure reboot of the end-user device resets the end-user device to prevent access to the end-user device.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: May 26, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Veeramanikandan Raju
  • Patent number: 10663519
    Abstract: An example fault detection circuit includes: a positive sequence voltage calculator to calculate a positive sequence voltage value for a three-phase motor; a positive sequence current calculator to calculate a positive sequence current value for the three-phase motor; an interpolator to calculate an expected negative sequence voltage value based on the positive sequence voltage value, the positive sequence current value, and measured characteristics of the three-phase motor; a negative sequence voltage calculator to calculate a measured negative sequence voltage value for the three-phase motor; and a fault detector to detect that a winding fault exists in the three-phase motor when a difference between the expected negative sequence voltage value and the measured negative sequence voltage value satisfies a threshold.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: May 26, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Stephen John Fedigan
  • Patent number: 10663534
    Abstract: An integrated circuit includes a fluxgate magnetometer. The magnetic core of the fluxgate magnetometer is encapsulated with a layer of encapsulant of a nonmagnetic metal or a nonmagnetic alloy. The layer of encapsulate provides stress relaxation between the magnetic core material and the surrounding dielectric. A method for forming an integrated circuit has the magnetic core of a fluxgate magnetometer encapsulated with a layer of a nonmagnetic metal or nonmagnetic alloy to eliminate delamination and to substantially reduce cracking of the dielectric that surrounds the magnetic core.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: May 26, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mona M. Eissa, Dok Won Lee
  • Patent number: 10663566
    Abstract: Systems and methods are provided for imaging a surface via time of flight measurement. An illumination system includes an illumination driver and an illumination source and is configured to project modulated electromagnetic radiation to a point on a surface of interest. A sensor system includes a sensor driver and is configured to receive and demodulate electromagnetic radiation reflected from the surface of interest. A temperature sensor is configured to provide a measured temperature representing a temperature at one of the illumination driver and the sensor driver and located at a position remote from the one of the illumination driver and the sensor driver. A compensation component is configured to calculate a phase offset between the illumination system and the sensor system from at least the measured temperature and a model representing transient heat flow within the system.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: May 26, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Bharath Patil, Anjana Sharma, Subhash Chandra Venkata Sadhu, Ravishankar Ayyagari