Patents Assigned to Texas Instruments Incorporated
  • Patent number: 11002563
    Abstract: A first amplifier has an input to receive a Hall-signal output current from a first Hall element and has an output to output feedback current in response to the received Hall-signal output current. The Hall-signal output current is impeded by an impedance of the first Hall element. The feedback current is coupled to counterpoise the Hall-signal output current at the input, and a voltage at the output is an amplified Hall output signal. A second amplifier generates a high-frequency portion output signal in response to a difference between the amplified Hall output signal and a Hall-signal output signal from a second Hall element. A filter reduces high-frequency content of the high-frequency portion output signal and generates an offset correction signal. A third amplifier generates a corrected Hall signal in response to a difference between the amplified Hall output signal and the offset correction signal.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: May 11, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Arup Polley, Srinath Ramaswamy, Baher S. Haroun, Rajarshi Mukhopadhyay
  • Patent number: 11000915
    Abstract: In described examples, a transient liquid phase (TLP) metal bonding material includes a first substrate and a base metal layer. The base metal layer is disposed over at least a portion of the first substrate. The base metal has a surface roughness (Ra) of between about 0.001 to 500 nm. Also, the TLP metal bonding material includes a first terminal metal layer that forms an external surface of the TLP metal bonding material. A metal fuse layer is positioned between the base metal layer and the first terminal metal layer. The TLP metal bonding material is stable at room temperature for at least a predetermined period of time.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: May 11, 2021
    Assignee: Texas Instruments Incorporated
    Inventors: John Charles Ehmke, Simon Joshua Jacobs
  • Patent number: 11005381
    Abstract: A synchronous rectifier control circuit includes a drain voltage input, a first gate voltage output, a second gate voltage output, a gate voltage generation circuit, and a trigger control circuit. The gate voltage generation circuit includes a first input coupled to the drain voltage input, and an output coupled to the first gate voltage output. The trigger control circuit includes a first input coupled to the first gate voltage output, a second input coupled to the second gate voltage output, and an output coupled to a second input of the gate voltage generation circuit.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: May 11, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Bing Lu, Bharath Kannan
  • Patent number: 11006124
    Abstract: The disclosure provides a sample adaptive offset (SAO) encoder. The SAO encoder includes a statistics collection (SC) block and a rate distortion optimization (RDO) block coupled to the SC block. The SC block receives a set of deblocked pixels and a set of original pixels. The SC block categorizes each deblocked pixel of the set of deblocked pixels in at least one of a plurality of band and edge categories. The SC block estimates an error in each category as difference between a deblocked pixel of the set of deblocked pixels and corresponding original pixel of the set of original pixels. The RDO block determines a set of candidate offsets associated with each category and selects a candidate offset with a minimum RD cost. The minimum RD cost is used by a SAO type block and a decision block to generate final offsets for the SAO encoder.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: May 11, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hrushikesh Tukaram Garud, Mihir Narendra Mody, Soyeb Nagori
  • Patent number: 11004971
    Abstract: A power transistor is provided with at least one transistor finger that lies within a semiconductor material. The gate oxide is segmented into a set of segments with thick field oxide between each segment in order to reduce gate capacitance and thereby improve a resistance times gate charge figure of merit.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: May 11, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sameer Pendharkar, Ming-yeh Chuang
  • Patent number: 11003605
    Abstract: An input/output (I/O) level shifter for a subscriber identification module (SIM) interface includes a controller configured to apply a first enable signal to turn ON a first transmitter when the direction of packet flow is from an interface device to a SIM card, and is configured to apply a second enable signal to turn ON a second transmitter when the direction of packet flow is from the SIM card to the interface device. The controller is configured to not apply the first and the second enable signals concurrently. The controller selectively controls the ON/OFF period of the first and the second transmitter to maintain half-duplex communication on the interface I/O line and the SIM I/O line to prevent undesired positive data feedback.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: May 11, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Win Naing Maung, Charles Michael Campbell
  • Patent number: 11004929
    Abstract: Various examples provide an electronic device that includes first and second resistor segments. Each of the resistor segments has a respective doped resistive region formed in a semiconductor substrate. The resistor segments are connected between first and second terminals. The first resistor segment is configured to conduct a current in a first direction, and the second resistor segment is configured to conduct the current in a second different direction. The directions may be orthogonal crystallographic directions of the semiconductor substrate.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: May 11, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Dok Won Lee, Erika Lynn Mazotti, Mark Robert Visokay, William David French, Ricky Alan Jackson, Wai Lee
  • Patent number: 11004205
    Abstract: A hardware accelerator for histogram of oriented gradients computation is provided that includes a gradient computation component configured to compute gradients Gx and Gy of a pixel, a bin identification component configured to determine a bin id of an angular bin for the pixel based on a plurality of representative orientation angles, Gx, and signs of Gx and Gy, and a magnitude component configured to determine a magnitude of the gradients Gmag based on the plurality of representative orientation angles and the bin id.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: May 11, 2021
    Assignee: Texas Instruments Incorporated
    Inventor: Aishwarya Dubey
  • Patent number: 11005530
    Abstract: In a disclosed embodiment, a power line communication (PLC) transmitter includes a forward error correction (FEC) encoder that receives payload data and adds parity information to the data to create an encoded output, a fragmenter that receives the encoded output from the FEC encoder and segments the encoded output into a plurality of fragments, a fragment repetition encoder that receives the plurality of fragments from the fragmenter and copies each of the fragments a selected number of times, and an interleaver that receives the copies of the plurality of fragments from the fragment repetition encoder and interleaves the copies of the plurality of fragments for transmission on a power line.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: May 11, 2021
    Assignee: Texas Instruments Incorporated
    Inventors: Badri N Varadarajan, Anand Dabak, Il Han Kim
  • Patent number: 11004742
    Abstract: In a described example, an integrated circuit (IC) package includes an IC die disposed on a die attach pad; a plurality of leads electrically connected to terminals on the IC die, the leads including a base metal; and molding compound material encapsulating portions of the IC die, the die attach pads, and the plurality of leads; the plurality of leads having a solder joint reinforcement tab. The solder joint reinforcement tabs include a first side, a second side opposite to the first side, a third side, a fourth side opposite to and in parallel to the third side, a fifth side forming an end portion of the solder joint reinforcement tab, the solder joint reinforcement tabs including a solderable metal layer on the second, third and fourth sides and on portions of the fifth side.
    Type: Grant
    Filed: March 19, 2017
    Date of Patent: May 11, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Makoto Shibuya
  • Patent number: 11005355
    Abstract: An apparatus is disclosed for improving zero voltage switching (“ZVS”) of a converter circuit such as an active clamp flyback converter. The apparatus includes a first timing circuit acting as the TD(L-H) optimizer, which uses the zero-crossing of the auxiliary winding voltage directly to adaptively vary the dead time. A second timing circuit acting as the TD(H-L) optimizer adaptively varies the dead time with a simple piece-wide linear function as an approximation of the complex optimal equation. A third timing circuit acting as the TDM optimizer contains a charge-pump circuit that adaptively adjusts the ON time of the clamp switch based on the zero-voltage detection of switching node voltage and feed-forwards the input voltage signal to enhance tuning speed so that the correct amount of negative magnetizing current is generated to improve zero voltage switching.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: May 11, 2021
    Assignee: Texas Instruments Incorporated
    Inventors: Pei-Hsin Liu, Richard Lee Valley
  • Patent number: 11004942
    Abstract: In some examples, a system comprises a bi-directional gallium nitride (GaN) device including first and second switches and a substrate, the first switch including a first gate and a first source, the second switch including a second gate and a second source, and the substrate shared between the first and second switches. The system include a third switch coupled to the first source and the substrate. The system includes a fourth switch coupled to the second source and the substrate and a comparator having inputs coupled to the first and second sources and outputs coupled to the third and fourth switches.
    Type: Grant
    Filed: December 30, 2017
    Date of Patent: May 11, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Michael Lueders, Johan Strydom
  • Patent number: 11005370
    Abstract: The disclosure provides a multi-phase converter. The multi-phase converter includes a controller and one or more switches. The one or more switches are coupled to the controller, and configured to receive an input voltage. A switch of the one or more switches is activated by the controller in a predefined phase of N phases in the multi-phase converter, where N is a positive integer. A processing unit is coupled to the controller and estimates a number of phases to be activated based on a load current. The processing unit also stores a threshold current limit corresponding to each phase of the N phases based on the input voltage and a switching frequency.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: May 11, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Anandha Ruban Tt, Preetam Charan Anand Tadeparthy, Vikram Gakhar, Muthusubramanian Nv
  • Patent number: 11004680
    Abstract: A packaged electronic device includes an integrated circuit and an electrically non-conductive encapsulation material in contact with the integrated circuit. A thermal conduit extends from an exterior of the package, through the encapsulation material, to the integrated circuit. The thermal conduit has a thermal conductivity higher than the encapsulation material contacting the thermal conduit. The thermal conduit includes a cohered nanoparticle film. The cohered nanoparticle film is formed by a method which includes an additive process.
    Type: Grant
    Filed: November 26, 2016
    Date of Patent: May 11, 2021
    Assignee: Texas Instruments Incorporated
    Inventors: Archana Venugopal, Benjamin Stassen Cook, Luigi Colombo, Robert Reid Doering
  • Patent number: 11005489
    Abstract: In at least some embodiments, a system comprises a frequency generator configured to generate a second clock signal having a second frequency using a first clock signal having a first frequency. The second frequency is offset from the first frequency and each of a plurality of harmonic frequencies of the second frequency is offset from a harmonic frequency of the first frequency. The system also includes a power converter configured to produce a power signal that at least partially corresponds to the second frequency. The system further comprises an analog-to-digital converter (ADC) configured to sample and convert analog voltages at the first frequency. The ADC is powered by the power signal.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: May 11, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Martijn Fridus Snoeij, Mikhail Valeryevich Ivanov, Roberto Giampiero Massolini, Brian David Johnson
  • Patent number: 11005524
    Abstract: A system and method for enhanced channel hopping sequence is described. A pseudo random channel hopping sequence is redistributed using certain system specific parameters for separating adjacent transmission channels within a predetermined number of consecutive transmission channel numbers in the random channel hopping sequence to improve inter-channel interference between adjacent transmission channels.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: May 11, 2021
    Assignee: Texas Instruments Incorporated
    Inventors: Kumaran Vijayasankar, Timothy Schmidl, Ramanuja Vedantham
  • Patent number: 11005523
    Abstract: A wireless network with network-level channel hopping. A wireless network includes a wireless device. The wireless device includes a receiver, a data channel selector, and a transmitter. The receiver is configured to receive a beacon signal comprising a beacon sequence value. The data channel selector is configured to select, as a pseudorandom function of the beacon sequence value, a data channel on which to transmit in an interval following reception of the beacon signal. The transmitter is configured to transmit on the data channel selected by the channel selector.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: May 11, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kumaran Vijayasankar, Jyothsna Kunduru
  • Patent number: 11005642
    Abstract: A circuit includes a source device coupled to an output circuit. The source device is configured to produce a sequence of digital values at a rate defined by a data period. The output circuit is configured to receive the sequence of digital values from the source device, generate a copy of each digital value at a predetermined point during the respective data period, and responsive to initiation of a data transaction during a given data period but before the predetermined point, output the digital value from the source device, whereas responsive to initiation of a data transaction during the given data period but after the predetermined point, output the copy of the digital value.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: May 11, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Shawn Xianggang Yu, Venkata Krishnan Kidambi Srinivasan
  • Patent number: 11005632
    Abstract: An apparatus for use in a wireless communication network, comprising a processing resource configured to determine a time interval for periodic time division duplex (TDD) Uplink/Downlink (UL/DL) reconfiguration windows, generate a UL/DL reconfiguration command to indicate a dynamic TDD UL/DL allocation change, and encode the UL/DL reconfiguration command in a physical downlink control channel (PDCCH) data, and a radio front end (RF) interface coupled to the processing resource and configured to cause the encoded UL/DL reconfiguration command to be transmitted to a first of a plurality of wireless user equipment (UEs) in a first of the UL/DL reconfiguration windows, wherein the encoded UL/DL reconfiguration command is transmitted via a PDCCH to provide a fast TDD UL/DL reconfiguration.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: May 11, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Anthony Edet Ekpenyong
  • Patent number: 11005419
    Abstract: A circuit includes an oscillator having a driver and a resonator. The driver receives a supply voltage at a supply input and provides a drive output to drive the resonator to generate an oscillator output signal. A power converter receives an input voltage and generates the supply voltage to the supply input of the driver. A temperature tracking device in the power converter controls the voltage level of the supply voltage to the supply input of the driver based on temperature such that the supply voltage varies inversely to the temperature of the circuit.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: May 11, 2021
    Assignee: Texas Instruments Incorporated
    Inventors: Kunhee Cho, Danielle Griffith, James Murdock, Per Torstein Roine