Patents Assigned to Texas Instruments Incorporated
  • Patent number: 12712122
    Abstract: In examples, a transformer device comprises a first magnetic member; a second magnetic member; and a substrate layer between the first and second magnetic members. The substrate layer comprises a transformer coil. The transformer device includes a third magnetic member inside the substrate layer. The transformer coil encircles the third magnetic member. The third magnetic member physically separates from the first and second magnetic members.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yi Yan, Kengo Aoya, Tomoko Noguchi, Tatsuhiro Shimizu
  • Patent number: 12712766
    Abstract: A circuit includes a transformer including a primary coil and a secondary coil, the primary coil and the secondary coil being inductively coupled to one another. The circuit further includes an excitation driver circuit having a driver input and a driver output. The driver output is coupled to the primary coil and a clock circuit having a clock output is coupled to the driver input. Furthermore, the circuit includes a clock detection circuit having a detection input and a detection output, wherein the detection input is coupled to the secondary coil and a data interface circuit having a clock input, a data input and an interface output, the clock input coupled to the detection output. In addition, the circuit includes a load circuit coupled between the interface output and the secondary coil, the load circuit including a modulation input coupled to the interface output.
    Type: Grant
    Filed: January 23, 2024
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Sooping Saw
  • Patent number: 12712529
    Abstract: An analog duty-cycle detector includes: off-time detection circuitry; on-time detection circuitry; compare circuitry; and a controller. The off-time detection circuitry includes a first transistor and a first capacitor. The on-time detection circuitry includes a second transistor and a second capacitor. The compare circuitry has a first terminal, a second terminal, and a third terminal. The first terminal of the compare circuitry is coupled to a first terminal of the first capacitor. The second terminal of the compare circuitry is coupled to a first terminal of the second capacitor. The controller has a first terminal and a second terminal. The first terminal of the controller coupled to a control terminal of the first transistor. The second terminal of the controller coupled to the control terminal of the second transistor.
    Type: Grant
    Filed: August 31, 2023
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Deep Banerjee, Lokesh Kumar Gupta, Madhulatha Bonu
  • Patent number: 12712530
    Abstract: In some examples, a pulser circuit is configured to provide a pulse signal in a first operational state, pre-charge components of the pulser circuit via a first signal path in a second operational state following the first operational state, wherein the first signal path includes first components having a first voltage tolerance and second components having a second voltage tolerance, the first voltage tolerance being less than the second voltage tolerance, and discharge a voltage of the pulser circuit to ground in a third operational state between the first operational state and the second operational state, and following the second operational state.
    Type: Grant
    Filed: October 27, 2023
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ketan Sharma, Ravikumar Pattipaka, Vajeed Nimran, Aravind Miriyala, Shabbir Amjhera Wala, Savyan Kanisserry
  • Patent number: 12712551
    Abstract: In described examples, an apparatus comprises a multi-modulus divider (MMD) having a divider input, a divisor input, and a divider output. The apparatus also comprises a phase detector (PD) having a first clock input, a second clock input, and a PD output, the second clock input coupled to the divider output. The apparatus also comprises a phase to digital converter (P2DC) having a P2DC input and a P2DC output, the P2DC input coupled to the PD output. The apparatus further comprises a delta-sigma modulator having a third clock input, a modulator input, and a modulator output, the third clock input coupled to the divider output, the modulator input coupled to the P2DC output, and the modulator output coupled to the divisor input.
    Type: Grant
    Filed: January 4, 2024
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Michael Henderson Perrott, Hon Kin Chiu
  • Patent number: 12708953
    Abstract: An integrated circuit (IC) solder ball mounting apparatus comprises a ball storage unit for storing solder balls, a ball buffer unit configured to receive the solder balls from the ball storage unit in response to one or more pressure-actuated actions, and a gate valve configured to allow the solder balls to transfer to a ball mounting brush configured to place the solder balls onto area array contact structures formed on a wafer containing the integrated circuit.
    Type: Grant
    Filed: October 31, 2023
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Chen Chao, Bo Jiang, Wei Li, Jie Chen, Ruijie Huang, Liang Zheng, Qi Ming Bao, Bin Liu
  • Patent number: 12710385
    Abstract: In examples, a sensing device comprises a semiconductor die including a device side and a fluid sensor in the device side. The device comprises a metal ring forming an opening over the fluid sensor, the metal ring having a top surface, a bottom surface, and an inner surface extending between the top surface and the bottom surface, and the bottom surface being on the device side. At least a portion of the inner surface abuts the device side being plated with a noble metal. The device includes a mold compound covering the semiconductor die and a first portion of the metal ring, in which a second portion of the metal ring having the top surface protrudes out of the mold compound and provides at least one of a cartridge interface or a tube interface.
    Type: Grant
    Filed: August 31, 2023
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sebastian Meier, Rujuta Munje, Tobias Bernhard Fritz, Sreenivasan Kalyani Koduri
  • Patent number: 12712245
    Abstract: A bidirectional phase shifter includes a differential quadrature hybrid coupler, a switch network, and a differential reflection type phase shifter (RTPS). The differential quadrature hybrid coupler includes a first phase input/output (I/O) port, an inverse first phase I/O port, a second phase I/O port, and an inverse second phase I/O port. The switch network is coupled to the first phase I/O port, the inverse first phase I/O port, the second phase I/O port, and the inverse second phase I/O port. The differential RTPS including a differential I/O port coupled to the switch network.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Tolga Dinc, Swaminathan Sankaran
  • Patent number: 12712278
    Abstract: An electronic device includes a printed circuit board (PCB) with electronics configured to generate and receive data by a radio-frequency carrier signal via a signal terminal. A monopole antenna having first and second ends is connected to a signal terminal of the PCB at the first end. A first section of the antenna extends away from the signal terminal by a first length in a first direction. A second section of the antenna extends away from the first section by a second greater length in a second direction different from the first direction. The first section is spaced apart from the PCB by a third section of the antenna, and the second end of the antenna is spaced apart from the PCB by a dielectric spacer. The length of the antenna may be ΒΌ of a carrier frequency provided by the signal terminal.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Biswadip Mitra, Xiaolin Lu, Richard Wallace, Kaichien Tsai, Jianwei Zhou, Cheick Kante
  • Patent number: 12712774
    Abstract: An example apparatus to reduce crests in an input signal includes: memory; and programmable circuitry configured to: store a first copy and a second copy of a normalized window waveform in the memory, the first copy of the normalized window waveform including more data points than the second copy of the normalized window waveform; use the second copy of the normalized window waveform to generate a weight corresponding to a peak in the input signal; use the weight and the first copy of the normalized window waveform to generate an output waveform; generate a peak limiting waveform responsive to the output waveform; and combine the peak limiting waveform with the input signal to reduce an amplitude of the peak.
    Type: Grant
    Filed: April 17, 2024
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sriram Murali, Aswath VS, Sreenath Narayanan Potty, Raju K. Chaudhari, Kapil Kumar
  • Patent number: 12712516
    Abstract: In some examples, an apparatus includes a first metal layer having a thickness, a piezoelectric material layer having a first side and a second side that is opposite the first side, the piezoelectric material layer first side abutting the first metal layer, the piezoelectric material layer second side having recesses, and a second metal layer abutting the piezoelectric material layer second side, the second metal layer having extensions that fill the recesses to form a metal frame that is at least partially recessed into the piezoelectric material layer. The first metal layer, the piezoelectric material layer, and the second metal layer form a resonator body. The metal frame has a shape governing a resonant mode of the resonator body.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Steffen Paul Link, Ting-Ta Yen, Jeronimo Segovia-Fernandez
  • Patent number: 12712545
    Abstract: A circuit includes a first switch assembly having a first input node and a first output node, and a second switch assembly having a second input node and a second output node. The circuit further includes a third switch assembly an operational amplifier, and a buffer. The third switch assembly has a third input node and a third output node. The third input node is coupled to the second output node, and the third output node is coupled to the first output node. The buffer has a buffer input and a buffer output. The buffer input is coupled to an input stage of the operational amplifier. The buffer output is coupled to the third switch assembly.
    Type: Grant
    Filed: March 8, 2024
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Nitin Agarwal, Kunal Suresh Karanjkar, Venkata Ramanan R
  • Patent number: 12713629
    Abstract: A microelectronic device includes a galvanic isolation component having a lower isolation element over a substrate with lower bond pads connected to the lower isolation element, a dielectric plateau over the lower isolation element that does not extend to the lower bond pads, and an upper isolation element and upper bond pads over the dielectric plateau. The upper bond pads are laterally separated from the lower bond pads by an isolation distance. The microelectronic device includes high voltage wire bonds on the upper bond pads that extend upward, within 10 degrees of vertical, for a vertical distance greater than the isolation distance. The microelectronic device further includes low voltage wire bonds on the lower bond pads that have a loop height directly over a perimeter of the substrate that is less than 5 times a wire diameter of the low voltage wire bonds.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jeffrey Alan West, Hung-Yu Chou, Byron Lovell Williams, Thomas Dyer Bonifield
  • Patent number: 12713918
    Abstract: An electronic device includes a package structure, conductive leads partially exposed outside the package structure, and a semiconductor die having a semiconductor layer and a multilevel metallization structure, where the semiconductor die is enclosed by the package structure and the multilevel metallization structure includes a heater resistor, a sense resistor, and conductive metal features electrically coupled to respective terminals of the heater resistor and the sense resistor, with the conductive metal features electrically coupled to respective ones of the conductive leads.
    Type: Grant
    Filed: September 23, 2022
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Vinod Rai, Archana Venugopal, Blake Travis
  • Patent number: 12712505
    Abstract: An example apparatus includes: a differential amplifier including: an inverting input coupled to a first input via a first resistor; a non-inverting input coupled to a second input via a second resistor; a first supply input coupled to the first input via a third resistor, and the first supply input coupled to the second input via a fourth resistor; a second supply input coupled to a current source; a non-inverting output; and an inverting output; a first transistor including a first control terminal and a first current terminal, the first control terminal coupled to the non-inverting output and the first current terminal coupled to the inverting input; and a second transistor including a second control terminal and a second current terminal, the second control terminal coupled to the inverting output and the second current terminal coupled to the non-inverting input.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ankit Khanna, Dimitar Trifonov, Partha S. Basu, Sudheer Gangula
  • Patent number: 12712583
    Abstract: In examples, an electronic device includes an antenna and a transmitter line. The transmitter line includes a double-tuned transformer having first and second windings, the first winding having first and second ends, the second winding having third and fourth ends, and the third end coupled to the antenna. The transmitter line includes a first capacitor coupled between the first and second ends. The transmitter line also includes a second capacitor coupled between the third and fourth ends, and a switch coupled between the first end and a reference terminal.
    Type: Grant
    Filed: September 30, 2022
    Date of Patent: August 18, 2026
    Assignee: Texas Instruments Incorporated
    Inventors: Tolga Dinc, Swaminathan Sankaran
  • Patent number: 12710454
    Abstract: An opto-emulator transmitter includes: a current controller; an oscillator circuit; and receiver replica circuitry. The current controller has a first terminal, a second terminal, and a third terminal. The oscillator circuit has a first terminal, a second terminal, and a third terminal. The first terminal of the oscillator circuit is coupled to the second terminal of the current controller. The receiver replica circuitry has a first terminal, a second terminal, and a third terminal. The first terminal of the receiver replica circuitry is coupled to the second terminal of the oscillator circuit. The second terminal of the receiver replica circuitry is coupled to the third terminal of the oscillator circuit. The third terminal of the receiver replica circuitry is coupled to the third terminal of the current controller.
    Type: Grant
    Filed: November 30, 2023
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kashyap Barot, Arvind Gupta, Avinash Shah, Sreeram Nasum S
  • Patent number: 12712469
    Abstract: A power converter module includes power transistors and a substrate having a first surface and a second surface that opposes the first surface. A thermal pad is situated on the second surface of the substrate, and the thermal pad is configured to be thermally coupled to a heat sink. The power converter module also includes a control module mounted on a first surface of the substrate. The control module also includes control IC chips coupled to the power transistors. A first control IC chip controls a first switching level of the power converter module and a second control IC chip controls a second switching level of the power converter module. Shielding planes overlay the substrate. A first shielding plane is situated between the thermal pad and the first control IC chip and a second shielding plane is situated between the thermal pad and a second control IC chip.
    Type: Grant
    Filed: February 14, 2023
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Woochan Kim, Vivek Kishorechand Arora, Makoto Shibuya, Kengo Aoya
  • Patent number: 12713962
    Abstract: An example semiconductor package includes a semiconductor die. In addition, the semiconductor package includes a mold compound having a first side, a second side opposite the first side, and an axis extending between the first side and the second side, the mold compound covering the semiconductor die. Further, the semiconductor package includes an interface member including a first portion and a second portion, the first portion is coupled to the second portion. The first portion is positioned along the first side, the second portion is positioned along the second side, and an engagement of a welding horn with the first portion is adapted to weld the second portion to a surface.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Tobias Bernhard Fritz, Marcus Rudolf Zimnik
  • Patent number: 12713685
    Abstract: An integrated circuit includes a GaN layer located over a semiconductor substrate. The GaN layer includes an active device region of the GaN layer having a first conductivity and a passive device region of the GaN layer having a smaller second conductivity. A transistor may be located over the GaN layer in the active device region, and a passive device may be located over the GaN layer in the passive device region.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: August 18, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Ebenezer Eshun