Purged vacuum chuck with proximity pins

Abstract

A substrate support structure comprising a first surface and a second surface opposite the first surface. The substrate support structure also comprises a plurality of proximity pins projecting to a first height above the first surface, the first height being less than 100 μm. In addition, the substrate support structure further comprises a plurality of purge ports passing from the second surface to the first surface and a plurality of vacuum ports passing from the second surface to the first surface. In one embodiment, the plurality of purge ports are arranged in a first circular pattern, the first circular pattern having a first radial dimension less than the radius of the substrate support, and the plurality of vacuum ports are arranged in a second circular pattern, the second circular pattern having a second radial dimension less than the first radial dimension.

Description

CROSS-REFERENCES TO RELATED APPLICATIONS

This application claims the benefit of U.S. Provisional Application Ser. No. 60/639,109, filed Dec. 22, 2004, entitled “Twin Architecture For Processing A Substrate,” which is incorporated herein by reference.

BACKGROUND OF THE INVENTION

The present invention relates generally to the field of semiconductor processing equipment. More particularly, the present invention relates to a method and apparatus for supporting a substrate inside a semiconductor processing chamber. The method and apparatus can be applied to electrostatic chucks, vacuum chucks, and other applications as well.

Substrate support chucks are widely used to support substrates within semiconductor processing systems. Two examples of particular types of chucks used in semiconductor processing systems include electrostatic chucks (e-chucks) and vacuum chucks. These chucks are used to retain semiconductor wafers, or other workpieces, in a stationary position during processing.

In some semiconductor processing systems, a substrate rests flush against the surface of the chuck body during processing. During substrate processing, the chuck material can abrade the material present on the underside of the substrate, resulting in the introduction of particulate contaminants to the process environment. Consequently, during substrate processing operations, the particles can adhere themselves to the underside of the substrate and be carried to other process chambers or cause defects in the circuitry fabricated upon the substrate.

Therefore, a need exists in the art for methods and apparatus that reduce the amount of contaminant particles that adhere to the underside of a substrate during semiconductor processing.

SUMMARY OF THE INVENTION

According to the present invention, methods and apparatus related to semiconductor manufacturing equipment are provided. More particularly, embodiments of the present invention relate to a method and apparatus for supporting a substrate during semiconductor processing operations. The method and apparatus can be applied to electrostatic chucks, vacuum chucks, and other applications as well.

In a specific embodiment of the present invention, a substrate support structure is provided. The substrate support structure comprises a first surface and a second surface opposite the first surface. The substrate support structure also comprises a plurality of proximity pins projecting to a first height above the first surface, the first height being less than 100 μm. In addition, the substrate support structure further comprises a plurality of purge ports passing from the second surface to the first surface and a plurality of vacuum ports passing from the second surface to the first surface. In one particular embodiment, the plurality of purge ports are arranged in a first circular pattern, the first circular pattern having a first radial dimension less than the radius of the substrate support, and the plurality of vacuum ports are arranged in a second circular pattern, the second circular pattern having a second radial dimension less than the first radial dimension.

In another specific embodiment of the present invention, a method of manufacturing a substrate support structure is provided. The method comprises providing a substrate support, the substrate support comprising a first surface and a second surface opposite the first surface, and forming a plurality of recessed regions in the first surface. The method also comprises providing a plurality of seed crystals having at least one planar surface and placing the plurality of seed crystals in the plurality of recessed regions so that the at least one planar face is coplanar with the first surface. The method further comprises selectively depositing a plurality of proximity pins in contact with the plurality of seed crystals and extending to a first height above the first surface.

In yet another embodiment of the present invention, another method of manufacturing a substrate support structure is provided. The method comprises providing a substrate support, the substrate support comprising a first surface and a second surface opposite the first surface, and forming a plurality of recessed regions in the first surface, the plurality of recessed regions characterized by a first depth. The method also comprises providing a plurality of support structures characterized by a dimension greater than the first depth and inserting the plurality of support structures into the plurality of recessed regions. The method further comprises pressing the plurality of support structures into the plurality of recessed regions to align a surface of the plurality of support structures with the first surface, thereby deforming the plurality of recessed regions. Additionally, the method includes removing a portion of the substrate support defined by a depth measured from the first surface to a third surface to expose a portion of the support structures.

Many benefits are achieved by way of the present invention over conventional techniques. For example, the present technique reduces the number of particles generated by contact between the backside surface of the substrate and the support plate. Moreover, embodiments of the present invention provide reduced height proximity pins while controlling the pin height to within a desired tolerance. The reduction in proximity pin height increases the thermal transfer rate of energy from the substrate to the plate assembly, thereby decreasing the time the substrate spends transitioning to a final temperature, increasing system throughput. Moreover, in some embodiments, an increase in thermal coupling between the substrate and plate assembly results in improvements in the thermally dependent properties of one or more films present on the surface of the substrate. Merely by way of example, for films in which control of a critical dimension is a function of diffusion and/or chemical reactions, improvements in control of the critical dimension may result from increased thermal coupling.

Additionally, increased thermal coupling between the substrate and the plate assembly reduces the thermal impact of any chamber non-uniformities. Some embodiments of the present invention increase the thermal uniformity of the thermal transfer between the substrate and the plate assembly. Depending upon the embodiment, one or more of these benefits may be achieved. These and other benefits will be described in more detail throughout the present specification and more particularly below.

These and other embodiments of the present invention, as well as its advantages and features, are described in more detail in conjunction with the text below and attached figures.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a simplified schematic side view illustration of a substrate processing chamber according to one embodiment of the present invention.

FIG. 2 is a simplified schematic plan view of a vacuum chuck according to one embodiment of the present invention.

FIGS. 3A-3C are simplified schematic side view illustrations of a method of fabricating a substrate support according to one embodiment of the present invention.

FIGS. 4A-4D are simplified schematic side view illustrations of a method of fabricating a substrate support according to another embodiment of the present invention.

FIGS. 5A-5D are simplified schematic side view illustrations of a method of fabricating a substrate support according to yet another embodiment of the present invention.

FIG. 5E is a simplified flowchart illustrating a process of fabricating a substrate support according to yet another embodiment of the present invention.

FIGS. 6A-6D are simplified schematic side view illustrations of a method of fabricating a substrate support according to an alternative embodiment of the present invention.

FIG. 6E is a simplified flowchart illustrating a method of fabricating a substrate support according to an alternative embodiment of the present invention.

DESCRIPTION OF SPECIFIC EMBODIMENTS

According to the present invention, methods and apparatus related to semiconductor manufacturing equipment are provided. More particularly, embodiments of the present invention relate to a method and apparatus for supporting a substrate during semiconductor processing operations. The method and apparatus can be applied to electrostatic chucks, vacuum chucks, and other applications as well.

FIG. 1 is a simplified schematic side view illustration of a substrate processing chamber according to one embodiment of the present invention. In the embodiment illustrated in FIG. 1, the assembly 180 contains a plate assembly 170 and a vacuum source 175, which are mounted in a processing module 186. The plate assembly 170 generally contains a plate 170B, plate assembly surface 170A, protrusions 171, and a vacuum source port assembly 172. In this configuration the vacuum source 175 is used to create a negative pressure in the vacuum port plenum 172B, thus causing air to flow into a number of vacuum ports 172A formed in the surface of the plate assembly 170, thus creating a reduced pressure behind the substrate W which causes the substrate W to be biased towards to the surface of the proximity pins 171. The plate 170B may be made from a thermally conductive material such as aluminum, copper, graphite, aluminum-nitride, boron nitride, silicon carbide, and/or other material, and is in communication with a heat exchanging device 183A. Additionally, the plate may be made from anodized materials, including anodized aluminum and sealed anodized aluminum. Although FIG. 1 illustrates a vacuum chuck, this is not required by the present invention. Alternative embodiments of the present invention provide methods and apparatus for supporting a substrate using an electrostatic chuck.

In one embodiment, the plate assembly 170 also contains a gas source port assembly 173 and a gas source 174 to purge the edge of the substrate during processing to prevent evaporating solvent vapors from being deposited on the plate assembly surface 170A or the backside of the substrate due to the reduced pressure generated behind the substrate (e.g., a vacuum chuck configuration). In this configuration the gas source 174 is used to create a positive pressure in the gas port plenum 173B, thus causing the gas to flow out of a plurality of gas ports 173A formed in the surface of the plate assembly 170. In one embodiment the gas source 174 is adapted to deliver an inert gas to the edge of the substrate, such as, argon, xenon, helium, nitrogen, and/or krypton. The gas source 174 may also be adapted to deliver a fluid to the edge of the substrate. In some embodiments, additional gas ports and their associated gas lines and sources, may be provided as heat transfer aids. For example, in one particular embodiment, helium gas is provided through appropriate ports to the backside of the substrate to cool the substrate as part of a processing sequence. One of ordinary skill in the art would recognize many variations, modifications, and alternatives.

FIG. 2 is a simplified schematic plan view of a vacuum chuck according to one embodiment of the present invention. The surface of the plate assembly 170 is illustrated in FIG. 2 with no substrate on top of the proximity pins 171. Thus, this figure illustrates one possible configuration of proximity pins 171 (33 shown), vacuum ports 172A (˜367 shown), and gas ports 173A (˜360 shown). In general a number of proximity pins 171 are spaced across the surface of the plate assembly 170 so that the contact area can be minimized and the gap between the substrate and the plate assembly surface 170A can be maintained at a substantially uniform distance.

In addition, a number of vacuum ports 172A are spaced across the surface of the plate assembly 170 so that the substrate can be uniformly biased towards the plate assembly 170, providing for a substantially uniform gap between the substrate and the plate assembly surface 170A. In one embodiment, as shown in FIG. 2 an inner array of vacuum ports 172A (see item “A”) is mirrored with an outer array of gas ports 173A (see item “B”), where the diameter of the inner array “A” is smaller than the substrate diameter. Thus, vacuum ports are positioned under the substrate. Moreover, the diameter of the outer array “B” is equal to or larger than the substrate diameter, but less than the diameter of the plate assembly. In the embodiment illustrated in FIG. 2, the diameter of the vacuum ports located across the surface of the plate assembly varies as a function of position. In one particular embodiment, the vacuum ports arrayed as item “A” have a diameter smaller than vacuum ports distributed across the interior portions of the surface of the plate assembly. However, this is not required by the present invention. In alternative embodiments, the vacuum port diameters are equal or varied in other manners. One of ordinary skill in the art would recognize many variations, modifications, and alternatives.

In one embodiment, a small ridge of material is placed between the inner array of vacuum ports 172 and the outer array of gas ports 173 to minimize the amount of gas required to purge the edge of the substrate. As described more fully below, in some embodiments, material deposited by chemical vapor deposition (CVD) or physical vapor deposition (PVD) is used to form the proximity pins 171 and the small ridge of material placed between the inner array of vacuum ports 172A and the outer array of gas ports 173A.

FIGS. 1 and 2 also illustrate a configuration having a lift assembly 87 and lift pin hole 189 extending through the plate assembly surface 170A to lift the substrate off the plate assembly surface 170A.

In one embodiment, the gas delivered from the gas source 174 is heated prior to exiting the gas ports 172A to prevent cooling of the edge of the substrate W during processing. In another embodiment, the length of the gas port plenum 173B in the plate assembly 170 is designed to assure that the gas resides in the gas port plenum long enough for the injected gas to substantially achieve the plate temperature before it exits the gas ports 172A. As discussed above with respect to helium backside cooling, other gases may be delivered from various ports (not shown) to either cool or heat the substrate as appropriate.

Various methods have been employed to increase the thermal coupling of the substrate to the chuck and consequently the heat exchanging device. Increased thermal coupling allows for reduction in the processing time, increased system throughput, and increased control over critical dimensions (CD). In a specific embodiment of the present invention, the thermal coupling is increased by decreasing the distance between the substrate and the chuck. As evident to one of skill in the art, decreasing the spacing between the substrate and the chuck will lead to an increase in convective heat transfer across the gap.

Moreover, increasing the contact area between the substrate backside surface and the surface of the plate assembly 170 will increase the thermal coupling and reduce the time it takes a substrate to reach the desired process temperature. However, increasing the contact area is often undesirable since it will generally increase the number of particles generated on the backside of the substrate, which can adversely impact the processing results and cause defects in the circuitry fabricated upon the substrate.

One method of reducing the number of particles generated on the backside of the substrate is to minimize the contact area of the substrate to the surface of the plate assembly. Accordingly, an array of proximity pins or proximity pins that space the substrate off the surface of the plate assembly have been utilized. While the use of proximity pins reduces the number of particles generated, they may tend to reduce the thermal coupling between the substrate and the plate assembly. Therefore, it is often desirable to minimize the height of the proximity pins above the surface of the plate assembly to improve the thermal coupling, while also assuring that the substrate will not touch the surface of the plate assembly. Some applications have used sapphire spheres that are pressed or placed into machined holes in the plate assembly surface to act as proximity pins. However, it is often difficult to mechanically control the height to which the spheres extend above the surface of the plate assembly.

Referring to FIG. 1, one embodiment of the present invention provides an array of accurately controlled small contact area proximity pins 171 that are formed on the surface of the plate assembly 170. In the embodiment illustrated in FIG. 1, the substrate is biased towards the plate assembly by vacuum ports to increase the thermal coupling between the substrate and the plate assembly. As illustrated, the substrate may be biased towards the plate assembly 170 by use of a vacuum chucking device. Additionally, other embodiments of the present invention utilize an electrostatic chucking device or other conventional methods of forcing the substrate against plate assembly. One of ordinary skill in the art would recognize many variations, modifications, and alternatives. The array of accurately controlled small height proximity pins 171 can be formed by a variety of methods, as described more fully below.

In embodiments of the present invention, a number of proximity pins are distributed across the face of plate assembly 170. For example, in one particular embodiment, 17 proximity pins are utilized with the following locations: one pin at the center, four pins arranged at corners of a square concentric with the center pin, with a side equal to 50 mm, twelve pins arranged near the periphery of the plate assembly, separated from each other by arcs of 300. Preferably, the proximity pins are fabricated from a material with a low coefficient of friction. Accordingly, contact between the proximity pins and the substrate will produce a reduced number of particles.

According to calculations we have performed, it is desirable to select the distribution pitch of proximity pins across the face plate surface to achieve goals related to maximum substrate bowing. Utilizing a 74 mm pitch between adjacent proximity pins, we have determined that it is possible to support a substrate with a maximum bowing at the substrate edge of about 5 μm. In designs with a 50 mm pitch between adjacent proximity pins, the maximum substrate bowing can be reduced to about 2.8 μm. Of course, the particular maximum bowing desired by the system operator will depend on the particular applications.

In some embodiments of the present invention, a two-step chucking process is utilized to flatten the wafer in a step-wise fashion. Generally, substrates or wafers possess a degree of bowing or warpage before they are place on the chuck. Thus, embodiments of the present invention use methods and systems to reduce wafer bowing, providing an increase in the uniformity of the gap between the wafer and the chuck surface. For example, in an embodiment utilizing an e-chuck, a first chucking step is used in which a first chucking voltage is applied to initially remove a first amount of wafer bowing. After the first chucking voltage is applied, reducing the wafer bowing to a second value, a second chucking voltage is applied to maintain the wafer bowing profile achieved using the first chucking voltage. In a specific embodiment, the second chucking voltage is less than the first chucking voltage. As will be apparent to one of skill in the art, the pressure applied by an e-chuck increases with chucking voltage. Moreover, the amount of pressure required to flatten a substrate increases with increased bowing. Thus, in this specific embodiment, a high chucking voltage is used to apply a first high pressure, substantially flattening a substrate characterized by a first amount of wafer bowing. After the initial voltage removes a significant portion of the substrate bowing, a reduced voltage is sufficient to maintain the desired substrate flatness. Of course, one of skill in the art will appreciate that this chucking process may be performed in more than two steps, incrementally decreasing the chucking voltage over a number of steps.

FIGS. 3A-3C are simplified schematic side view illustrations of a method of fabricating a substrate support according to one embodiment of the present invention. As illustrated in FIG. 3, a plate 300 is provided. Generally, the plate is adapted to support a substrate, for example a silicon wafer, during semiconductor processing operations. For purposes of clarity, various components of the plate assembly, including vacuum and purge ports, electrodes for electrostatic chucking mechanisms, heat exchanger elements, lift pin holes, etc. are omitted from the figures. One of ordinary skill in the art will appreciate that the plate is one portion of a larger plate assembly as illustrated in FIG. 1. In some embodiments, the plate 300 is an aluminum plate coated with a polymer. Merely by way of example, the plate may be an aluminum plate coated with Teflon® manufactured by Dupont Incorporated of Wilmington, Del. or Tufram® manufactured by General Magnaplate Corporation of Linden, N.J. In alternative embodiments, plate 405 is fabricated from stainless steel, silicon carbide, copper, graphite, aluminum, aluminum nitride, aluminum oxide, boron nitride, or combinations/laminates of these materials.

As illustrated in FIG. 3A, recessed regions 302 are formed in an upper surface 304 of the plate 300. The recessed regions 302 are formed by methods well known to one of skill in the art, for example, etching, ion milling, electric discharge machining, or laser ablation. After formation of the recessed regions, a seed crystal 310 is embedded in the plate 300. In one embodiment, the seed crystal is approximately the same size as the recessed region. Therefore, embedding of the seed crystal in the plate 300 constitutes a relatively permanent affixing of the seed crystal to the plate. Merely by way of example, the seed crystal may be diamond, silicon, silicon oxide, boron nitride, aluminum oxide, and silicon carbide, or other material that is suitably hard. In this embodiment, a seed crystal 310 is embedded into each of the recessed regions 302 so that the top surface of the seed crystal is substantially flush with the plate surface 304.

In one aspect of the invention, a tool that has a surface that is at least as hard as the material from which the seed crystal 310 is made, is used to embed the seed crystal in the plate 300. In these embodiments, the tool material is preferably relatively incompressible, has low ductility, and has a polished face. One example of a suitable tool is a sapphire disk manufactured by Saint-Gobain Saphikon, Inc., of Miford, N.H. In an embodiment, the surface of the sapphire disk is preferably characterized by flatness specifications such as a RMS roughness on the order of 5,000 Å over a lateral distance of 10 mm and a radius of curvature of 12.5 m over a lateral distance of 10 mm. The tool is used in a method that embeds the seed crystal 310 in a repeatable manner so that the seed crystal is installed substantially flush with the plate surface 310.

As illustrated in FIG. 3C, proximity pins 320 are selectively deposited on the seed crystal 310 using a CVD or PVD process. For example, CVD and PVD processes enable the deposition of a thin layer of material of controlled size, producing a uniform layer of desired thickness on the surface of the plate assembly. The material deposited on the surface of the plate 300 to form the proximity pins 320 may be diamond, diamond-like carbon, sapphire, boron nitride, silicon dioxide (SiO₂), silicon (Si), a metal (e.g., nickel, titanium, titanium nitride, molybdenum, tungsten), a ceramic material, a polymeric material (e.g., polyimide or Teflon®) or other suitable material. Generally, a suitable material is hard enough to withstand the biasing force without appreciable deformation and is not easily abraded by the interaction with backside of the substrate.

Preferably, selective epitaxy or deposition processes are used to form the proximity pins 320 on the seed crystals 310. In one embodiment, a homoepitaxial growth process performed using a methane/hydrogen/oxygen environment in a microwave plasma CVD chamber is used to form the proximity pins. Depending on the growth parameters, including chamber temperature and chemistry, growth rates of up to tens of microns per hour can be achieved. Thus, using CVD or PVD processes, the height 322 of the proximity pin 320 can be controlled to a predetermined tolerance. In one embodiment, the tolerance is ±10 μm. In alternative embodiments, the tolerance is controlled within a range extending from about ±10 μm to about ±30 μm. Thus, proximity pins with heights on the order of several to hundreds of microns are controllably provided by embodiments of the present invention.

FIGS. 4A-4D are simplified schematic side view illustrations of a method of fabricating a substrate support according to another embodiment of the present invention. As illustrated in FIG. 4A, a plate 405 is provided. Generally, the plate is adapted to support a substrate, for example a silicon wafer, during semiconductor processing operations. For purposes of clarity, various components of the plate assembly, including vacuum and purge ports, electrodes for electrostatic chucking mechanisms, heat exchanger elements, lift pin holes, etc. are omitted from the figures. One of ordinary skill in the art will appreciate that the plate is one portion of a larger plate assembly as illustrated in FIG. 1. In some embodiments, as discussed previously, the plate 405 is an aluminum plate coated with a polymer. In alternative embodiments, plate 405 is fabricated from stainless steel, silicon carbide, copper, graphite, aluminum, aluminum nitride, aluminum oxide, boron nitride, or combinations/laminates of these materials.

A number of recessed regions 412 are formed in surface 410 of the plate 405. As illustrated in FIG. 4A, the recessed regions 412 are formed through a portion of the plate 405 using methods well known to one of skill in the art. In a specific embodiment, the recessed regions are fabricated with a predetermined width 416 and depth 414. In the embodiment of the present invention illustrated in the figure, the recessed regions are generally cylindrical in shape, although this is not required by the present invention. Recessed regions of other shapes, for example, square, are utilized in alternative embodiments. In a specific embodiment, the width 416 of the recessed region is 1 mm and the depth 414 is 2 mm. In alternative embodiments, the width ranges from about 0.2 mm to about 3 mm and the depth ranges from about 0.5 mm to about 5 mm. In a particular embodiment, the width and depth are equal, forming a cylinder with a diameter equal to the height.

Support members 420 are provided and placed in recessed regions 412. As illustrated in FIG. 4B, the support members 420 are spherical in shape and have a diameter greater than the width of the recessed regions. Accordingly, a portion of the support members extends above the surface 410 of the plate 405 after initial placement. In embodiments of the present invention, the support members are sapphire precision spheres of predetermined diameter. Merely by way of example, sapphire precision spheres of a diameter of 0.5 mm with a sphericity of 0.000025″ and a basic diameter tolerance of ±0.0001″ are available from Meller Optics, Inc. of Providence R.I. For sapphire precision spheres within the same lot, the tolerance can be as low as 0.00005″.

As illustrated in FIG. 4C, the support members are pressed into the plate or substrate support 405 so that an upper surface 424 of the support member lies in the plane defined by the upper surface 410 of the plate. In one aspect of the invention, a tool that has a surface that is at least as hard as the material from which the support member is made, is used to embed the support member in the plate 405. In these embodiments, the tool material is preferably relatively incompressible, flat, and has a polished face. One example of a suitable tool is the Supercool 300 mm chuck manufactured by ERS-GmbH of Munich, Germany. The surface 432 of plate is characterized by a RMS roughness of 20,000 Å over a distance of 10 mm. Merely by way of example, as illustrated in FIG. 4C, sapphire precision spheres can be forced into the substrate support plate by applying downward pressure from a relatively incompressible, flat plate 432 placed adjacent to surface 410 of the plate.

As illustrated in FIG. 4C, flat plate 430 with tool surface 432 is placed adjacent the surface 410 and plates 405 and 430 are pressed together. Preferably, the material from which the flat plate 430 is fabricated is selected to possess a level of hardness greater than or equal to the hardness of the support member material, which in turn, is selected to possess a level of hardness greater than or equal to the hardness of the substrate support plate 405. For example, sapphire, with a hardness of about 40 GPa (compared to diamond with a hardness of about 90 GPa), is generally considered one of the hardest materials. Thus, in applications which utilize flat plates and support members fabricated from sapphire, applying pressure to the upper surface of a sapphire ball, as illustrated in FIG. 4C, will deform the a substrate support plate fabricated from softer materials. Accordingly, the sapphire spheres will be forced into the recessed region, locally deforming the regions of the substrate support plate adjacent the recessed regions.

After deformation of the substrate support plate, the support members will be embedded into the plate to a depth greater than the original depth of the recessed regions, represented by reference numeral 434. Moreover, the width of the recessed region will be extended to a width greater than the original width at some portions of the structure.

Merely by way of example, if the substrate support plate is an aluminum plate, which generally has a hardness approximately ten times less that of sapphire, the substrate support plate will deform to receive the sapphire spheres as illustrated in the figure. Some embodiments of the present invention utilize an embedding tool equal in diameter to the diameter of the plate 405. In alternative embodiments, an embedding tool with a diameter less than the diameter of the plate 405 is utilized to force one or more support members into plate 405 simultaneously or sequentially. After the step of forcing the support members into the plate illustrated in FIG. 4C, the support members are flush with the surface 410.

FIG. 4D illustrates a process of removing a portion of the substrate support plate to expose proximity pins extending above a third surface 438 of the plate by a height 442. One embodiment of the present invention utilizes an electropolishing process performed in a bath to remove a predetermined portion of the plate 405 and expose the third surface 438. In an electropolishing process, an amount of material is removed proportional to the total charge, providing measurement and control over the amount of material removed. In some embodiments, the electropolishing process is utilized to remove an amount of material characterized by a height equal to a predetermined fraction of the size of the support member. For example, as illustrated in FIG. 4D, the height 442 of the material removed from the plate is equal to about 20% of the diameter of the sapphire precision sphere. Of course, in alternative embodiments, greater or lesser material is removed as a percentage of the support member dimensions. One of ordinary skill in the art would recognize many variations, modifications, and alternatives.

In embodiments of the present invention in which the substrate support plates are coated, the presence of the coating is accounted for during the fabrication process. For example, in a substrate support plate coated with Teflon®, an additional amount of material is removed during the electropolishing process equal to the thickness of the Teflon® layer eventually deposited, for example, 200 Å. Thus, after the substrate support plate is electropolished, exposing the proximity pins by an additional height of 200 Å, a selective coating process is performed to form the Teflon® layer. In one embodiment, the selective coating process forms the coating layer only on the substrate support plate and not the proximity pins. Therefore, the final proximity pin height above the Teflon® layer, for example, is controlled by the combination of additional electropolishing counterbalanced by the formation of the Teflon® layer.

As illustrated in FIG. 4D, an amount of material of depth 438 (measured from the first surface to the third surface) is removed from the upper surface of the plate, with the electropolishing process being terminated once the upper plate surface reaches the plane defined by third surface 438. Thus, proximity pins of a desired height are produced utilizing embodiments of the present invention. In a specific embodiment, the electropolishing process is utilized to remove 30 μm of material measured from surface 410 of plate 405. Thus, proximity pins 420 extend to a height of 30 μm above surface 438. In alternative embodiments, the height of the proximity pins is greater or less than 30 μm. Therefore, embodiments of the present invention provide methods and apparatus for forming proximity pins of controllable height on a surface of a substrate support plate.

FIGS. 5A-5D are simplified schematic side view illustrations of a method of fabricating a substrate support according to yet another embodiment of the present invention. As illustrated in FIG. 5A, a plate 500 is provided. Generally, the plate is adapted to support a substrate, for example a silicon wafer, during semiconductor processing operations. For purposes of clarity, various components of the plate assembly, including vacuum and purge ports, electrodes for electrostatic chucking mechanisms, heat exchanger elements, lift pin holes, etc. are omitted from the figures. One of ordinary skill in the art will appreciate that the plate is one portion of a larger plate assembly as illustrated in FIG. 1. In some embodiments, as discussed previously, the plate 405 is an aluminum plate coated with a polymer. In alternative embodiments, plate 405 is fabricated from stainless steel, silicon carbide, copper, graphite, aluminum, aluminum nitride, aluminum oxide, boron nitride, or combinations/laminates of these materials.

Layer 510, with a thickness 512, is deposited on the plate 500. The material deposited on the surface of the plate 500 to form layer 510 may be diamond, diamond-like carbon, sapphire, boron nitride, silicon dioxide (SiO₂), silicon (Si), aluminum oxynitride, a metal (e.g., nickel, titanium, titanium nitride, molybdenum, tungsten), a ceramic material, a polymeric material (e.g., polyimide or Teflon®) or other suitable material. Generally, a suitable material is hard enough to withstand the biasing force without appreciable deformation, is not easily abraded by the interaction with backside of the substrate, and can be patterned after deposition. Control of deposition processes to achieve repeatable and uniform deposition of layers is well known to one of skill in the art.

A mask layer is deposited and patterned as illustrated in FIG. 5B to form a number of masking structures 520 with a lateral dimension equal to distance 522. Patterning of mask layers is well known to one of ordinary skill in the art. After patterning of the mask layer to form masking structures 520, layer 510 is selectively removed to form a number of proximity pins 530. As illustrated in FIG. 5C, the making structures 520 are not modified during the proximity pin formation process. In alternative embodiments, the masking structures degrade during the proximity pin formation process, resulting in proximity pins with tapered upper surfaces. For example, masking structure that erode at the edges permit the proximity pin formation process to begin removing outer portions of the proximity pins prior to centrally located portions. Thus, some embodiments of the present invention provide a method of manufacturing proximity pins with tapered upper surfaces. One of ordinary skill in the art would recognize many variations, modifications, and alternatives.

The masking structures are removed as illustrated in FIG. 5D to expose proximity pins 530. Based on the deposition and masking processes described above, the proximity pins will have predetermined heights and lateral dimensions. In the embodiment illustrated in FIG. 5D, proximity pins with a height of 30 μm and lateral dimensions of several millimeters are provided. In alternative embodiments, proximity pins with greater or lesser heights are provided.

Although the formation of proximity pins utilizing masking structures deposited on a proximity pin layer were described in reference to FIGS. 5A to 5D, the present invention as illustrated in FIGS. 5A to 5D is not limited to this fabrication method. An alternative formation method utilizes other selective deposition processes to form the proximity pins. For example, in one embodiment, a stencil mask (not shown) is placed over the surface of the plate 500, thereby allowing CVD or PVD material to be deposited (in lieu of layer 510) on certain defined areas of the substrate by use of features or holes formed in the stencil mask. In this way the lateral dimensions of the proximity pins are controlled by the features formed in the mask and the height of the proximity pins can be controlled by assuring a certain amount of material is deposited on the surface of the plate 500 using a known PVD or CVD process deposition rate. In one embodiment, the proximity pins which are deposited by a PVD or CVD process are about 100 μm thick.

Merely by way of example, a process utilizing a stencil mask to fabricate a substrate support is illustrated as follows. A substrate support member is provided, the substrate support member having a first surface and a second surface opposite the first surface. A stencil mask is provided having a solid background and a number of open features arrayed on the solid background. The stencil mask is positioned in relation to the substrate support member and the combination is exposed to a deposition process such that deposited materials pass through the open features to form a number of proximity pins in contact with the first surface. After deposition, the stencil mask is removed to expose the number of proximity pins.

FIG. 5E is a simplified flowchart illustrating a process of fabricating a substrate support according to yet another embodiment of the present invention. In step 560, a substrate support is provided, the substrate support has a first surface and a second surface opposite the first surface. In some embodiments, the substrate support is a thermally conductive material. A spacer layer is deposited over the first surface in step 562. In embodiments of the present invention, a PVD or CVD process is utilized to deposit the spacer layer. Moreover, the thickness of the spacer layer is a predetermined thickness, for example, less than 100 μm. In step 564, a masking layer is deposited over the spacer layer and the masking layer is patterned in step 566 to form a spacer structure mask. The spacer structure mask has predetermined lateral dimensions. In a specific embodiment, the lateral surface area of the spacer structure mask is less than 3% of the surface area of the first surface.

In step 568, the spacer layer is selectively removed in unmasked areas of the spacer layer to form a number of proximity pins. Techniques for etching and removing materials are well known to one of skill in the art. In some embodiments, the spacer structure mask erodes during the spacer layer removal process, producing proximity pins with tapered upper surfaces. For example, in embodiments in which the spacer structure mask preferentially erodes at the edges, proximity pins with an upper surface characterized by a cross-section defined by an arc of a hemisphere are produced.

Moreover, in other embodiments of the present invention, the etching or removal process are continued to remove an upper strata of the first surface in unmasked areas of the spacer layer. In step 570, the spacer structure mask is removed to expose the plurality of proximity pins. Optional steps 572 and 574 form a plurality of vacuum ports passing from the first surface to the second surface and a plurality of purge ports passing from the second surface to the first surface, respectively. In some embodiments employing optional step 574, the plurality of purge ports are arranged in a first circular pattern, wherein the first circular pattern has a first radial dimension less than the radius of the substrate support plate. Additionally, in some embodiments employing optional step 572, the plurality of vacuum ports are arranged in a second circular pattern, the second circular pattern having a second radial dimension less than the first radial dimension. Moreover, in some embodiments employing both optional steps, the first circular pattern and the second circular pattern are concentric.

FIGS. 6A-6D are simplified schematic side view illustrations of a method of fabricating a substrate support according to an alternative embodiment of the present invention. As illustrated in FIG. 6A, a plate 600 is provided. Generally, the plate is adapted to support a substrate, for example a silicon wafer, during semiconductor processing operations. For purposes of clarity, various components of the plate assembly, including vacuum and purge ports, electrodes for electrostatic chucking mechanisms, heat exchanger elements, lift pin holes, etc. are omitted from the figures. One of ordinary skill in the art will appreciate that the plate is one portion of a larger plate assembly as illustrated in FIG. 1. In some embodiments, as discussed previously, the plate 600 is an aluminum plate coated with a polymer. In alternative embodiments, plate 600 is fabricated from stainless steel, silicon carbide, copper, graphite, aluminum, aluminum nitride, aluminum oxide, boron nitride, or combinations/laminates of these materials.

In one, embodiment, a mask layer is deposited and patterned as illustrated in FIG. 6B to form a number of masking structures 610 with predetermined lateral dimensions. Patterning of mask layers is well known to one of ordinary skill in the art. In alternative embodiments, individual masking structures are bonded to surface 605 of plate 600. For example, β-Al₂O₃ or diamond studs may be epoxied to surface 605 to provide masking structures 610.

After the masking structures are provided, a process is performed to selectively remove a portion 620 of plate 600. In a particular embodiment of the present invention, a grit-blasting technique is utilized to remove portion 620 of a silicon carbide plate, producing the structure illustrated in FIG. 6C. Masking structures 610 are removed to expose proximity pins 640 with a predetermined height 642 and predetermined lateral dimensions. In the embodiment illustrated in FIG. 6D, proximity pins extend to a predetermined distance above surface 644, for example, a height of 30 μm measured from surface 644 and lateral dimensions of several millimeters are provided. In alternative embodiments, proximity pins with greater or lesser heights are provided.

As illustrated in FIGS. 6B and 6C, making structures 610 are not modified during the proximity pin formation process. In alternative embodiments, the masking structures degrade during the proximity pin formation process, resulting in proximity pins with tapered upper surfaces. For example, masking structures that erode at the edges during a grit-blasting process permit the proximity pin formation process to begin removing outer portions of the proximity pins prior to centrally located portions. Thus, some embodiments of the present invention provide a method of manufacturing proximity pins with tapered upper surfaces. One of ordinary skill in the art would recognize many variations, modifications, and alternatives.

FIG. 6E is a simplified flowchart illustrating a method of fabricating a substrate support according to an alternative embodiment of the present invention. In step 670, a substrate support member is provided, the member comprising a first surface and a second surface opposite the first surface. In a specific embodiment, the substrate support member is fabricated from silicon carbide. A number of spacer structure masks are bonded to the first surface in step 672. Embodiments according to the present invention utilize a number of different materials for spacer structure masks, including β-Al₂O₃, diamond, polymeric resins, silicone, polyimide, and vinyl. In some embodiments, the spacer structure masks are polycrystalline. Moreover, in some embodiments of the present invention, the spacer structure masks are bonded to the first surface utilizing an epoxy.

In step 674, a portion of the substrate support member defined by a depth measured from the first surface to a third surface is removed to form a plurality of proximity pins projecting to a first height above a third surface. According to embodiments of the present invention, the process of removing a portion of the first surface includes grit blasting the first surface to form the proximity pins. Moreover, in a particular embodiment, the portion of the first surface removed by grit blasting is a layer less than 100 μm in thickness. The spacer structure masks are removed in step 676. In optional steps 678 and 680, a number of vacuum ports passing from the third surface to the second surface and a number of purge ports passing from the second surface to the third surface are formed, respectively.

Accordingly, while the present invention has been disclosed in connection with the preferred embodiments thereof, it should be understood that other embodiments may fall within the spirit and scope of the invention, as defined by the following claims.

Claims

1. A substrate support structure, the structure comprising:

a substrate support comprising a first surface and a second surface opposite the first surface;

a plurality of proximity pins projecting to a first height above the first surface, the first height being less than 100 μm;

a plurality of purge ports passing from the second surface to the first surface; and

a plurality of vacuum ports passing from the second surface to the first surface.

2. The substrate support structure of claim 1 wherein the plurality of purge ports are arranged in a first circular pattern, the first circular pattern having a first radial dimension less than the radius of the substrate support; and

the plurality of vacuum ports are arranged in a second circular pattern, the second circular pattern having a second radial dimension less than the first radial dimension.

3. The substrate support structure of claim 2 further comprising an annular spacer ridge characterized by a radial dimension greater than the second radial dimension and extending a second height above the first surface, wherein the second height is less than the first height.

4. The substrate support structure of claim 1 wherein the plurality of proximity pins comprise materials selected from the group consisting of silicon, silicon oxides, metals, ceramics, polymers, diamond, diamond-like carbon, boron nitride, single crystalline α-alumina, and polycrystalline β-alumina.

5. The substrate support structure of claim 1 wherein the substrate support is fabricated from a material selected from the group consisting of stainless steel, silicon carbide, copper, graphite, aluminum, aluminum nitride, aluminum oxide, boron nitride, anodized aluminum, and sealed anodized aluminum.

6. A method of manufacturing a substrate support structure, the method comprising:

providing a substrate support, the substrate support comprising a first surface and a second surface opposite the first surface;

forming a plurality of recessed regions in the first surface;

providing a plurality of seed crystals having at least one planar surface;

placing the plurality of seed crystals in the plurality of recessed regions so that the at least one planar face is substantially coplanar with the first surface; and

selectively depositing a plurality of proximity pins in contact with the plurality of seed crystals and extending to a first height above the first surface.

7. The method of claim 6 further comprising:

forming a plurality of vacuum ports passing from the first surface to the second surface; and

forming a plurality of purge ports passing from the second surface to the first surface.

8. The method of claim 6 wherein selectively depositing comprises a homoepitaxial growth process.

9. The method of claim 6 wherein the plurality of seed crystals are fabricated from a material selected from the group consisting of diamond, silicon, silicon oxide, boron nitride, and aluminum oxide.

10. The method of claim 6 wherein the first height is less than 100 μm.

11. A method of manufacturing a substrate support structure, the method comprising:

providing a substrate support, the substrate support comprising a first surface and a second surface opposite the first surface;

forming a plurality of recessed regions in the first surface, the plurality of recessed regions characterized by a first depth;

providing a plurality of support structures characterized by a dimension greater than the first depth;

inserting the plurality of support structures into the plurality of recessed regions;

pressing the plurality of support structures into the plurality of recessed regions to align a surface of the plurality of support structures with the first surface, thereby deforming the plurality of recessed regions;

removing a portion of the substrate support defined by a depth measured from the first surface to a third surface to expose to expose a portion of the support structures.

12. The method of claim 11 wherein the support structures are sapphire spheres.

13. The method of claim 12 wherein the dimension is a diameter of the sapphire spheres.

14. The method of claim 13 wherein the diameter is less than approximately 4 mm.

15. The method of claim 11 wherein the step of inserting the plurality of support structures into the plurality of recessed regions comprises at least a portion of the plurality of support structures extending to a second height above the first surface.

16. The method of claim 11 wherein the depth is approximately 30 μm.

17. The method of claim 11 wherein the step of removing a portion of the substrate support comprises electropolishing portions of the first surface of the substrate support.

18. The method of claim 17 wherein electropolishing portions of the first surface removes a layer of the substrate support less than 100 μm in thickness.

19. The method of claim 11 wherein pressing the plurality of support structures into the plurality of recessed regions and aligning a surface of the plurality of support structures with the first surface comprises using a tool with a level of hardness greater than or equal to a level of hardness of the support structures, the level of hardness of the support structures being greater than or a level of hardness of the substrate support.