Abstract: A method for controlling noise on an electronic device may include determining that a measured characteristic, associated with an antenna in a first configuration and included on the electronic device, violates a predetermined threshold. The method may also include identifying an aggressor in a second configuration, which may be a component on the electronic device. The aggressor may emit electromagnetic (EM) radiation that causes the measured characteristic to violate the predetermined threshold. One or more stimuli may be determined based on the first and/or second configurations that would cause the measured characteristic to no longer violate the predetermined threshold. One or more stimuli may be applied to the antenna and/or the aggressor, causing the measured characteristic to no longer violate the predetermined threshold.

Abstract: A method includes identifying deposition thickness property data associated with an amount of material deposited via one or more substrate processing operations of a process recipe performed in a processing chamber. The method further includes determining, based on the deposition thickness property data and a variable clean time relationship of the process recipe, cleaning operation parameters. The method further includes causing, based on the cleaning operation parameters, a cleaning operation in the processing chamber.

Abstract: The present disclosure is directed to an antenna array. The antenna array includes a plurality of dielectric windows coupled to a support structure comprising a plurality of gas ports, a primary frame comprising a primary conduit connected to a power source and a plurality of secondary frames supported by the primary frame. The secondary frame includes a secondary conduit connected to the primary conduit. A plurality of inductive couplers are disposed over the plurality of dielectric windows and supported by the secondary frames. The plurality of inductive couplers include a plurality of antenna connectors and a plurality of plurality of antennas. The plurality of antenna connectors connect the plurality of antennas to the secondary conduit.

Abstract: A semiconductor processing chamber may include a pedestal configured to support a substrate during a plasma-enhanced chemical-vapor deposition (PECVD) process that forms a film on a surface of the substrate. The chamber may also include one or more internal meshes embedded in the pedestal. The one or more internal meshes may be configured to deliver radio-frequency (RF) power to a plasma in the semiconductor processing chamber during the PECVD process. An outer diameter of the one or more internal meshes may be less that a diameter of the substrate. The chamber may further include an RF source configured to deliver the RF power to the one more internal meshes. This configuration may reduce arcing within the processing chamber.

Abstract: A method and apparatus for processing substrates applicable for use in semiconductor manufacturing. The method includes rotating a first shaft having a first perforation where at least a part of the first shaft is disposed within a second shaft. The method further includes flowing a gas through a piping, where the piping is coupled to a second perforation in the second shaft. The method also includes flowing the gas through the second perforation and the first perforation into an interior of the first shaft. The method further includes flowing the gas from the interior of the first shaft to an underside of a substrate disposed within a processing chamber.

Abstract: Ampoules for a semiconductor manufacturing precursors and methods of use are described. The ampoules include a container with an inlet port and an outlet port. The ampoules comprise an inlet plenum located between the inlet port and the cavity and an outlet plenum located between the outlet port and the cavity. A flow path is defined by a plurality of tubular walls and a flow ingress openings of the ampoule adjacent bottom edges of the tubular walls, through which a carrier gas flows in contact with the precursor.

Abstract: A rotating substrate support for use in a substrate processing system includes a cylindrical shaped outer hub having a first end, a second end, a wall that extends from the first end to the second end, and a central opening formed through the wall. The wall includes an inner surface, an outer surface, and a flexible region. A circumferential groove is formed in the outer surface of the wall and within the flexible region and includes a gap that extends in a first direction. The inner surface of the wall defines at least a portion of an inner region of the cylindrical shaped outer hub. A first support plate is coupled to a first portion of the inner surface, and a second support plate coupled to a second portion of the inner surface. An expandable actuator is configured to change a size of the gap by adjusting a distance in the first direction between the second support plate and the first support plate.

Abstract: Semiconductor devices (e.g., gate-all-around (GAA) devices), process tools for manufacturing GAA devices and methods of manufacturing GAA devices, and inner spacer liners and inner spacers for GAA devices, are described. The methods comprise performing a chemical vapor deposition (CVD) process to form an amorphous silicon liner and an inner spacer within a superlattice structure formed on a top surface of a semiconductor substrate. The superlattice structure has a plurality of semiconductor material layers (e.g., silicon germanium (SiGe)) and a corresponding plurality of channel layers (e.g., silicon (Si)). The amorphous silicon liner is conformally formed along the GAA device, including along the recessed semiconductor material layers and the corresponding plurality of channel layers, and the inner spacer is formed directly on the amorphous silicon liner. One or more operations of the methods described herein are performed in situ in an integrated processing tool system.

Abstract: Methods of semiconductor processing may include providing a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed on a substrate support within the processing region. A layer of silicon-and-nitrogen-containing material may be disposed on the substrate. The methods may include forming plasma effluents of the hydrogen-containing precursor. The methods may include contacting the layer of silicon-and-nitrogen-containing material with plasma effluents of the hydrogen-containing precursor. The contacting may etch a portion of the layer of silicon-and-nitrogen-containing material.

Abstract: Embodiments of the present disclosure relate to methods, systems and apparatus for improving dose uniformity of the photolithography system. The method includes projecting a write beam from a projection unit toward a mask to form a plurality of incident lights, adjusting the projection unit to create a distribution of incidence angles corresponding to the incident lights, focusing the plurality of incident lights toward a photoresist layer disposed over a substrate with a lens, removing portions of the photoresist layer to form the device pattern, and forming structures on the substrate corresponding to the device pattern. The mask has a mask pattern corresponding to a device pattern. By focusing the plurality of incident lights towards the photoresist, a swing curve of the incident lights interfere to reduce a total swing curve of the incident lights to develop a photoresist layer with a photoresist pattern corresponding to the device pattern.

Abstract: Embodiments disclosed herein include a particle collection trap for an abatement system for abating compounds produced in semiconductor processes. The particle collection trap includes a device for producing spiral gas flow in the particle collection trap. The spiral gas flow causes particles, which are heavier than the gas, to travel to the outside diameter of the flow path where the gas velocity is slower and to drop out of the gas stream. The device may be a spiral member coupled to a hollow tube or a rolled member having an inner portion coupled to a hollow tube. The particle collection trap increases the accumulation rate of particles in the gas stream without reducing the velocity of the gas flow.

Abstract: Embodiments of the present disclosure are directed to selective etching processes. The processes include an etching chemistry (a plasma of a fluorine-containing precursor and a first gas mixture), and a passivating chemistry (a plasma of a sulfur-containing precursor and a second gas mixture). In some embodiments, the sulfur-containing precursor and the second gas mixture are present in a ratio of sulfur-containing precursor to second gas mixture in a range of from 0.01 to 5. The methods include etching a substrate having a plurality of alternating layers of silicon oxide and silicon nitride thereon and a trench formed through the plurality of alternating layers. The silicon nitride layers are selectively etched relative to the silicon oxide layers at an etch selectivity of greater than or equal to 500:1.

Abstract: A method for spacer patterning includes performing a deposition process, the deposition process comprising conformally depositing an over layer over a spacer layer as deposited on top surfaces of a patterned mandrel layer and on sidewalls of the patterned mandrel layer, and performing an etch process using a fluorine containing etching gas. The etch process includes a post-deposition breakthrough process, removing portions of the over layer on the top surfaces of the patterned mandrel layer, and a main-etch process, removing shoulder portions of the over layer and shoulder portions of the spacer layer.

Abstract: Exemplary subpixel structures include a directional light-emitting diode structure characterized by a full-width-half-maximum (FWHM) of emitted light having a divergence angle of less than or about 10°. The subpixel structure further includes a lens positioned a first distance from the light-emitting diode structure, where the lens is shaped to focus the emitted light from the light-emitting diode structure. The subpixel structure still further includes a patterned light absorption barrier positioned a second distance from the lens. The patterned light absorption barrier defines an opening in the barrier, and the focal point of the light focused by the lens is positioned within the opening. The subpixels structures may be incorporated into a pixel structure, and pixel structures may be incorporated into a display that is free of a polarizer layer.

Abstract: A substrate processing system includes a factory interface, a transfer chamber of heptagonal shape and including four first facets and three second facets, each having a width that is narrower than that of each of the four first facets. A processing chamber is attached to one of the four first facets. A first auxiliary chamber attached to a first of the three second facets and is smaller than the first processing chamber. A load lock is attached to a second of the three second facets and to the factory interface. A second auxiliary chamber is attached to a third of the three second facets. The load lock is attached to the transfer chamber between the first and second auxiliary chambers. A robot is attached to a bottom of the transfer chamber and adapted to transfer substrates to/from the first processing chamber, the first auxiliary chamber, and the load lock.

Abstract: Apparatuses for clamping a substrate on a mono-polar electrostatic chuck for deposition of photoresist films are disclosed. In an example, a lift-pin assembly includes a first metal spring, a first metal above and coupled to the first metal spring, a second metal spring above and coupled to the first metal, a second metal above and coupled to the second metal spring, and a ceramic above and coupled to the second metal.

Abstract: A body of an electrostatic chuck comprises mesas disposed on a polished surface of the body. Each of the mesas comprises an adhesion layer disposed on the polished surface of the body, a transition layer disposed over the adhesion layer, and a coating layer disposed over the transition layer. The coating layer has a hardness of at least 14 GPa. The body further comprises a sidewall coating disposed over a sidewall of the body. A method for preparing the body comprises polishing the surface of the body and cleaning the polished surface. The method further comprises depositing the mesas by depositing the adhesion layer on the body, the transition layer over the adhesion layer, and the coating layer over the transition layer. Further, the method includes, polishing the mesas.

Abstract: A method of forming a structure on a substrate that includes forming a tungsten nucleation layer within at least one opening within a multi-tier portion of a substrate. The method includes exposing the nucleation layer to a nitrogen-containing gas to inhibit growth of the nucleation layer at narrow points within the at least one opening. The method includes exposing the at least one opening of the substrate to the tungsten-containing precursor gas to form a fill layer over the nucleation layer within the at least one opening. The method includes exposing the at least one opening to a molybdenum-containing gas to remove a tungsten nitride layer from the tungsten fill layer.