Patents Assigned to Applied Materials, Inc.
  • Publication number: 20220148843
    Abstract: An extraction plate for an ion beam system. The extraction plate may include an insulator body that includes a peripheral portion, to connect to a first side of a plasma chamber, and further includes a central portion, defining a concave shape. As such, an extraction aperture may be arranged along a first surface of the central portion, where the first surface is oriented at a high angle with respect to the first side. The extraction plate may further include a patterned electrode, comprising a first portion and a second portion, affixed to an outer side of the insulator body, facing away from the plasma chamber, wherein the first portion is separated from the second portion by an insulating gap.
    Type: Application
    Filed: November 7, 2020
    Publication date: May 12, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Costel Biloiu, Jay R. Wallace, Kevin M. Daniels, Frank Sinclair, Christopher Campbell
  • Publication number: 20220149250
    Abstract: Exemplary pixel structures may include a pixel structure of a display device panel stack. The structures may include a first panel. The first panel may include a plurality of ultraviolet light sources disposed on a backplane. The structures may also include a second panel. The second panel may be coupled with the first panel. The second panel may have an inner surface facing the ultraviolet light sources. The second panel may include a transparent substrate and a down-conversion layer. The down-conversion layer may be disposed overlying the transparent substrate. The down-conversion layer may be configured to down-convert ultraviolet light into visible light. The plurality of ultraviolet light sources and the inner surface of the second panel may be separated by a distance of at least 2 ?m.
    Type: Application
    Filed: November 9, 2021
    Publication date: May 12, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Robert Anthony Nordsell, Mingwei Zhu, Nag Patibandla, John D. Busch, Moon Young Shin, Asha Parekh, Hou T. Ng
  • Publication number: 20220148894
    Abstract: Exemplary support assemblies may include a top puck and a backing plate coupled with the top puck. The support assemblies may include a cooling plate coupled with the backing plate. The support assemblies may include a heater coupled between the cooling plate and the backing plate. The support assemblies may also include a back plate coupled with the backing plate about an exterior of the backing plate. The back plate may at least partially define a volume, and the heater and the cooling plate may be housed within the volume.
    Type: Application
    Filed: January 25, 2022
    Publication date: May 12, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Mehmet Tugrul Samir, Dongqing Yang, Dmitry Lubomirsky, Peter Hillman, Soonam Park, Martin Yue Choy, Lala Zhu
  • Publication number: 20220145485
    Abstract: Systems and methods for electroplating are described. The electroplating system may include a vessel configured to hold a first portion of a liquid electrolyte. The system may also include a substrate holder configured for holding a substrate in the vessel. The system may further include a first reservoir in fluid communication with the vessel. In addition, the system may include a second reservoir in fluid communication with the vessel. Furthermore, the system may include a first mechanism configured to expel a second portion of the liquid electrolyte from the first reservoir into the vessel. The system may also include a second mechanism configured to take in a third potion of the liquid electrolyte from the vessel into the second reservoir when the second portion of the liquid electrolyte is expelled from the first reservoir. Methods may include oscillating flow of the electrolyte within the vessel.
    Type: Application
    Filed: January 24, 2022
    Publication date: May 12, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Paul R. McHugh, Gregory J. Wilson
  • Patent number: 11328909
    Abstract: Exemplary methods for conditioning a processing region of a semiconductor processing chamber may include forming conditioning plasma effluents of an oxygen-containing precursor in a semiconductor processing chamber. The methods may include contacting interior surfaces of the semiconductor processing chamber bordering a substrate processing region with the conditioning plasma effluents. The methods may also include treating the interior surfaces of the semiconductor processing chamber.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: May 10, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Hanshen Zhang, Zhenjiang Cui, Nitin Ingle
  • Patent number: 11328900
    Abstract: A plasma ignition circuit includes a transformer having a primary coil configured to couple an RF power supply. A first secondary coil is configured to couple a remote plasma source (RPS), and a second secondary coil. The plasma ignition circuit further includes a control switch having an input configured to couple the second secondary coil and an output configured to capacitively couple the RPS and a switch controller. The switch controller is configured to upon sensing a secondary RF voltage applied to the second secondary coil in response to an RF voltage applied by RF power supply to the primary coil, enable the control switch to capacitively apply the secondary RF voltage to the RPS to ignite a plasma within the RPS. Upon sensing a drop in plasma impedance when the plasma is ignited, disable the control switch to discontinue applying the secondary RF voltage to the RPS.
    Type: Grant
    Filed: February 17, 2020
    Date of Patent: May 10, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Teryl Pratt, Rongping Wang, Guomin Mao, Andy Chuang
  • Patent number: 11328929
    Abstract: Methods, apparatuses, and systems for substrate processing for lowering contact resistance in at least contact pads of a semiconductor device are provided herein. In some embodiments, a method of substrate processing for lowering contact resistance of contact pads includes: circulating a cooling fluid in at least one channel of a pedestal; and exposing a backside of the substrate located on the pedestal to a cooling gas to cool a substrate located on the pedestal to a temperature of less than 70 degrees Celsius. In some embodiments in accordance with the present principles, the method can further include distributing a hydrogen gas or hydrogen gas combination over the substrate.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: May 10, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Yueh Sheng Ow, Junqi Wei, Wen Long Favier Shoo, Ananthkrishna Jupudi, Takashi Shimizu, Kelvin Boh, Tuck Foong Koh
  • Patent number: 11325827
    Abstract: Methods are provided for manufacturing well-controlled, solid-state nanopores and arrays thereof. In one aspect, methods for manufacturing nanopores and arrays thereof exploit a physical seam. One or more etch pits are formed in a topside of a substrate and one or more trenches, which align with the one or more etch pits, are formed in a backside of the substrate. An opening is formed between the one or more etch pits and the one or more trenches. A dielectric material is then formed over the substrate to fill the opening. Contacts are then disposed on the topside and the backside of the substrate and a voltage is applied from the topside to the backside, or vice versa, through the dielectric material to form a nanopore. In another aspect, the nanopore is formed at or near the center of the opening at a seam, which is formed in the dielectric material.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: May 10, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Philip Allan Kraus, Joseph R. Johnson
  • Patent number: 11327394
    Abstract: A multilayer stack in the form of a Bragg reflector comprising a graded interfacial layer and a method of manufacturing are disclosed. The graded interfacial layer eliminates the formation of low-reflectivity interfaces in a multilayer stack and reduces roughness of interfaces in a multilayer stack.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: May 10, 2022
    Assignee: Applied Materials Inc.
    Inventors: Wen Xiao, Vibhu Jindal, Weimin Li, Shuwei Liu
  • Patent number: 11325223
    Abstract: A carrier head for a chemical mechanical polishing apparatus includes a carrier body, an outer membrane assembly, an annular segmented chuck, and an inner membrane assembly. The outer membrane assembly is supported from the carrier body and defines a first plurality of independently pressurizable outer chambers. The annular segmented chuck supported below the outer membrane assembly, and includes a plurality of concentric rings that are independently vertically movable by respective pressurizable chambers of the outer membrane assembly. At least two of the rings having passages therethrough to suction-chuck a substrate to the chuck. The inner membrane assembly is supported from the carrier body and is surrounded by an innermost ring of the plurality of concentric rings of the chuck. The inner membrane assembly defines a second plurality of independently pressurizable inner chambers and has a lower surface to contact the substrate.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: May 10, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Steven M. Zuniga, Jay Gurusamy
  • Patent number: 11327218
    Abstract: Embodiments described herein relate to methods for fabricating waveguide structures utilizing substrates. The waveguide structures are formed having input coupling regions, waveguide regions, and output coupling regions formed from substrates. The regions are formed by imprinting stamps into resists disposed on hard masks formed on surfaces of the substrates to form positive waveguide patterns. Portions of the positive waveguide patterns and the hard masks formed under the portions are removed. The substrates are masked and etched to form gratings in the input coupling regions and the output coupling regions. Residual portions of the positive waveguide patterns and the hard masks disposed under the residual portions are removed to form waveguide structures having input coupling regions, waveguide regions, and output coupling regions formed from substrates.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: May 10, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Michael Yu-tak Young, Wayne McMillan, Rutger Meyer Timmerman Thijssen, Robert Jan Visser
  • Patent number: 11326256
    Abstract: Embodiments described herein relate to apparatus and techniques for mechanical isolation and thermal insulation in a process chamber. In one embodiment, an insulating layer is disposed between a dome assembly and a gas ring. The insulating layer is configured to maintain a temperature of the dome assembly and prevent thermal energy transfer from the dome assembly to the gas ring. The insulating layer provides mechanical isolation of the dome assembly from the gas ring. The insulating layer also provides thermal insulation between the dome assembly and the gas ring. The insulating layer may be fabricated from a polyimide containing material, which substantially reduces an occurrence of deformation of the insulating layer.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: May 10, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Luke Bonecutter, Yunzhe Yang, Rupankar Choudhury, Abhijit Kangude
  • Patent number: 11329052
    Abstract: Methods of forming a DRAM bit line to improve line edge roughness (LER) and lower resistance are described. The method comprises implanting an inert species into a bit line metal layer having a first grain size on a substrate to form an amorphized bit line metal layer having a second grain size smaller than the first grain size. A film stack is then deposited on the amorphized bit line metal layer. The film stack and amorphized bit line metal layer are etched to form a patterned film stack on the substrate. The patterned film stack on the substrate is thermally annealed.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: May 10, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Lequn Liu, Priyadarshi Panda, Jonathan C. Shaw
  • Patent number: 11329003
    Abstract: A method of printing structures on a reconstructed wafer includes positioning a plurality of semiconductor dies on a support substrate, anchoring the plurality of semiconductor dies to the support substrate by printing a plurality of anchors that extend across edges of the semiconductor dies onto the support substrate and thus form a reconstructed wafer, and printing one or more device structures on the pluralities of semiconductor dies while anchored on the support substrate. The printing operations include ejecting droplets of a liquid precursor material and curing the liquid precursor material.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: May 10, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Daihua Zhang, Hou T. Ng, Nag B. Patibandla, Sivapackia Ganapathiappan, Yingdong Luo, Kyuil Cho, Han-Wen Chen
  • Patent number: 11328928
    Abstract: Methods of doping a semiconductor material are disclosed. Some embodiments provide for conformal doping of three dimensional structures. Some embodiments provide for doping with high concentrations of boron for p-type doping.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: May 10, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Srinivas Gandikota, Abhijit Basu Mallick, Swaminathan Srinivasan, Rui Cheng, Susmit Singha Roy, Gaurav Thareja, Mukund Srinivasan, Sanjay Natarajan
  • Patent number: 11326253
    Abstract: A multi-component coating composition for a surface of a semiconductor process chamber component comprising at least one first film layer of a yttrium oxide or a yttrium fluoride coated onto the surface of the semiconductor process chamber component using an atomic layer deposition process and at least one second film layer of an additional oxide or an additional fluoride coated onto the surface of the semiconductor process chamber component using an atomic layer deposition process, wherein the multi-component coating composition is selected from the group consisting of YOxFy, YAlxOy, YZrxOy and YZrxAlyOz.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: May 10, 2022
    Assignee: Applied Materials, Inc.
    Inventors: David Fenwick, Jennifer Y. Sun
  • Patent number: 11328938
    Abstract: A system includes a filter purge apparatus configured to supply a flushing gas to a portion of a factory interface chamber located upstream of a chamber filter to minimize moisture contamination of the chamber filter by ambient air. The filter purge apparatus is configured to supply the flushing gas in association with breach of the factory interface chamber which compromises controlled environment of the factory interface chamber.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: May 10, 2022
    Assignee: Applied Materials, Inc.
    Inventor: Michael R. Rice
  • Patent number: 11328964
    Abstract: Methods, systems, and non-transitory computer readable medium are described for prescriptive analytics in highly collinear response space. A method includes receiving film property data associated with manufacturing parameters of manufacturing equipment. The method further includes determining that the film property data is correlated and is different from target data. The method further includes selecting a set of data points of the film property data that are orthogonal to the target data. The method further includes performing feature extraction on the set of data points. The method further includes determining, based on the feature extraction, updates to one or more of the manufacturing parameters to meet the target data.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: May 10, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Sidharth Bhatia, Jie Feng, Dermot Cantwell
  • Patent number: 11328943
    Abstract: Disclosed is a wafer processing system, a dual gate system, and methods for operating these systems. The dual gate system may have a first gate, a second gate, a gate connector coupled to the first gate and to the second gate, and actuator coupled to the gate connector. The actuator is configured to seal the first gate against a first slot or open the first slot via vertical motion. The actuator is also configured to seal the second gate against a second slot or open the second slot via a combination of vertical motion and horizontal motion.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: May 10, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Kumaresan Kuppannan, Ofer Amir, Michael Kuchar
  • Patent number: 11330673
    Abstract: A heater for a semiconductor processing chamber is disclosed that includes a ceramic body, and a resistive heating element embedded in the ceramic body, the resistive heating element disposed in a heater coil having an inner central sector and an outer central sector, the inner central sector having a plurality of first peaks and the outer central sector having a plurality of second peaks, wherein the number of first peaks is less than about fifty-six, and the number of second peaks is less than about eighty.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: May 10, 2022
    Assignee: Applied Materials, Inc.
    Inventor: Govinda Raj