Apparatus and method for argon plasma induced ultraviolet light curing step for increasing silicon-containing photoresist selectivity
Provided is a method and apparatus for increasing an etching selectivity of photoresist material. An exemplary method initiates with providing a substrate with a developed photoresist layer. The developed photoresist layer on the substrate includes polymer chains containing silicon. Next, the substrate and developed photoresist layer are exposed to an ultraviolet (UV) light, where the UV light emanates from a UV generating agent. A portion of the developed photoresist layer is then converted to a hardened layer where the hardened layer is created by cross-linking the polymer chains containing silicon and the cross-linking is activated by the UV light. Next an etch may be performed on the substrate using the hardened layer.
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This application is a divisional to copending prior U.S. patent application Ser. No. 09/894,230, filed Jun. 27, 2001, and entitled “APPARATUS AND METHOD FOR ARGON PLASMA INDUCED ULTRAVIOLET LIGHT CURING STEP OR INCREASING SILICON-CONTAINING PHOTORESIST SELECTIVITY.” This application is incorporated herein by reference.
BACKGROUND OF THE INVENTION1. Field of the Invention
This invention relates generally to lithography and more particularly to a method and apparatus for increasing the selectivity of a silicon-containing photoresist layer to improve profile control of etched features without decreasing wafer throughput.
2. Description of the Related Art
The ability to work selectively on small well defined areas of a substrate is paramount in the manufacture of semiconductor devices. In the continuing quest to achieve higher levels of performance and higher functional density of the semiconductor devices, the microelectronics industry is committed to applying new processes to further reduce the minimum feature sizes of the semiconductor devices.
As the feature sizes are reduced, the devices can become smaller or remain the same size but become more densely packed. As such, advances in lithographic technologies used to pattern the semiconductor devices must keep pace with the progress to reduce feature sizes, in order to allow for smaller and more dense. For example, one of the main ways to reduce the device critical dimensions (CD) through lithographic technologies has been to continually reduce the wavelength of the radiation used to expose the photoresist.
Sharp lithographic transmission becomes more of a challenge as wafers progress to higher density chips with shrinking geometries. Furthermore, as metallization transitions to dual damascene processes, lithography techniques to pattern holes or trenches in the dielectric become more critical. In particular, the photoresists employed in the lithographic techniques must provide for proper selectivity so that downstream etching processes yield sharp profiles. Moreover, as device features progressively become smaller, the aspect ratios for those same features become greater, thereby making it more difficult to accurately perform etching operations.
Photoresists are typically polymeric materials consisting of multi-component formulations. Additionally, a photoresist may be applied as a single layer or as multiple layers where one of the layers contains silicon. Multi-layered photoresists tend to offer superior formation of a pattern, therefore, the multi-layered photoresists are desirable as semiconductor devices become smaller. However, resist compositions containing silicon, either in the main resist polymer or by post-exposure surface treatment (e.g., silylation), have either failed to deliver adequate improvement in etch resistance or have had poor processing performance due to the unacceptable selectivity past the silicon containing layer.
As a result, there is a need to solve the problems of the prior art to improve the selectivity past the developed photoresist layer containing silicon, without simultaneously decreasing wafer throughput, so that during etching there is improved ability to distinguish between silicon containing photoresists and non silicon containing photoresists or the dielectric.
SUMMARY OF THE INVENTIONBroadly speaking, the present invention fills these needs by providing a photoresist layer that has been hardened to increase the selectivity of the hardened photoresist layer relative to an underlying photoresist or underlying dielectric. In addition, the hardening process may take place in an etch chamber so that the fabrication, e.g., etching steps, may be combined with treating processes to improve wafer throughput. It should be appreciated that the present invention can be implemented in numerous ways, including as an apparatus, a system, a device, or a method. Several inventive embodiments of the present invention are described below.
In one embodiment, an apparatus for exposing a photoresist-developed substrate is provided. In this embodiment, a chamber is included where the chamber has at least one gas inlet adapted to introduce a gas into the chamber. Also included is a support within the chamber. A substrate on the support where the substrate has at least one developed photoresist layer is included. The substrate is exposed to an ultraviolet (UV) light within the chamber where the UV light is generated from a UV generating agent The exposure of the developed photoresist to the UV light causes at least a portion of the developed photoresist layer to transform to a hardened layer.
In another embodiment of the invention an apparatus for curing a photoresist is provided. In this embodiment, a chamber having at least one gas inlet adapted for introducing an ultraviolet (UV) generating agent into the chamber and a support within the chamber are included. A substrate, on the support, where the substrate has a first photoresist layer and a second photoresist layer is included, where the first photoresist layer is disposed over the second photoresist layer. The first photoresist layer includes silicon containing polymer chains. The silicon containing polymer chains are cross-linked upon exposure to UV light to form a hardened layer at a top region of the first photoresist layer, where the UV light is generated by the UV generating agent.
In yet another embodiment of the invention, a method for increasing a selectivity of a photoresist is provided. The method initiates with providing a substrate with a developed photoresist layer, the developed photoresist layer including polymer chains containing silicon. Next, the substrate is exposed to an ultraviolet (UV) light, where the UV light emanates from a UV generating agent. Finally, a portion of the developed photoresist layer is converted to a hardened layer where the hardened layer is created by cross-linking the polymer chains containing silicon, where the cross-linking is activated by UV light.
In still another embodiment of the invention, a method for curing a photoresist is provided. The method initiates with providing a substrate with a first photoresist layer and a second photoresist layer. The first photoresist layer is developed and disposed over the second photoresist layer and the first photoresist layer is formulated to include polymer chains containing silicon. Next, the first photoresist layer is exposed to ultraviolet (UV) light where the UV light emanates from a UV generating agent. The method terminates after converting a portion of the first photoresist layer to a hardened layer where the hardened layer is configured to increase an etching selectivity ratio.
In still yet another embodiment, a method for curing a photoresist disposed on a wafer in an etch chamber is provided. The method initiates with introducing an ultraviolet (UV) generating agent into an etch chamber through a process gas inlet of the etch chamber. The UV generating agent is induced to emit UV light. Next, the wafer is exposed to the UV light where the wafer has a developed photoresist layer formulated to include polymer chains containing silicon. Then, a portion of the developed photoresist layer is converted to a hardened layer upon exposure to the UV light.
The advantages of the present invention are numerous. Most notably, the formation of the hardened layer increases the selectivity ratio of the underlying photoresist layer or interlayer dielectric relative to the hardened layer of the top photoresist layer. Accordingly, any etch processes performed on the substrate with the hardened layer will etch through the underlying photoresist layer or interlayer dielectric at an increased rate relative to the etch rate of the hardened layer. Furthermore, the etch profile control will be improved as a result of the increased selectivity, thereby allowing for pinpoint accuracy as semiconductor feature size continues to shrink. Additionally, an etch chamber may be utilized for curing the hardened layer. As a result, after the curing process, the substrate may be etched in the same chamber. Hence, throughput is increased and handling of the substrate is minimized.
Other aspects and advantages of the invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention.
BRIEF DESCRIPTION OF THE DRAWINGSThe present invention will be readily understood by the following detailed description in conjunction with the accompanying drawings, and like reference numerals designate like structural elements.
An invention is described for an apparatus and a method for enhancing the selectivity of a silicon containing photoresist thereby improving etch profile control. It will be obvious, however, to one skilled in the art, that the present invention may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail in order not to unnecessarily obscure the present invention.
The embodiments of the present invention provide an apparatus and method for an improved selectivity of a silicon-containing photoresist which in turn, allows for amelioration of a subsequent etch profile. In one embodiment, a hardened layer is formed in a silicon-containing photoresist by exposing the developed silicon-containing photoresist to ultraviolet (UV) light. In accordance with one embodiment of the invention, the UV light is generated by striking a plasma containing an inert gas such as neon, as will be described below in more detail. The exposure to the UV light causes the polymer chains of the silicon containing photoresist to cross link, thereby creating a hardened layer.
The hardened layer of the silicon-containing photoresist has an increased selectivity relative to an underlying photoresist layer or an underlying interlayer dielectric (ILD). Accordingly, the increased selectivity allows for tighter control of future etching processes, particularly with respect to dual damascene processing. Just as significant, the formation of the hardened layer can take place in an etch chamber. Correspondingly, the etch chamber is configured to control various process parameters as discussed below. In addition, once the silicon-containing photoresist has been hardened, downstream etching processes may occur in the etch chamber without the need to remove the wafer. Consequently, wafer throughput is increased by combining fabrication steps into a single system.
Continuing with
While the above exposure and development of the photoresist has been described for a positive resist, it is understood that the apparatus and method is equally applicable for a negative resist. For example, with a negative resist, the reticle or mask 104 would be modified so as to expose regions 112 and not expose regions 114 of the silicon-containing photoresist layer 110. For this embodiment, the exposed regions 112 become less soluble than unexposed region 114. The negative resist is then developed by a solvent wash of the photoresist layer 110 to remove regions 114 in accordance with one embodiment of the invention.
Continuing with
In a preferred embodiment of the invention as illustrated in
As can be seen in diagram 134 the remainder of the top layer of the silicon-containing photoresist is unchanged as depicted by unconverted regions 140. In addition, regions 142 of the lower photoresist layer 116 of non silicon-containing photoresist are exposed to the UV light but are not cross-linked because of the lack of silicon in the lower photoresist layer 116. It should be appreciated that the conversion process may take place inside a chamber, such as an etch chamber which has a plurality of gas inlets. In such an embodiment the chamber is configured to control parameters, such as a flow rate of the argon and neon gases, a pressure inside the chamber, a temperature inside the chamber and the power of a top and bottom electrode. The preferred ranges for these parameters are discussed in reference to
Still referring to
Flowchart 154 then proceeds to operation 158 where the top photoresist layer is exposed to UV light generated by a UV light generating agent. Here, the exposure may be inside an etch chamber. Accordingly, the substrate will rest on a support within the chamber such as a chuck. In accordance with one embodiment of the invention, the UV light generating agent is a neon-containing plasma. For example, a neon gas is introduced into the etch chamber through process gas inlets, thereby creating the curing environment to harden a silicon-containing photoresist when the plasma is struck. In a preferred embodiment, neon gas is provided to the etch chamber with an inert gas such as argon. Other UV generating agents that may be used include helium, hydrogen, krypton and xenon. It should be further appreciated that the creation of the hardening layer may be initiated by striking a plasma within the etch chamber and controlling certain parameters inside the etch chamber as discussed below.
As is well known in the art, etch chambers are capable of controlling various parameters. In accordance with one embodiment of the invention, the flow rate of the process gases, the pressure and temperature within the chamber, and the power to the top and bottom electrodes are controlled within the ranges that follow. It should be appreciated that the following ranges are provided for illustration purposes only. The flow rate of an inert gas for a carrier gas, such as argon, is between about 1000 standard cubic centimeters per minute (sccm) to about 3000 sccm with a preferred flow rate of about 2000 sccm. The flow rate for the UV generating agent, such as neon, is between about 0.2% and about 0.8% of the flow rate of the carrier gas such as argon with a preferred flow rate of about 0.4% of the carrier gas flow rate. The pressure within the chamber is controlled between about 1 Torr and about 5 Torr with a preferred pressure of about 3 Torr. The temperature within the chamber is controlled between about −30° Celsius (C) and about 70° C. with a preferred temperature of about 0° C. The power to the top electrode is between about 100 watts (W) and about 1500 W with a preferred power of about 600 W. The power to the bottom electrode is between about 0 W to about 1000 W with a preferred power of about 0 W. It should be appreciated that the above ranges may vary in different etch chambers.
Returning back to
As described above in reference to
It should be appreciated that the above described invention may be employed with a single silicon-containing photoresist layer is used without an underlying photoresist layer being applied to the substrate. Also, as mentioned above the invention may be utilized as part of a dual damascene process or traditional metallization processes where aluminum alloy forms the metal lines.
Although the foregoing invention has been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the invention is not to be limited to the details given herein, but may be modified within the scope and equivalents of the appended claims.
Claims
1. An apparatus for exposing a photoresist-developed substrate, comprising:
- a chamber, the chamber having at least one gas inlet, the gas inlet being adapted to introduce a gas into the chamber;
- a support within the chamber; and
- a substrate on the support, the substrate having at least one developed photoresist layer, the substrate being exposed to ultraviolet (UV) light within the chamber, the UV light being generated from a UV generating agent, the exposure of the developed photoresist of the substrate causing at least a portion of the developed photoresist layer to transform to a hardened layer.
2. The apparatus as recited in claim 1, wherein the developed photoresist layer is a silicon containing photoresist.
3. The apparatus as recited in claim 1, wherein the UV generating agent is neon.
4. The apparatus as recited in claim 1, wherein the chamber is an etch chamber.
5. The apparatus as recited in claim 1, wherein the hardened layer has a thickness of between about 5% to about 75% of the thickness of the developed photoresist layer.
6. The apparatus as recited in claim 2, wherein the hardened layer includes cross-linked polymer chains.
7. The apparatus as recited in claim 1, wherein a temperature inside the chamber is between about −30 C. and about 70 C.
8. The apparatus as recited in claim 1, wherein argon gas is supplied to the chamber at a flow rate between about 1000 sccm and about 3000 sccm.
9. The apparatus as recited in claim 8, wherein neon gas is supplied to the chamber at a flow rate between about 0.2% and about 0.8% of the argon gas flow rate.
10. An apparatus for curing a photoresist on a substrate, comprising:
- a chamber, the chamber having at least one gas inlet, the gas inlet being adapted to introduce an ultraviolet (UV) generating agent into the chamber;
- a support within the chamber; and
- a substrate on the support, the substrate having a first photoresist layer and a second photoresist layer, the first photoresist layer being disposed over the second photoresist layer, the first photoresist layer comprising silicon containing polymer chains, the silicon containing polymer chains cross-linking upon exposure to a UV light to form a hardened layer at a top region of the first photoresist layer, the UV light being generated by the UV generating agent.
11. The apparatus as recited in claim 10, wherein the UV generating agent is neon.
12. The apparatus as recited in claim 10, wherein the support is a chuck.
13. The apparatus as recited in claim 10, wherein a thickness of the second photoresist layer is about 6000 521.
14. The apparatus as recited in claim 10, wherein an etch selectivity ratio of the first photoresist layer and the second photoresist layer is between about 8 and about 15.
15. The apparatus as recited in claim 10, wherein the polymer chains are cross-linked by one of silicon-hydrogen bonds and silicon-acetyl bonds.
16. A method for curing photoresist, comprising:
- providing a substrate with a first photoresist layer and a second photoresist layer, the first photoresist being developed and disposed over the second photoresist layer, the first photoresist layer being formulated to include polymer chains containing silicon;
- exposing the first photoresist layer to an ultraviolet (UV) light, the UV light emanating from a UV generating agent; and
- converting a portion of the first photoresist layer to a hardened layer, the hardened layer being formed to increase an etching selectivity ratio.
17. The method for curing a photoresist as recited in claim 16, wherein the UV generating agent is neon.
18. The method for curing a photoresist as recited in claim 16, wherein exposing the first photoresist layer to a UV light further includes,
- striking a plasma containing the UV generating agent to induce the generation of UV light.
19. The method for curing a photoresist as recited in claim 16, wherein the polymer chains are cross-linked through one of silicon-hydrogen bonds and silicon-acetyl bonds.
20. The method for curing a photoresist as recited in claim 16, wherein the curing occurs within an etch chamber.
21. In an etch chamber having a top and a bottom electrode, process gas inlets, and a chuck for holding a wafer, the wafer including a dielectric layer to be etched, a method for curing a photoresist disposed on the wafer, comprising:
- introducing an ultraviolet (UV) generating agent into an etch chamber through a process gas inlet, the UV generating agent being induced to emit UV light;
- exposing the wafer to the UV light, the wafer having a developed photoresist layer, the developed photoresist layer being formulated so as to include polymer chains containing silicon; and
- converting a portion of the developed photoresist layer to a hardened layer upon exposure to the UV light.
22. The method for curing a photoresist as recited in claim 21, wherein the UV generating agent is neon.
23. The method for curing a photoresist as recited in claim 21, wherein converting a portion of the developed photoresist further includes,
- cross-linking the polymer chains of the developed photoresist.
24. The method for curing a photoresist as recited in claim 21, further comprising:
- controlling the gas flow rate, a temperature of the etch chamber, a pressure of the etch chamber, and a power supply to the top and the bottom electrode.
25. The method for curing a photoresist as recited in claim 21, wherein the
- portion of the photoresist layer converted to a hardened layer is between about 5% and about 75% of the photoresist layer.
26. The method for curing a photoresist as recited in claim 24, wherein the power to the top electrode is maintained at between about 100 watts and 1500 watts.
27. The method for curing a photoresist as recited in claim 24, wherein the power to the bottom electrode is maintained at between about 0 watts and 1000 watts.
Type: Application
Filed: Nov 29, 2006
Publication Date: Mar 29, 2007
Applicant:
Inventors: Francis Ko (Taichung), Richard Chen (San-Shar City), Charlie Lee (Hsin-Chu)
Application Number: 11/606,526
International Classification: G03B 27/42 (20060101); G03F 1/00 (20060101);